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authorHyong Bin Kim <hyongbink@nvidia.com>2016-06-22 14:47:21 +0300
committerThierry Reding <thierry.reding@gmail.com>2016-07-11 13:49:32 +0300
commitb979ed531468e9848d95a3b788dd8490927417e3 (patch)
tree5d0c61c54f8ef8f1f1d12942a56d1bac91c6fc7a /drivers/pwm/pwm-tegra.c
parente0ee1a75f412cc9f3b16127742a30baf975ec51f (diff)
downloadlinux-b979ed531468e9848d95a3b788dd8490927417e3.tar.xz
pwm: tegra: Avoid overflow when calculating duty cycle
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calculation when the PWM rate is low. Hence do all calculation on unsigned long long to avoid overflow. Signed-off-by: Hyong Bin Kim <hyongbink@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-tegra.c')
-rw-r--r--drivers/pwm/pwm-tegra.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pwm/pwm-tegra.c
index 2026eaa932ae..247156149b44 100644
--- a/drivers/pwm/pwm-tegra.c
+++ b/drivers/pwm/pwm-tegra.c
@@ -67,7 +67,7 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
int duty_ns, int period_ns)
{
struct tegra_pwm_chip *pc = to_tegra_pwm_chip(chip);
- unsigned long long c;
+ unsigned long long c = duty_ns;
unsigned long rate, hz;
u32 val = 0;
int err;
@@ -77,7 +77,8 @@ static int tegra_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
* per (1 << PWM_DUTY_WIDTH) cycles and make sure to round to the
* nearest integer during division.
*/
- c = duty_ns * (1 << PWM_DUTY_WIDTH) + period_ns / 2;
+ c *= (1 << PWM_DUTY_WIDTH);
+ c += period_ns / 2;
do_div(c, period_ns);
val = (u32)c << PWM_DUTY_SHIFT;