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path: root/arch/riscv/configs/defconfig
AgeCommit message (Expand)AuthorFilesLines
2019-08-14riscv: defconfig: Update the defconfigAlistair Francis1-0/+2
2019-07-31riscv: defconfig: align RV64 defconfig to the output of "make savedefconfig"Paul Walmsley1-5/+5
2019-07-01riscv: defconfig: enable SOC_SIFIVELoys Ollivier1-5/+1
2019-07-01RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERSAnup Patel1-0/+2
2019-06-26RISC-V: defconfig: enable MMC & SPI for RISC-VAtish Patra1-0/+5
2019-06-11RISC-V: defconfig: enable clocks, serial consoleKevin Hilman1-0/+4
2019-01-24RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=yPalmer Dabbelt1-0/+1
2019-01-24RISC-V: defconfig: Enable Generic PCIE by defaultAlistair Francis1-1/+2
2019-01-23RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX}Palmer Dabbelt1-2/+2
2018-12-17RISC-V: defconfig: Enable RISC-V SBI earlycon supportAnup Patel1-0/+1
2018-11-13RISC-V: defconfig: Enable printk timestampsAnup Patel1-0/+1
2018-11-02RISC-V: refresh defconfigAnup Patel1-8/+8
2018-08-13irqchip: add a SiFive PLIC driverChristoph Hellwig1-0/+1
2018-06-11RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfigPalmer Dabbelt1-0/+1
2018-04-03RISC-V: Enable module support in defconfigZong Li1-0/+2
2018-01-08RISC-V: Add a basic defconfigKarsten Merker1-0/+75
2017-09-27RISC-V: Build InfrastructurePalmer Dabbelt1-0/+0