| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
| 2019-05-17 | RISC-V: Access CSRs using CSR numbers | Anup Patel | 1 | -7/+25 |
| 2019-05-17 | RISC-V: Add interrupt related SCAUSE defines in asm/csr.h | Anup Patel | 1 | -4/+17 |
| 2019-05-17 | RISC-V: Use tabs to align macro values in asm/csr.h | Anup Patel | 1 | -38/+38 |
| 2018-08-13 | RISC-V: add a definition for the SIE SEIE bit | Christoph Hellwig | 1 | -0/+1 |
| 2018-01-31 | riscv: rename sptbr to satp | Christoph Hellwig | 1 | -7/+7 |
| 2018-01-08 | riscv: rename SR_* constants to match the spec | Christoph Hellwig | 1 | -4/+4 |
| 2017-09-27 | RISC-V: Generic library routines and assembly | Palmer Dabbelt | 1 | -0/+132 |
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index : BMC/Intel-BMC/linux.git | |
| Intel OpenBMC Linux kernel source tree (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |