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path: root/arch/riscv/lib
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2020-01-19riscv: Less inefficient gcc tishift helpers (and export their symbols)Olof Johansson1-18/+57
2019-12-28riscv: fix compile failure with EXPORT_SYMBOL() & !MMULuc Van Oostenryck1-0/+4
2019-11-18riscv: add nommu supportChristoph Hellwig1-6/+5
2019-11-05riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig1-6/+6
2019-08-30riscv: Using CSR numbers to access CSRsBin Meng1-6/+6
2019-08-09RISC-V: Remove udivdi3Palmer Dabbelt2-34/+0
2019-08-09riscv: delay: use do_div() instead of __udivdi3()Paul Walmsley1-1/+5
2019-06-17Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-1/+1
2019-06-11riscv: Fix udelay in RV32.Nick Hu1-1/+1
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286Thomas Gleixner5-45/+5
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2018-12-21RISC-V: lib: minor asm cleanupOlof Johansson2-48/+53
2018-11-13RISC-V: lib: Fix build error for 64-bitOlof Johansson1-1/+1
2018-10-23RISC-V: Build tishift only on 64-bitZong Li1-1/+2
2018-08-13RISC-V: implement __lshrti3.Alex Guo2-0/+43
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt1-2/+4
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck1-2/+4
2018-06-04riscv: Fix the bug in memory access fixup codeAlan Kao1-4/+9
2017-11-30RISC-V: Export some expected symbols for modulesOlof Johansson1-0/+1
2017-09-27RISC-V: Build InfrastructurePalmer Dabbelt1-0/+6
2017-09-27RISC-V: Device, timer, IRQs, and the SBIPalmer Dabbelt1-0/+110
2017-09-27RISC-V: Generic library routines and assemblyPalmer Dabbelt4-0/+390