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AgeCommit message (Expand)AuthorFilesLines
2018-12-05x86/function_graph: Simplify with function_graph_enter()Steven Rostedt (VMware)1-14/+1
2018-12-05perf/x86/intel: Disallow precise_ip on BTS eventsJiri Olsa1-0/+4
2018-12-05perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts()Jiri Olsa2-18/+12
2018-12-05perf/x86/intel: Move branch tracing setup to the Intel-specific source fileJiri Olsa2-21/+40
2018-12-05x86/fpu: Disable bottom halves while loading FPU registersSebastian Andrzej Siewior1-2/+2
2018-12-05x86/MCE/AMD: Fix the thresholding machinery initialization orderBorislav Petkov1-13/+6
2018-12-05KVM: VMX: re-add ple_gap module parameterLuiz Capitulino1-0/+1
2018-12-05KVM: X86: Fix scan ioapic use-before-initializationWanpeng Li1-1/+2
2018-12-05KVM: LAPIC: Fix pv ipis use-before-initializationWanpeng Li1-0/+5
2018-12-05KVM: x86: Fix kernel info-leak in KVM_HC_CLOCK_PAIRING hypercallLiran Alon1-0/+1
2018-12-05KVM: nVMX/nSVM: Fix bug which sets vcpu->arch.tsc_offset to L1 tsc_offsetLeonid Shatz4-18/+17
2018-12-05kvm: svm: Ensure an IBPB on all affected CPUs when freeing a vmcbJim Mattson1-5/+15
2018-12-05kvm: mmu: Fix race in emulated page table writesJunaid Shahid1-18/+9
2018-12-05x86/speculation: Provide IBPB always command line optionsThomas Gleixner1-11/+23
2018-12-05x86/speculation: Add seccomp Spectre v2 user space protection modeThomas Gleixner2-1/+17
2018-12-05x86/speculation: Enable prctl mode for spectre_v2_userThomas Gleixner1-9/+32
2018-12-05x86/speculation: Add prctl() control for indirect branch speculationThomas Gleixner3-0/+73
2018-12-05x86/speculation: Prepare arch_smt_update() for PRCTL modeThomas Gleixner1-21/+25
2018-12-05x86/speculation: Prevent stale SPEC_CTRL msr contentThomas Gleixner4-18/+40
2018-12-05x86/speculation: Split out TIF updateThomas Gleixner1-12/+23
2018-12-05x86/speculation: Prepare for conditional IBPB in switch_mm()Thomas Gleixner4-35/+118
2018-12-05x86/speculation: Avoid __switch_to_xtra() callsThomas Gleixner2-2/+26
2018-12-05x86/process: Consolidate and simplify switch_to_xtra() codeThomas Gleixner5-22/+37
2018-12-05x86/speculation: Prepare for per task indirect branch speculation controlTim Chen5-5/+41
2018-12-05x86/speculation: Add command line control for indirect branch speculationThomas Gleixner2-17/+126
2018-12-05x86/speculation: Unify conditional spectre v2 print functionsThomas Gleixner1-13/+4
2018-12-05x86/speculataion: Mark command line parser data __initdataThomas Gleixner1-2/+2
2018-12-05x86/speculation: Mark string arrays const correctlyThomas Gleixner1-3/+3
2018-12-05x86/speculation: Reorder the spec_v2 codeThomas Gleixner1-84/+84
2018-12-05x86/l1tf: Show actual SMT stateThomas Gleixner1-2/+3
2018-12-05x86/speculation: Rework SMT state changeThomas Gleixner1-6/+5
2018-12-05x86/Kconfig: Select SCHED_SMT if SMP enabledThomas Gleixner1-7/+1
2018-12-05x86/speculation: Reorganize speculation control MSRs updateTim Chen1-17/+29
2018-12-05x86/speculation: Rename SSBD update functionsThomas Gleixner3-11/+11
2018-12-05x86/speculation: Disable STIBP when enhanced IBRS is in useTim Chen1-0/+7
2018-12-05x86/speculation: Move STIPB/IBPB string conditionals out of cpu_show_common()Tim Chen1-2/+18
2018-12-05x86/speculation: Remove unnecessary ret variable in cpu_show_common()Tim Chen1-4/+1
2018-12-05x86/speculation: Clean up spectre_v2_parse_cmdline()Tim Chen1-14/+13
2018-12-05x86/speculation: Update the TIF_SSBD commentTim Chen1-1/+1
2018-12-05x86/retpoline: Remove minimal retpoline supportZhenzhong Duan2-13/+2
2018-12-05x86/retpoline: Make CONFIG_RETPOLINE depend on compiler supportZhenzhong Duan4-11/+10
2018-12-05x86/speculation: Add RETPOLINE_AMD support to the inline asm CALL_NOSPEC variantZhenzhong Duan1-4/+13
2018-12-05x86/speculation: Propagate information about RSB filling mitigation to sysfsJiri Kosina1-1/+2
2018-12-05x86/speculation: Apply IBPB more strictly to avoid cross-process data leakJiri Kosina1-11/+20
2018-12-05x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigationJiri Kosina1-6/+51
2018-12-01perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUsKan Liang1-1/+114
2018-11-27x86/ldt: Remove unused variable in map_ldt_struct()Kirill A. Shutemov1-8/+0
2018-11-27x86/ldt: Unmap PTEs for the slot before freeing LDT pagesKirill A. Shutemov1-13/+38
2018-11-27x86/mm: Move LDT remap out of KASLR region on 5-level pagingKirill A. Shutemov3-11/+11
2018-11-27x86/earlyprintk: Add a force option for pciserial deviceFeng Tang1-10/+19
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