index
:
BMC/Intel-BMC/linux.git
dev
dev-4.10
dev-4.13
dev-4.17
dev-4.18
dev-4.19
dev-4.3
dev-4.4
dev-4.6
dev-4.7
dev-5.0
dev-5.1
dev-5.10-intel
dev-5.10.46-intel
dev-5.10.49-intel
dev-5.14-intel
dev-5.15-intel
dev-5.2
dev-5.3
dev-5.4
dev-5.7
dev-5.8
dev-5.8-intel
master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
xtensa
/
include
/
asm
/
cacheflush.h
Age
Commit message (
Expand
)
Author
Files
Lines
2015-11-09
xtensa: support DMA to high memory
Max Filippov
1
-3
/
+8
2015-11-03
Revert "xtensa: cache inquiry and unaligned cache handling functions"
Max Filippov
1
-95
/
+0
2014-10-21
xtensa: nommu: don't build most of the cache flushing code
Max Filippov
1
-2
/
+3
2014-10-21
xtensa: nommu: provide __invalidate_dcache_page_alias stub
Max Filippov
1
-0
/
+2
2014-08-14
xtensa: implement clear_user_highpage and copy_user_highpage
Max Filippov
1
-0
/
+2
2014-01-14
xtensa: add SMP support
Max Filippov
1
-15
/
+25
2012-12-19
xtensa: clean up files to make them code-style compliant
Chris Zankel
1
-1
/
+2
2012-10-16
xtensa: reorganize SR referencing
Max Filippov
1
-1
/
+1
2010-05-02
xtensa: Fix FLUSH_DCACHE macro for some variants.
Chris Zankel
1
-0
/
+1
2009-11-26
block: add helpers to run flush_dcache_page() against a bio and a request's p...
Ilya Loginov
1
-0
/
+1
2009-06-22
xtensa: cache inquiry and unaligned cache handling functions
Oskar Schirmer
1
-0
/
+95
2009-04-03
xtensa: nommu support
Johannes Weiner
1
-3
/
+7
2008-11-06
xtensa: move headers files to arch/xtensa/include
Chris Zankel
1
-0
/
+155