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BMC/Intel-BMC/linux.git
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dev-5.2
dev-5.3
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
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drivers
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clk
/
rockchip
Age
Commit message (
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)
Author
Files
Lines
2020-11-29
clk: rockchip: fix i2s gate bits on rk3066 and rk3188
Johan Jonker
1
-3
/
+4
2020-11-29
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks
Johan Jonker
1
-14
/
+14
2020-11-29
clk: rockchip: Remove redundant null check before clk_prepare_enable
Xu Wang
1
-2
/
+1
2020-10-26
clk: rockchip: Add appropriate arch dependencies
Robin Murphy
1
-1
/
+11
2020-10-22
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
8
-85
/
+231
2020-10-08
clk: rockchip: Initialize hw to error to avoid undefined behavior
Stephen Boyd
1
-1
/
+1
2020-09-22
clk: rockchip: rk3399: Support module build
Elaine Zhang
2
-1
/
+57
2020-09-22
clk: rockchip: fix the clk config to support module build
Elaine Zhang
2
-20
/
+100
2020-09-22
clk: rockchip: Export some clock common APIs for module drivers
Elaine Zhang
1
-22
/
+30
2020-09-22
clk: rockchip: Export rockchip_register_softrst()
Elaine Zhang
1
-3
/
+4
2020-09-22
clk: rockchip: Export rockchip_clk_register_ddrclk()
Elaine Zhang
1
-0
/
+1
2020-09-22
clk: rockchip: Use clk_hw_register_composite instead of clk_register_composit...
Elaine Zhang
2
-39
/
+40
2020-09-22
clk: rockchip: rk3308: drop unused mux_timer_src_p
Krzysztof Kozlowski
1
-1
/
+0
2020-08-19
clk: rockchip: Fix initialization of mux_pll_src_4plls_p
Nathan Chancellor
1
-1
/
+1
2020-07-22
clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks
Alex Bee
1
-0
/
+1
2020-07-08
clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"
Robin Murphy
1
-4
/
+4
2020-07-05
clk: rockchip: use separate compatibles for rk3288w-cru
Heiko Stuebner
1
-2
/
+19
2020-06-17
clk: rockchip: Handle clock tree for rk3288w variant
Mylène Josserand
1
-2
/
+18
2020-06-15
clk: rockchip: convert rk3036 pll type to use internal lock status
Heiko Stuebner
1
-3
/
+23
2020-06-15
clk: rockchip: convert basic pll lock_wait to use regmap_read_poll_timeout
Heiko Stuebner
1
-15
/
+6
2020-06-15
clk: rockchip: convert rk3399 pll type to use readl_relaxed_poll_timeout
Heiko Stuebner
1
-11
/
+12
2020-04-13
clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks
Justin Swartz
1
-13
/
+4
2020-03-06
clk: rockchip: fix mmc get phase
Jerome Brunet
1
-2
/
+2
2019-12-24
clk: let init callback return an error code
Jerome Brunet
1
-11
/
+17
2019-11-05
clk: rockchip: protect the pclk_usb_grf as critical on px30
Heiko Stuebner
1
-1
/
+2
2019-11-05
clk: rockchip: add video-related niu clocks as critical on px30
Heiko Stuebner
1
-5
/
+10
2019-11-05
clk: rockchip: move px30 critical clocks to correct clock controller
Heiko Stuebner
1
-4
/
+4
2019-11-05
clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc
Finley Xiao
1
-4
/
+40
2019-10-31
clk: rockchip: make clk_half_divider_ops static
Ben Dooks (Codethink)
1
-2
/
+1
2019-09-05
clk: rockchip: Add clock controller for the rk3308
Finley Xiao
3
-0
/
+969
2019-07-25
clk: rockchip: Fix -Wunused-const-variable in rv1108 clk driver
Nathan Huckleberry
1
-1
/
+0
2019-07-17
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
8
-46
/
+27
2019-06-27
clk: rockchip: export HDMIPHY clock on rk3228
Heiko Stuebner
1
-1
/
+1
2019-06-27
clk: rockchip: add watchdog pclk on rk3328
Heiko Stuebner
1
-0
/
+3
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2019-06-15
clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macro
Heiko Stuebner
4
-36
/
+12
2019-06-14
clk: rockchip: add a type from SGRF-controlled gate clocks
Heiko Stuebner
1
-0
/
+4
2019-06-06
clk: rockchip: Remove 48 MHz PLL rate from rk3288
Douglas Anderson
1
-1
/
+0
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Thomas Gleixner
1
-11
/
+1
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Thomas Gleixner
17
-170
/
+17
2019-05-20
clk: rockchip: add 1.464GHz cpu-clock rate to rk3228
Justin Swartz
1
-0
/
+1
2019-05-20
clk: rockchip: Slightly more accurate math in rockchip_mmc_get_phase()
Douglas Anderson
1
-3
/
+3
2019-05-20
clk: rockchip: Don't yell about bad mmc phases when getting
Douglas Anderson
1
-3
/
+1
2019-05-20
clk: rockchip: Use clk_hw_get_rate() in MMC phase calculation
Douglas Anderson
1
-2
/
+2
2019-05-15
clk: Remove io.h from clk-provider.h
Stephen Boyd
12
-1
/
+13
2019-05-07
Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' a...
Stephen Boyd
4
-26
/
+60
2019-04-23
clk: core: replace clk_{readl,writel} with {readl,writel}
Jonas Gorski
2
-4
/
+4
2019-04-23
clk: rockchip: undo several noc and special clocks as critical on rk3288
Douglas Anderson
1
-9
/
+4
2019-04-12
clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
Finley Xiao
2
-3
/
+29
2019-04-12
clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288
Douglas Anderson
1
-0
/
+11
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