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BMC/Intel-BMC/linux.git
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
display
/
intel_cdclk.c
Age
Commit message (
Expand
)
Author
Files
Lines
2021-06-09
drm/i915/adl_p: CDCLK crawl support for ADL
Stanislav Lisovskiy
1
-9
/
+63
2021-06-08
drm/i915: Disable PSR around cdclk changes
Ville Syrjälä
1
-0
/
+13
2021-05-15
drm/i915/display/adl_p: Implement Wa_22011320316
José Roberto de Souza
1
-1
/
+20
2021-05-15
drm/i915: Move intel_modeset_all_pipes()
Ville Syrjälä
1
-38
/
+0
2021-05-15
drm/i915/adl_p: Add cdclk support for ADL-P
Anusha Srivatsa
1
-13
/
+28
2021-05-05
drm/i915: Use intel_de_wait_for_*() in cnl+ cdclk programming
Ville Syrjälä
1
-6
/
+4
2021-05-05
drm/i915: Use intel_de_rmw() in bxt/glk/cnl+ cdclk programming
Ville Syrjälä
1
-10
/
+4
2021-05-05
drm/i915: Use intel_de_rmw() in skl cdclk programming
Ville Syrjälä
1
-14
/
+11
2021-05-05
drm/i915: Use intel_de_rmw() in bdw cdclk programming
Ville Syrjälä
1
-11
/
+6
2021-05-05
drm/i915: Extract some helpers to compute cdclk register values
Ville Syrjälä
1
-98
/
+88
2021-05-05
drm/i915: Don't include intel_de.h from intel_display_types.h
Ville Syrjälä
1
-0
/
+1
2021-04-14
drm/i915/display: rename display version macros
Lucas De Marchi
1
-9
/
+9
2021-04-14
drm/i915/display: Eliminate IS_GEN9_{BC,LP}
Matt Roper
1
-16
/
+18
2021-03-24
drm/i915/display: Simplify GLK display version tests
Matt Roper
1
-12
/
+14
2021-03-24
drm/i915/display: Eliminate most usage of INTEL_GEN()
Matt Roper
1
-29
/
+29
2021-03-24
drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGE
Matt Roper
1
-2
/
+2
2021-02-05
drm/i915: Index min_{cdclk,voltage_level}[] with pipe
Ville Syrjälä
1
-4
/
+4
2021-02-02
drm/i915: Remove references to struct drm_device.pdev
Thomas Zimmermann
1
-7
/
+7
2020-12-04
drm/i915: Add intel_atomic_add_affected_planes()
Ville Syrjälä
1
-2
/
+1
2020-12-01
drm/i915/cdclk: prefer intel_de_write() over I915_WRITE()
Jani Nikula
1
-2
/
+2
2020-10-16
drm/i915/rkl: Add new cdclk table
Matt Roper
1
-1
/
+31
2020-10-14
drm/i915/jsl: Split EHL/JSL platform info and PCI ids
Tejas Upadhyay
1
-2
/
+2
2020-10-07
drm/i915/dg1: Initialize RAWCLK properly
Matt Roper
1
-1
/
+15
2020-09-17
drm/i915: Nuke force_min_cdclk_changed
Ville Syrjälä
1
-1
/
+1
2020-09-08
Merge tag 'v5.9-rc4' into drm-next
Dave Airlie
1
-5
/
+5
2020-08-24
treewide: Use fallthrough pseudo-keyword
Gustavo A. R. Silva
1
-5
/
+5
2020-08-17
drm/i915: Make i830 .get_cdclk() assignment less confusing
Ville Syrjälä
1
-4
/
+5
2020-08-17
drm/i915: Fix some whitespace
Ville Syrjälä
1
-1
/
+1
2020-07-03
drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8K
Stanislav Lisovskiy
1
-2
/
+9
2020-06-08
Revert "drm/i915: Remove unneeded hack now for CDCLK"
Stanislav Lisovskiy
1
-0
/
+12
2020-06-04
drm/i915: Fix wrong CDCLK adjustment changes
Stanislav Lisovskiy
1
-8
/
+11
2020-05-22
drm/i915: Fix includes and local vars order
Stanislav Lisovskiy
1
-1
/
+2
2020-05-22
drm/i915: Remove unneeded hack now for CDCLK
Stanislav Lisovskiy
1
-12
/
+0
2020-05-22
drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
Stanislav Lisovskiy
1
-4
/
+24
2020-05-19
drm/i915: Read out hrawclk on all gen3+ platforms
Ville Syrjälä
1
-24
/
+40
2020-05-19
drm/i915: Document our lackluster FSB frequency readout
Ville Syrjälä
1
-1
/
+10
2020-05-19
drm/i915: Fix 400 MHz FSB readout on elk
Ville Syrjälä
1
-2
/
+7
2020-03-09
drm/i915: Lock gmbus/aux mutexes while changing cdclk
Ville Syrjälä
1
-0
/
+22
2020-02-23
drm/i915/display/cdclk: Make WARN* drm specific where drm_priv ptr is available
Pankaj Bharadiya
1
-36
/
+48
2020-02-19
drm/i915: Read rawclk_freq earlier
Chris Wilson
1
-9
/
+10
2020-02-11
drm/i915: Fix the docs for intel_set_cdclk_post_plane_update()
Ville Syrjälä
1
-1
/
+1
2020-02-10
drm/i915/tgl: Update cdclk voltage level settings
Matt Roper
1
-1
/
+18
2020-01-31
drm/i915: Store active_pipes bitmask in cdclk state
Ville Syrjälä
1
-9
/
+11
2020-01-31
drm/i915: Convert cdclk to global state
Ville Syrjälä
1
-83
/
+109
2020-01-31
drm/i915: Introduce better global state handling
Ville Syrjälä
1
-4
/
+4
2020-01-31
drm/i915: s/init_cdclk/init_cdclk_hw/
Ville Syrjälä
1
-12
/
+12
2020-01-31
drm/i915: swap() the entire cdclk state
Ville Syrjälä
1
-15
/
+3
2020-01-31
drm/i915: Extract intel_cdclk_state
Ville Syrjälä
1
-77
/
+91
2020-01-31
drm/i915: Simplify intel_set_cdclk_{pre,post}_plane_update() calling convention
Ville Syrjälä
1
-22
/
+22
2020-01-31
drm/i915: s/cdclk_state/cdclk_config/
Ville Syrjälä
1
-211
/
+215
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