diff options
| author | Andrew Geissler <openbmcbump-github@yahoo.com> | 2021-09-21 21:31:17 +0300 |
|---|---|---|
| committer | Andrew Geissler <geissonator@yahoo.com> | 2021-09-23 05:06:18 +0300 |
| commit | b4d1cba25c7a6564ea7789007c2675f738d571a6 (patch) | |
| tree | 9484f2b82f4d3eeb0b56a560b7fd4405baf58f42 | |
| parent | 449954afe3b57ccbe2e292cf80620ca2b85d6a91 (diff) | |
| download | openbmc-b4d1cba25c7a6564ea7789007c2675f738d571a6.tar.xz | |
x86-power-control: srcrev bump 1aa08b2364..61b4a5bf7e
Jason M. Bills (1):
Start the watchdog each time waitForSIOPowerGood is set
Jean-Marie Verdun (2):
Fix gpio logic following parity code insertion
SioPowerGoodAssert check at boot for HPE Proliant
Change-Id: Ie9dcb53cd9249bc5657adc4b4a73da0bf29ed5af
Signed-off-by: Andrew Geissler <openbmcbump-github@yahoo.com>
| -rwxr-xr-x | meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb b/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb index e9bad0698..102b3fcb8 100755 --- a/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb +++ b/meta-phosphor/recipes-x86/chassis/x86-power-control_git.bb @@ -2,7 +2,7 @@ SUMMARY = "Chassis Power Control service for Intel based platforms" DESCRIPTION = "Chassis Power Control service for Intel based platforms" SRC_URI = "git://github.com/openbmc/x86-power-control.git;protocol=ssh" -SRCREV = "1aa08b23645a85c655fe4712fe7bbb81c7f46dfc" +SRCREV = "61b4a5bf7e8e7be92807fcb85a9780075e8893b4" PV = "1.0+git${SRCPV}" |