diff options
| author | Thang Q. Nguyen <thang@os.amperecomputing.com> | 2020-12-23 07:45:53 +0300 |
|---|---|---|
| committer | Brad Bishop <bradleyb@fuzziesquirrel.com> | 2021-02-01 16:44:46 +0300 |
| commit | d76c413d1c8430cb26a5365988521815112e45f5 (patch) | |
| tree | ef4b820a43fbd8b29c3016456c2d4ce228940244 /meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend | |
| parent | 8f221bfb0979fa018f6c16b5af153c1549448e7d (diff) | |
| download | openbmc-d76c413d1c8430cb26a5365988521815112e45f5.tar.xz | |
meta-ampere: u-boot: Disable internal PD resistors for GPIOs
Configure SCU8C - Multi-function pin control 4 to disable internal pull
down resistors for GPIOJ, GPIOG/GPIOAB, GPIOD/GPIOY, GPIOC/GPIOS as
external resistors are already installed.
Tested: scan I2C4 and check devices on the bus are detected
Signed-off-by: Thinh Pham <thinh.pham@amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Change-Id: I5a4b682310b5243830bd9c7a66889b0a52c4770c
Diffstat (limited to 'meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend')
| -rw-r--r-- | meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend index 983dc2400..c40bfcd02 100644 --- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend +++ b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend @@ -2,4 +2,5 @@ FILESEXTRAPATHS_append_mtjade := "${THISDIR}/${PN}:" SRC_URI += " \ file://0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch \ + file://0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch \ " |