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authordheerajpdsk <p.dheeraj.srujan.kumar@intel.com>2022-05-06 02:48:05 +0300
committerGitHub <noreply@github.com>2022-05-06 02:48:05 +0300
commitca8d06bc610af08c2d3efc487aa9519989b743e6 (patch)
treec557da2136640a8ce48439f19fe5f7071faffeca /meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend
parent7cf0c1cd0ce835d1833509b7b911e8a97380278b (diff)
parent18f97faa411078b95d042d207f5fff32bc8ece1d (diff)
downloadopenbmc-ca8d06bc610af08c2d3efc487aa9519989b743e6.tar.xz
Merge pull request #80 from Intel-BMC/updateHEAD1-0.91intel
Update
Diffstat (limited to 'meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend')
-rw-r--r--meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend
index b27f9080b..e4d066bc6 100644
--- a/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend
+++ b/meta-intel-openbmc/meta-common/recipes-x86/chassis/x86-power-control_%.bbappend
@@ -1,2 +1,2 @@
# Use PLT_RST to detect warm resets
-EXTRA_OECMAKE:intel += "-DUSE_PLT_RST=ON"
+EXTRA_OEMESON:intel += "-Duse-plt-rst=enabled"