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| author | Jayanth Othayoth <ojayanth@in.ibm.com> | 2021-08-05 07:11:47 +0300 |
|---|---|---|
| committer | Jayanth Othayoth <ojayanth@in.ibm.com> | 2021-08-09 18:05:00 +0300 |
| commit | aee56c5e5866fa2d6e2f810279654837a74c95a3 (patch) | |
| tree | cef6f994fe61f8eb7de63d09131cb6317b354151 /meta-intel-openbmc | |
| parent | ce7dbecf0facf092f488748b1d9bd7734b88c6d8 (diff) | |
| download | openbmc-aee56c5e5866fa2d6e2f810279654837a74c95a3.tar.xz | |
ekb: srcrev bump 52e5c0038a..c14cb37697
Commit included.
- Release tag & head commit information updated for hw071421a.opmst10
- Gard the clock on CBS_NOT_IN_IDLE_STATE error
- SW528598 - Unmask MCFIR bit 5
- Supporing 48 bit target type for SBE FFDC
- RAS Review: p10_do_fw_hb_istep.xml
- RAS Review: p10_ram_errors.xml
- RAS Review: p10_block_wakeup_intr_errors.xml
- RAS Review: p10_qme_sram_access_errors.xml
- RAS Review: p10_query_core_stop_state.xml
- Release tag & head commit information updated for hw071221a.opmst10
- RAS Review: p10_scomt_errors.xml
- p10_fbc_eff_config -- calculate tsnoop based on core, mc, pau freqs
- RAS Review: p10_query_host_meminfo_errors.xml
- p10_sbe_scrach_regs -- raise DD2 PAU frequency to support high frequency sorts
- Define ATTR_MRW_FREQ_SYSTEM_CORE_FLOOR_MHZ for per system control
- RAS Review: p10_qme_customize_errors.xml
- RAS Review - p10_tod
- Release tag & head commit information updated for hw070921a.opmst10
- Change MFG OMI screen test to use x4 downgrade
- Add null pointer check to FFDC gathering functions
- Release tag & head commit information updated for hw070721a.opmst10
- Minor attribute cleanup
- Minor attribute cleanup
- Add type for MDS Media Controller Device
- Allow multicast targets for target ffdc in fapi error xml
- Add correct FFDC info for RNG regs
- Release tag & head commit information updated for hw070521a.opmst10
- p10_frequency_buckets -- adjust DDR 2933 mesh clock speed constant
- p10_mss_eff_grouping RAS updates
- Release tag & head commit information updated for hw063021a.opmst10
- Using uint8_t variable for CLOCK_POS FFDC
- p10.pci.scan.initfile -- updates for HW 507934
- P10 Dynamic VIO Setpoint
- Release tag & head commit information updated for hw062821a.opmst10
- Adding simple clock detector check
- Fix for defect SW521078
- QME: enable MMA dynamic mode
- Release tag & head commit information updated for hw062521a.opmst10
- PPB HWP: Bug fix in handling unsorted parts
- P10 RAS Review io_init_done, io_lib, io_power, omi_init, omi_train_check
- DD2 updates. For meas seeprom use bkp for all errors as upd is not possible
- Release tag & head commit information updated for hw062321a.opmst10
- p10_sbe_gptr_time_initf -- swap PAUC DTS constants
- Release tag & head commit information updated for hw062121a.opmst10
- Release tag & head commit information updated for hw061821a.opmst10
- DD2 ABUS CCM updates
- RCS Setup Updates
Signed-off-by: Jayanth Othayoth <ojayanth@in.ibm.com>
Change-Id: Ic5b7eb3eca9236d26979fc2e60d498f5e27d6032
Diffstat (limited to 'meta-intel-openbmc')
0 files changed, 0 insertions, 0 deletions