Update to internal 0.74

Signed-off-by: Jason M. Bills <jason.m.bills@linux.intel.com>

4 files changed, 99 insertions, 93 deletions

diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT-reset-mask-to-reset-needed-controller.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT-reset-mask-to-reset-needed-controller.patch
deleted file mode 100644
index b68975c40..000000000
--- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT-reset-mask-to-reset-needed-controller.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 5179bc2cba159b9167fee90a2c6a7ea2824df8ad Mon Sep 17 00:00:00 2001
-From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
-Date: Thu, 18 Jun 2020 05:32:48 +0530
-Subject: [PATCH] Apply WDT reset mask to reset needed controller
-
-Issue:
-Whenever BIOS and BMC warm reset happens at a time.
-BIOS is not booting.
-
-Root caused:
-BMC resetting the LPC controller during BMC warm reset.
-Which cause BIOS hang as BIOS cannot dump the BIOS serial data.
-
-Fix:
-WDT reset mask has been updated from default to proper value,
-such that controllers interacting with host will not be reset
-during wdt reset operation.
-This was missed earlier, causing BIOS to hang whenever BMC resets,
-as BIOS was accessing the serial port (LPC controller).
-De-coupling LPC controller will make sure BIOS serial port access
-is not disturbed.
-Reset mask is updated not to reset the following controllers
-additionally on the default mask setting.
-1. LPC controller
-2. PWM controller
-3. GPIO controller
-
-Quick Step to reproduce:
-Stop the BMC in uboot and add below bootcmd command
-setenv bootcmd "reset"
-Do the System power ON or System warm reset.
-
-Tested:
-1. Ran overnight continous BIOS and BMC warm reset on two SUTs.
-
-2. Ran the TestApp which dump the BIOS serial port continously and
-do the BMC reset.
-
-3. Stop the BMC in uboot and add below bootcmd command
-setenv bootcmd "reset"
-Do the System Power ON or System warm reset.
-
-Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
-Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
----
- arch/arm/mach-aspeed/ast2600/platform.S | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S
-index d881ba8565f2..68eb0000922a 100644
---- a/arch/arm/mach-aspeed/ast2600/platform.S
-+++ b/arch/arm/mach-aspeed/ast2600/platform.S
-@@ -66,6 +66,9 @@
- #define AST_MAC2_BASE		(0x1E680000)
- #define AST_MAC2_CTRL2		(AST_MAC2_BASE + 0x058)
- 
-+#define AST_WDT1_BASE		0x1E785000
-+#define AST_WDT1_RESET_MASK2	(AST_WDT1_BASE + 0x020)
-+
- #define AST_GPIO_BASE		(0x1E780000)
- #define AST_GPIOYZ_DATA_VALUE	(AST_GPIO_BASE + 0x1E0)
- 
-@@ -264,6 +267,12 @@ wait_lock:
- 	str	r1, [r0]
- 
- 1:
-+	/* disable LPC, PWM and GPIO2 resets on WDT1 reset */
-+	ldr	r0, =AST_WDT1_RESET_MASK2
-+	ldr	r1, [r0]
-+	bic	r1, #0x2A00
-+	str	r1, [r0]
-+
- 	/* release display port reset */
- 	ldr	r0, =AST_SCU_SYSRST_CTRL_CLR
- 	movw	r1, #0x0000
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch
new file mode 100644
index 000000000..e7af35ff8
--- /dev/null
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch
@@ -0,0 +1,98 @@
+From fa401cd64965d506ddeb94fd47eb694a8f2a3862 Mon Sep 17 00:00:00 2001
+From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
+Date: Thu, 18 Jun 2020 05:32:48 +0530
+Subject: [PATCH] Apply WDT1-2 reset mask to reset needed controller
+
+Issue:
+BMC reset during BIOS serial port access causes BIOS hang.
+
+Root caused:
+BMC resetting the LPC controller during BMC warm reset.
+Which cause BIOS hang as BIOS cannot dump the BIOS serial data.
+
+Fix:
+WDT reset mask has been updated from default to proper value,
+such that controllers interacting with host will not be reset
+during wdt reset operation.
+This was missed earlier, causing BIOS to hang whenever BMC resets,
+as BIOS was accessing the serial port (LPC controller).
+De-coupling LPC controller will make sure BIOS serial port access
+is not disturbed.
+And also Reset mask is updated not to reset the following
+additionally on the default mask setting.
+1. LPC controller
+2. PWM controller
+
+Quick Step to reproduce:
+ Stop the BMC in uboot and add below bootcmd command
+ setenv bootcmd "reset"
+ Do the System power ON or System warm reset.
+
+ For WDT2:
+ boot the BMC and ran the /usr/bin/watch_dog_reset.sh
+ Do the System Power ON or System warm reset.
+
+Tested:
+ 1. Ran overnight continous BIOS and BMC warm reset on two SUTs.
+
+ 2.Ran the TestApp which dump the BIOS serial port continously and
+   do the BMC reset.
+
+ 3.Stop the BMC in uboot and add below bootcmd command
+   setenv bootcmd "reset"
+   Do the System Power ON or System warm reset.
+
+ 4.Ran Over night AC cycle test. Completed +1000 in two systems.
+
+ 5.Stopped at u-boot.
+   Issue protect off all command
+   Issue erase all command.
+   BMC should not hang and able to complete the "erase all" command
+
+Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
+---
+ arch/arm/mach-aspeed/ast2600/platform.S | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S
+index d881ba8565f2..c77640138653 100644
+--- a/arch/arm/mach-aspeed/ast2600/platform.S
++++ b/arch/arm/mach-aspeed/ast2600/platform.S
+@@ -66,6 +66,14 @@
+ #define AST_MAC2_BASE		(0x1E680000)
+ #define AST_MAC2_CTRL2		(AST_MAC2_BASE + 0x058)
+ 
++#define AST_WDT1_BASE		0x1E785000
++#define AST_WDT1_RESET_MASK1	(AST_WDT1_BASE + 0x01C)
++#define AST_WDT1_RESET_MASK2	(AST_WDT1_BASE + 0x020)
++
++#define AST_WDT2_BASE		0x1E785040
++#define AST_WDT2_RESET_MASK1	(AST_WDT2_BASE + 0x01C)
++#define AST_WDT2_RESET_MASK2	(AST_WDT2_BASE + 0x020)
++
+ #define AST_GPIO_BASE		(0x1E780000)
+ #define AST_GPIOYZ_DATA_VALUE	(AST_GPIO_BASE + 0x1E0)
+ 
+@@ -264,6 +272,18 @@ wait_lock:
+ 	str	r1, [r0]
+ 
+ 1:
++	/* disable LPC and PWM resets on WDT1 reset */
++	ldr	r0, =AST_WDT1_RESET_MASK2
++	ldr	r1, [r0]
++	bic	r1, #0x2800
++	str	r1, [r0]
++
++	/* disable LPC and PWM resets on WDT2 reset */
++	ldr	r0, =AST_WDT2_RESET_MASK2
++	ldr	r1, [r0]
++	bic	r1, #0x2800
++	str	r1, [r0]
++
+ 	/* release display port reset */
+ 	ldr	r0, =AST_SCU_SYSRST_CTRL_CLR
+ 	movw	r1, #0x0000
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
index ce22b2057..c2cf07ab3 100644
--- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
+++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/u-boot-aspeed-sdk_%.bbappend
@@ -25,7 +25,7 @@ SRC_URI_append_intel-ast2600 = " \
     file://0016-Add-system-reset-status-support.patch \
     file://0017-Manufacturing-mode-physical-presence-detection.patch \
     file://0018-Add-a-workaround-to-cover-VGA-memory-size-bug-in-A0.patch \
-    file://0019-Apply-WDT-reset-mask-to-reset-needed-controller.patch \
+    file://0019-Apply-WDT1-2-reset-mask-to-reset-needed-controller.patch \
     file://0020-Add-BMC-running-indicator-LED-control.patch \
     file://0022-Reboot-into-UBOOT-on-Watchdog-Failures.patch \
     "
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-phosphor/configuration/entity-manager/AC-Baseboard.json b/meta-openbmc-mods/meta-ast2600/recipes-phosphor/configuration/entity-manager/AC-Baseboard.json
index add4ca372..0ec6c3611 100644
--- a/meta-openbmc-mods/meta-ast2600/recipes-phosphor/configuration/entity-manager/AC-Baseboard.json
+++ b/meta-openbmc-mods/meta-ast2600/recipes-phosphor/configuration/entity-manager/AC-Baseboard.json
@@ -616,20 +616,6 @@
             "Type": "FanRedundancy"
         },
         {
-            "Direction": "Input",
-            "Index": 214,
-            "Name": "SMI Input",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 218,
-            "Name": "ID Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
             "Name": "System Fan connector 1",
             "Pwm": 0,
             "Tachs": [