Update 4-15-19

Signed-off-by: Ed Tanous <ed.tanous@intel.com>
author: Ed Tanous <ed.tanous@intel.com> 2019-04-15 23:42:44 +0300
committer: Ed Tanous <ed.tanous@intel.com> 2019-04-17 19:13:25 +0300
commit: 816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5 (patch)
tree: 341534fed9a2de460ded7f8231ca1cbb178bb2ca /meta-openbmc-mods
parent: a75bff085ba9443315222231c42692745e5781e9 (diff)
download: openbmc-816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5.tar.xz
110 files changed, 5526 insertions, 6500 deletions
diff --git a/meta-openbmc-mods/conf/layer.conf b/meta-openbmc-mods/conf/layer.conf
index 9cc62fc6a..35c801089 100644
--- a/meta-openbmc-mods/conf/layer.conf
+++ b/meta-openbmc-mods/conf/layer.conf
@@ -3,12 +3,12 @@ BBPATH .= ":${LAYERDIR}"
 
 # We have recipes-* directories, add to BBFILES
 BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
-	${LAYERDIR}/recipes-*/*/*.bbappend"
+        ${LAYERDIR}/recipes-*/*/*.bbappend"
 
-BBFILE_COLLECTIONS += "intel"
-BBFILE_PATTERN_intel = "^${LAYERDIR}/"
-BBFILE_PRIORITY_intel = "5"
-LAYERSERIES_COMPAT_intel = "thud"
+BBFILE_COLLECTIONS += "intel-openbmc"
+BBFILE_PATTERN_intel-openbmc = "^${LAYERDIR}/"
+BBFILE_PRIORITY_intel-openbmc = "5"
+LAYERSERIES_COMPAT_intel-openbmc = "warrior"
 
 IMAGE_FEATURES[validitems] += "tools-sdk tools-debug"
 
diff --git a/meta-openbmc-mods/conf/machine/include/intel.inc b/meta-openbmc-mods/conf/machine/include/intel.inc
index 20ca34a66..9fedc33e7 100644
--- a/meta-openbmc-mods/conf/machine/include/intel.inc
+++ b/meta-openbmc-mods/conf/machine/include/intel.inc
@@ -9,7 +9,7 @@ OBMC_MACHINE_FEATURES += "\
         "
 
 VIRTUAL-RUNTIME_skeleton_workbook = "${MACHINE}-config"
-
+VIRTUAL-RUNTIME_obmc-inventory-manager = "entity-manager"
 VIRTUAL-RUNTIME_obmc-led-monitor = ""
 
 PREFERRED_PROVIDER_virtual/obmc-host-ipmi-hw = "phosphor-ipmi-kcs"
@@ -18,6 +18,6 @@ PREFERRED_PROVIDER_virtual/obmc-fan-mgmt = "packagegroup-intel-apps"
 PREFERRED_PROVIDER_virtual/obmc-flash-mgmt = "packagegroup-intel-apps"
 PREFERRED_PROVIDER_virtual/obmc-system-mgmt = "packagegroup-intel-apps"
 PREFERRED_PROVIDER_virtual/obmc-host-ctl ?= "obmc-op-control-host"
-PREFERRED_PROVIDER_virtual/obmc-inventory-data ?= "${VIRTUAL-RUNTIME_skeleton_workbook}"
+PREFERRED_PROVIDER_virtual/obmc-inventory-data = "entity-manager"
 PREFERRED_PROVIDER_virtual/phosphor-led-manager-config-native ?= "intel-led-manager-config-native"
 #PREFERRED_PROVIDER_virtual/obmc-gpio-monitor ?= "phosphor-gpio-monitor"
diff --git a/meta-openbmc-mods/meta-common-small/conf/layer.conf b/meta-openbmc-mods/meta-common-small/conf/layer.conf
index 73c015192..666ddbcab 100644
--- a/meta-openbmc-mods/meta-common-small/conf/layer.conf
+++ b/meta-openbmc-mods/meta-common-small/conf/layer.conf
@@ -8,4 +8,4 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
 BBFILE_COLLECTIONS += "common-small"
 BBFILE_PATTERN_common-small = "^${LAYERDIR}/"
 BBFILE_PRIORITY_common-small = "10"
-LAYERSERIES_COMPAT_common-small = "thud"
+LAYERSERIES_COMPAT_common-small = "warrior"
diff --git a/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass b/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass
index 91e699979..24469356f 100644
--- a/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass
+++ b/meta-openbmc-mods/meta-common/classes/image_types_phosphor_auto.bbclass
@@ -20,12 +20,14 @@ IMAGE_TYPES_MASKED += "mtd-auto"
 # Flash characteristics in KB unless otherwise noted
 python() {
     # TODO: find partition list in DTS
-    DTB_FULL_FIT_IMAGE_OFFSETS = [0x80000, 0x2480000]
     d.setVar('FLASH_UBOOT_OFFSET', str(0))
     if d.getVar('IMAGE_TYPE', True) == 'pfr':
         d.setVar('FLASH_SIZE', str(128*1024))
+        DTB_FULL_FIT_IMAGE_OFFSETS = [0x1100000]
     else:
         d.setVar('FLASH_SIZE', str(64*1024))
+        DTB_FULL_FIT_IMAGE_OFFSETS = [0x80000, 0x2480000]
+
     d.setVar('FLASH_RUNTIME_OFFSETS', ' '.join(
         [str(int(x/1024)) for x in DTB_FULL_FIT_IMAGE_OFFSETS]
         )
diff --git a/meta-openbmc-mods/meta-common/conf/layer.conf b/meta-openbmc-mods/meta-common/conf/layer.conf
index 7e61bfd50..03226a8ed 100644
--- a/meta-openbmc-mods/meta-common/conf/layer.conf
+++ b/meta-openbmc-mods/meta-common/conf/layer.conf
@@ -3,9 +3,9 @@ BBPATH .= ":${LAYERDIR}"
 
 # We have recipes-* directories, add to BBFILES
 BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
-	${LAYERDIR}/recipes-*/*/*.bbappend"
+        ${LAYERDIR}/recipes-*/*/*.bbappend"
 
 BBFILE_COLLECTIONS += "common"
 BBFILE_PATTERN_common = "^${LAYERDIR}/"
 BBFILE_PRIORITY_common = "10"
-LAYERSERIES_COMPAT_common = "thud"
+LAYERSERIES_COMPAT_common = "warrior"
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch
index b96211118..2ed297a96 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch
@@ -1,4 +1,4 @@
-From 5f2a7c03c877454eb78a406934abf6b7d05e40a6 Mon Sep 17 00:00:00 2001
+From 0039c15251a7fcf60154d59933a11d9e17b04d5c Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Thu, 6 Dec 2018 18:49:04 -0800
 Subject: [PATCH] Add support for Macronix and Micron 1Gbits SPI flash
@@ -7,27 +7,25 @@ Quick fix to support Macronix and Micron 1Gbits SPI.
 
 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 ---
- arch/arm/mach-aspeed/flash.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
+ arch/arm/mach-aspeed/flash.c | 33 ++++++++++++++++++++++++++++++++-
+ 1 file changed, 32 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/mach-aspeed/flash.c b/arch/arm/mach-aspeed/flash.c
-index f9f1345523d4..abc0420176a6 100644
+index dece4315d755..2a31b6503a22 100644
 --- a/arch/arm/mach-aspeed/flash.c
 +++ b/arch/arm/mach-aspeed/flash.c
-@@ -79,6 +79,8 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];		/* FLASH chips info */
+@@ -79,6 +79,7 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];		/* FLASH chips info */
  #define MX25L12805D		0x1820C2
  #define MX25L25635E		0x1920C2
  #define MX66L51235F		0x1A20C2
 +#define MX66L1G45G		0x1B20C2
-+#define MT25QL01GB		0x21BA20
  #define SST25VF016B		0x4125bf
  #define SST25VF064C		0x4b25bf
  #define SST25VF040B		0x8d25bf
-@@ -977,6 +979,36 @@ static ulong flash_get_size (ulong base, flash_info_t *info)
+@@ -978,6 +979,35 @@ static ulong flash_get_size (ulong base, flash_info_t *info)
  #endif
  			break;
  
-+		case MT25QL01GB:
 +		case MX66L1G45G:
 +			erase_region_size  = 0x10000;
 +			info->readcmd = 0x0b;
@@ -60,6 +58,16 @@ index f9f1345523d4..abc0420176a6 100644
  		case MX25L12805D:
  			info->sector_count = 256;
  			info->size = 0x1000000;
+@@ -1093,7 +1123,8 @@ static ulong flash_get_size (ulong base, flash_info_t *info)
+ 			info->readcmd = 0x0b;
+ 			info->dualport = 0;
+ 			info->dummybyte = 1;
+-			info->buffersize = 1;
++			info->buffersize = 256;
++			info->address32 = 1;
+ 			WriteClk = 50;
+ 			EraseClk = 25;
+ 			ReadClk  = 50;
 -- 
 2.7.4
 
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch
index 814a7dc2a..2e541561a 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0020-Add-system-reset-status-support.patch
@@ -1,6 +1,6 @@
-From d0338f68edb7f818b45ee43765cf124c14ccae03 Mon Sep 17 00:00:00 2001
+From 06445210bfda7f9bbbb36133e6818575bd6a0cc1 Mon Sep 17 00:00:00 2001
 From: Yong Li <yong.b.li@linux.intel.com>
-Date: Tue, 22 Jan 2019 16:15:36 +0800
+Date: Tue, 9 Apr 2019 14:42:05 +0800
 Subject: [PATCH] Add system reset status support
 
 Will display the reset reasons and other CPU information in u-boot,
@@ -9,25 +9,12 @@ for applications to query.
 
 Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
 ---
- arch/arm/include/asm/arch-aspeed/ast_scu.h  |  1 +
  arch/arm/include/asm/arch-aspeed/platform.h |  2 ++
- arch/arm/mach-aspeed/ast-scu.c              | 55 +++++++++++++++++++++++++++++
- board/aspeed/ast-g5/ast-g5-intel.c          | 30 ++++++++++++++++
- board/aspeed/ast-g5/ast-g5.c                |  7 ++++
- 5 files changed, 95 insertions(+)
+ arch/arm/mach-aspeed/ast-scu.c              |  4 ++++
+ board/aspeed/ast-g5/ast-g5-intel.c          | 30 +++++++++++++++++++++++++++++
+ board/aspeed/ast-g5/ast-g5.c                |  7 +++++++
+ 4 files changed, 43 insertions(+)
 
-diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-index c10e6a9..369c4e3 100644
---- a/arch/arm/include/asm/arch-aspeed/ast_scu.h
-+++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-@@ -37,6 +37,7 @@ extern void ast_scu_get_who_init_dram(void);
- 
- extern u32 ast_get_clk_source(void);
- extern u32 ast_get_h_pll_clk(void);
-+extern u32 ast_get_m_pll_clk(void);
- extern u32 ast_get_ahbclk(void);
- 
- extern u32 ast_scu_get_vga_memsize(void);
 diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h
 index 3b06e52..4e4140d 100644
 --- a/arch/arm/include/asm/arch-aspeed/platform.h
@@ -42,82 +29,10 @@ index 3b06e52..4e4140d 100644
  #err "No define for platform.h"
  #endif
 diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
-index 63e9c7c..f4268f3 100644
+index 3a9ba05..976c59b 100644
 --- a/arch/arm/mach-aspeed/ast-scu.c
 +++ b/arch/arm/mach-aspeed/ast-scu.c
-@@ -100,6 +100,7 @@ static struct soc_id soc_map_table[] = {
- 	SOC_ID("AST2510-A1", 0x04010103),
- 	SOC_ID("AST2520-A1", 0x04010203),
- 	SOC_ID("AST2530-A1", 0x04010403),
-+	SOC_ID("AST2500-A2", 0x04030303),
- };
- 
- void ast_scu_init_eth(u8 num)
-@@ -235,6 +236,29 @@ u32 ast_get_h_pll_clk(void)
- 	return clk;
- }
- 
-+u32 ast_get_m_pll_clk(void)
-+{
-+	u32 clk=0;
-+	u32 m_pll_set = ast_scu_read(AST_SCU_M_PLL);
-+
-+	if(m_pll_set & SCU_M_PLL_OFF)
-+		return 0;
-+
-+	// Programming
-+	clk = ast_get_clk_source();
-+	if(m_pll_set & SCU_M_PLL_BYPASS) {
-+		return clk;
-+	} else {
-+		//PD  == SCU20[13:18]
-+		//M  == SCU20[5:12]
-+		//N  == SCU20[0:4]
-+		//mpll =  24MHz * [(M+1) /(N+1)] / (P+1)
-+		clk = ((clk * (SCU_M_PLL_GET_MNUM(m_pll_set) + 1)) / (SCU_M_PLL_GET_NNUM(m_pll_set) + 1))/(SCU_M_PLL_GET_PDNUM(m_pll_set) + 1);
-+	}
-+	debug("m_pll = %d\n",clk);
-+	return clk;
-+}
-+
- u32 ast_get_ahbclk(void)
- {
- 	unsigned int axi_div, ahb_div, hpll;
-@@ -304,6 +328,33 @@ u32 ast_get_h_pll_clk(void)
- 	return clk;
- }
- 
-+u32 ast_get_m_pll_clk(void)
-+{
-+	u32 clk=0;
-+	u32 m_pll_set = ast_scu_read(AST_SCU_M_PLL);
-+
-+	if(m_pll_set & SCU_M_PLL_OFF)
-+		return 0;
-+
-+	// Programming
-+	clk = ast_get_clk_source();
-+	if(m_pll_set & SCU_M_PLL_BYPASS) {
-+		return clk;
-+	} else {
-+		//OD == SCU24[4]
-+		//OD = SCU_M_PLL_GET_DIV(h_pll_set);
-+		//Numerator == SCU24[10:5]
-+		//num = SCU_M_PLL_GET_NUM(h_pll_set);
-+		//Denumerator == SCU24[3:0]
-+		//denum = SCU_M_PLL_GET_DENUM(h_pll_set);
-+
-+		//hpll = 24MHz * (2-OD) * ((Numerator+2)/(Denumerator+1))
-+		clk = (clk * (2-SCU_M_PLL_GET_DIV(m_pll_set)) * ((SCU_M_PLL_GET_NUM(m_pll_set)+2)/(SCU_M_PLL_GET_DENUM(m_pll_set)+1)));
-+	}
-+	debug("m_pll = %d\n",clk);
-+	return clk;
-+}
-+
- u32 ast_get_ahbclk(void)
- {
- 	unsigned int div, hpll;
-@@ -452,6 +503,9 @@ void ast_scu_sys_rest_info(void)
+@@ -494,6 +494,9 @@ void ast_scu_sys_rest_info(void)
  {
  	u32 rest = ast_scu_read(AST_SCU_SYS_CTRL);
  
@@ -127,7 +42,7 @@ index 63e9c7c..f4268f3 100644
  	if (rest & SCU_SYS_EXT_RESET_FLAG) {
  		printf("RST : External\n");
  		ast_scu_write(SCU_SYS_EXT_RESET_FLAG, AST_SCU_SYS_CTRL);
-@@ -464,6 +518,7 @@ void ast_scu_sys_rest_info(void)
+@@ -506,6 +509,7 @@ void ast_scu_sys_rest_info(void)
  	} else {
  		printf("RST : CLK en\n");
  	}
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch
new file mode 100644
index 000000000..79028d2a1
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-KCS-driver-support-in-uBoot.patch
@@ -0,0 +1,620 @@
+From 16209364c27a0cb7e2b7fdd445942f68e9180263 Mon Sep 17 00:00:00 2001
+From: AppaRao Puli <apparao.puli@linux.intel.com>
+Date: Wed, 13 Mar 2019 14:28:05 +0530
+Subject: [PATCH] KCS driver support in uBoot
+
+Added KCS support in uBoot. This will enable
+KCS channels and set the specified registers
+to do KCS communication in uBoot. It also
+consist of read and write KCS message transations
+work flow implementation( As specified in IPMI
+specification Section 9.15). It is enabled
+only when Force Firmware Update Jumper is ON.
+
+Tested By:
+Stopped booting in uBoot and sent IPMI commands
+via KCS interfaces using cmdtool.efi.
+ - Get Device ID:
+    Req: cmdtool.efi 20 18 1
+    Res: 00 23 00 12 03 02 BF 57 01 00 7B 00 00 00 00 00
+ - Get Self Test Results
+    Req: cmdtool.efi 20 18 4
+    Res: 00 56 00
+ - All other commands
+    Req: cmdtool.efi 20 18 2
+    Res: C1 (Invalid).
+
+Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
+---
+ board/aspeed/ast-g5/Makefile       |   1 +
+ board/aspeed/ast-g5/ast-g5-intel.c |   3 +
+ board/aspeed/ast-g5/ast-g5-kcs.c   | 425 +++++++++++++++++++++++++++++++++++++
+ board/aspeed/ast-g5/ast-g5-kcs.h   | 114 ++++++++++
+ 4 files changed, 543 insertions(+)
+ create mode 100644 board/aspeed/ast-g5/ast-g5-kcs.c
+ create mode 100644 board/aspeed/ast-g5/ast-g5-kcs.h
+
+diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile
+index 9022433..05972b9 100644
+--- a/board/aspeed/ast-g5/Makefile
++++ b/board/aspeed/ast-g5/Makefile
+@@ -4,3 +4,4 @@ obj-y += ast-g5-espi.o
+ obj-y += ast-g5-irq.o
+ obj-y += ast-g5-gpio.o
+ obj-y += ast-g5-timer.o
++obj-y += ast-g5-kcs.o
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index f810a40..f9955c7 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -437,6 +437,7 @@ static void pwm_init(void)
+ }
+ 
+ extern void espi_init(void);
++extern void kcs_init(void);
+ void ast_g5_intel(void)
+ {
+ 	pwm_init();
+@@ -446,6 +447,8 @@ void ast_g5_intel(void)
+ 	timer8_init();
+ 	if (intel_force_firmware_jumper_enabled()) {
+ 		id_led_control(GPIO_AMBER_LED, EIDLED_On);
++		kcs_init();
++		/* TODO: need to stop the booting here. */
+ 	} else {
+ 		id_led_control(GPIO_GREEN_LED, EIDLED_On);
+ 	}
+diff --git a/board/aspeed/ast-g5/ast-g5-kcs.c b/board/aspeed/ast-g5/ast-g5-kcs.c
+new file mode 100644
+index 0000000..f983b4a
+--- /dev/null
++++ b/board/aspeed/ast-g5/ast-g5-kcs.c
+@@ -0,0 +1,425 @@
++// SPDX-License-Identifier: GPL-2.0
++// Copyright (c) 2018-2019 Intel Corporation
++
++#include "ast-g5-kcs.h"
++
++#define DEBUG_KCS_ENABLED	0
++#ifdef DEBUG_KCS_ENABLED
++#define DBG_KCS			printf
++#else
++#define DBG_KCS(...)
++#endif
++
++/* TODO: Move to IPMI file. */
++#define IPMI_CC_OK		0x00
++#define IPMI_CC_INVALID		0xC1
++#define IPMI_CC_UNSPECIFIED	0xFF
++
++#define KCS_CHANNEL_NO_3	3
++
++static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 };
++
++static const struct kcs_io_reg ast_kcs_bmc_ioregs[KCS_CHANNEL_MAX] = {
++	{ .idr = LPC_IDR1, .odr = LPC_ODR1, .str = LPC_STR1 },
++	{ .idr = LPC_IDR2, .odr = LPC_ODR2, .str = LPC_STR2 },
++	{ .idr = LPC_IDR3, .odr = LPC_ODR3, .str = LPC_STR3 },
++	{ .idr = LPC_IDR4, .odr = LPC_ODR4, .str = LPC_STR4 }
++};
++
++#define NO_OF_ENABLED_KCS_CHANNELS ARRAY_SIZE(enabled_kcs_channel)
++
++static struct kcs_packet m_kcs_pkt[NO_OF_ENABLED_KCS_CHANNELS];
++
++static u16 read_status(u16 channel_num)
++{
++	return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str);
++}
++
++static void write_status(u16 channel_num, u16 value)
++{
++	writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].str);
++}
++
++static u16 read_data(u16 channel_num)
++{
++	return readl(AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].idr);
++}
++
++static void write_data(u16 channel_num, u16 value)
++{
++	writel(value, AST_LPC_BASE + ast_kcs_bmc_ioregs[channel_num - 1].odr);
++}
++
++static void set_kcs_state(u16 channel_num, u16 state)
++{
++	u16 status = read_status(channel_num);
++
++	status &= ~KCS_STATE_MASK;
++	status |= KCS_STATE(state) & KCS_STATE_MASK;
++	write_status(channel_num, status);
++}
++
++static struct kcs_packet *get_kcs_packet(u16 channel_num)
++{
++	for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) {
++		if (channel_num == enabled_kcs_channel[idx])
++			return &m_kcs_pkt[idx];
++	}
++
++	/* very unlike code hits here. */
++	printf("ERROR: %s error. ChannelNo: %d\n", __func__, channel_num);
++	BUG();
++}
++
++static void kcs_force_abort(u16 channel_num)
++{
++	struct kcs_packet *kcs_pkt = NULL;
++
++	kcs_pkt = get_kcs_packet(channel_num);
++	printf("ERROR: KCS communication aborted (Channel:%d, Error:%d)\n",
++	       channel_num, kcs_pkt->error);
++	set_kcs_state(channel_num, KCS_STATE_ERROR);
++	read_data(channel_num);
++	write_data(channel_num, ZERO_DATA);
++
++	kcs_pkt->phase = KCS_PHASE_ERROR;
++	kcs_pkt->read_req_done = false;
++	kcs_pkt->data_in_idx = 0;
++}
++
++static void init_kcs_packet(u16 channel_num)
++{
++	struct kcs_packet *kcs_pkt = NULL;
++
++	kcs_pkt = get_kcs_packet(channel_num);
++	kcs_pkt->channel = channel_num;
++	kcs_pkt->read_req_done = false;
++	kcs_pkt->phase = KCS_PHASE_IDLE;
++	kcs_pkt->error = KCS_NO_ERROR;
++	kcs_pkt->data_in_idx = 0;
++	kcs_pkt->data_out_idx = 0;
++	kcs_pkt->data_out_len = 0;
++}
++
++static void process_kcs_request(u16 channel_num)
++{
++	struct kcs_packet *kcs_pkt = NULL;
++
++	kcs_pkt = get_kcs_packet(channel_num);
++	if (!kcs_pkt->read_req_done)
++		return;
++
++	DBG_KCS("%s:- chan:%d\n", __func__, channel_num);
++
++#ifdef DEBUG_KCS_ENABLED
++	int i;
++
++	DBG_KCS("Request data(Len:%d): ", kcs_pkt->data_in_idx);
++	for (i = 0; i < kcs_pkt->data_in_idx; i++)
++		DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]);
++	DBG_KCS("\n");
++#endif
++
++	/*
++	 * TODO: Move it to IPMI Command Handler
++	 * Below code is added for timebeing till
++	 * we implement the IPMI command handler.
++	 */
++	kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */
++	kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */
++	kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */
++
++	if (((kcs_pkt->data_in[0] >> 2) == 0x06) &&
++	    (kcs_pkt->data_in[1] == 0x01)) {
++		/* Get Device ID */
++		u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02,
++				     0xBF, 0x57, 0x01, 0x00, 0x7B,
++				     0x00, 0x00, 0x00, 0x00, 0x00 };
++		for (i = 0; i < 15; i++)
++			kcs_pkt->data_out[i + 3] = device_id[i];
++		kcs_pkt->data_out_len = 18;
++	} else if (((kcs_pkt->data_in[0] >> 2) == 0x06) &&
++		   (kcs_pkt->data_in[1] == 0x04)) {
++		/* Get Self Test Results */
++		kcs_pkt->data_out[3] = 0x56;
++		kcs_pkt->data_out[4] = 0x00;
++		kcs_pkt->data_out_len = 5;
++	} else {
++		kcs_pkt->data_out[2] =
++			IPMI_CC_INVALID; /* Invalid or not supported. */
++		kcs_pkt->data_out_len = 3;
++	}
++	/* END: TODO */
++
++#ifdef DEBUG_KCS_ENABLED
++	DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len);
++	for (i = 0; i < kcs_pkt->data_out_len; i++)
++		DBG_KCS(" 0x%02x", kcs_pkt->data_out[i]);
++	DBG_KCS("\n");
++#endif
++
++	kcs_pkt->phase = KCS_PHASE_READ;
++	write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]);
++	kcs_pkt->read_req_done = false;
++}
++
++static void read_kcs_data(u16 channel_num)
++{
++	struct kcs_packet *kcs_pkt = NULL;
++
++	kcs_pkt = get_kcs_packet(channel_num);
++	DBG_KCS("%s:- chan:%d, kcs_pkt->phase:%d\n", __func__, channel_num,
++		kcs_pkt->phase);
++
++	switch (kcs_pkt->phase) {
++	case KCS_PHASE_WRITE_START:
++		kcs_pkt->phase = KCS_PHASE_WRITE_DATA;
++		/* fall through */
++
++	case KCS_PHASE_WRITE_DATA:
++		if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) {
++			kcs_pkt->error = KCS_LENGTH_ERROR;
++			kcs_force_abort(channel_num);
++			return;
++		}
++		set_kcs_state(channel_num, KCS_STATE_WRITE);
++		write_data(channel_num, ZERO_DATA);
++		kcs_pkt->data_in[kcs_pkt->data_in_idx++] =
++			read_data(channel_num);
++		break;
++
++	case KCS_PHASE_WRITE_END:
++		if (kcs_pkt->data_in_idx >= MAX_KCS_PKT_SIZE) {
++			kcs_pkt->error = KCS_LENGTH_ERROR;
++			kcs_force_abort(channel_num);
++			return;
++		}
++		set_kcs_state(channel_num, KCS_STATE_READ);
++		kcs_pkt->data_in[kcs_pkt->data_in_idx++] =
++			read_data(channel_num);
++		kcs_pkt->phase = KCS_PHASE_READ_WAIT;
++		kcs_pkt->read_req_done = true;
++
++		process_kcs_request(channel_num);
++		break;
++
++	case KCS_PHASE_READ:
++		if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len)
++			set_kcs_state(channel_num, KCS_STATE_IDLE);
++
++		u8 data = read_data(channel_num);
++		if (data != KCS_CTRL_CODE_READ) {
++			DBG_KCS("Invalid Read data. Phase:%d, Data:0x%02x\n",
++				kcs_pkt->phase, data);
++			set_kcs_state(channel_num, KCS_STATE_ERROR);
++			write_data(channel_num, ZERO_DATA);
++			break;
++		}
++
++		if (kcs_pkt->data_out_idx == kcs_pkt->data_out_len) {
++			write_data(channel_num, ZERO_DATA);
++			kcs_pkt->phase = KCS_PHASE_IDLE;
++			break;
++		}
++		write_data(channel_num,
++			   kcs_pkt->data_out[kcs_pkt->data_out_idx++]);
++		break;
++
++	case KCS_PHASE_ABORT_1:
++		set_kcs_state(channel_num, KCS_STATE_READ);
++		read_data(channel_num);
++		write_data(channel_num, kcs_pkt->error);
++		kcs_pkt->phase = KCS_PHASE_ABORT_2;
++		break;
++
++	case KCS_PHASE_ABORT_2:
++		set_kcs_state(channel_num, KCS_STATE_IDLE);
++		read_data(channel_num);
++		write_data(channel_num, ZERO_DATA);
++		kcs_pkt->phase = KCS_PHASE_IDLE;
++		break;
++
++	default:
++		kcs_force_abort(channel_num);
++	}
++}
++
++static void read_kcs_cmd(u16 channel_num)
++{
++	struct kcs_packet *kcs_pkt = NULL;
++
++	kcs_pkt = get_kcs_packet(channel_num);
++
++	set_kcs_state(channel_num, KCS_STATE_WRITE);
++	write_data(channel_num, ZERO_DATA);
++
++	u16 cmd = read_data(channel_num);
++	DBG_KCS("%s:- chan:%d, cmd:0x%02x\n", __func__, channel_num, cmd);
++	switch (cmd) {
++	case KCS_CTRL_CODE_WRITE_START:
++		init_kcs_packet(channel_num);
++		kcs_pkt->phase = KCS_PHASE_WRITE_START;
++		break;
++
++	case KCS_CTRL_CODE_WRITE_END:
++		if (kcs_pkt->error != KCS_NO_ERROR) {
++			kcs_force_abort(channel_num);
++			return;
++		}
++
++		kcs_pkt->phase = KCS_PHASE_WRITE_END;
++		break;
++
++	case KCS_CTRL_CODE_GET_STATUS_ABORT:
++		kcs_pkt->phase = KCS_PHASE_ABORT_1;
++		kcs_pkt->error = KCS_ABORT_BY_CMD;
++		break;
++
++	default:
++		kcs_pkt->error = KCS_ILLEGAL_CTRL_CMD;
++		kcs_force_abort(channel_num);
++	}
++}
++
++static u16 kcs_irq_handler(struct pt_regs *regs)
++{
++	for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) {
++		u16 channel_num = enabled_kcs_channel[idx];
++		/* Look-up the interrupted KCS channel */
++		u16 status = read_status(channel_num);
++		if (status & BIT_STATUS_IBF) {
++			if (status & BIT_STATUS_COD)
++				read_kcs_cmd(channel_num);
++			else
++				read_kcs_data(channel_num);
++		}
++	}
++
++	return 0;
++}
++
++static void set_kcs_channel_addr(u16 channel_num)
++{
++	u32 val;
++
++	switch (channel_num) {
++	case 1:
++		val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_LADR12AS;
++		writel(val, AST_LPC_BASE + LPC_HICR4);
++		val = (KCS_CHANNEL1_ADDR >> 8);
++		writel(val, AST_LPC_BASE + LPC_LADR12H);
++		val = (KCS_CHANNEL1_ADDR & 0xFF);
++		writel(val, AST_LPC_BASE + LPC_LADR12L);
++		break;
++
++	case 2:
++		val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_LADR12AS;
++		writel(val, AST_LPC_BASE + LPC_HICR4);
++		val = (KCS_CHANNEL2_ADDR >> 8);
++		writel(val, AST_LPC_BASE + LPC_LADR12H);
++		val = (KCS_CHANNEL2_ADDR & 0xFF);
++		writel(val, AST_LPC_BASE + LPC_LADR12L);
++		break;
++
++	case 3:
++		val = (KCS_CHANNEL3_ADDR >> 8);
++		writel(val, AST_LPC_BASE + LPC_LADR3H);
++		val = (KCS_CHANNEL3_ADDR & 0xFF);
++		writel(val, AST_LPC_BASE + LPC_LADR3L);
++		break;
++
++	case 4:
++		val = (((KCS_CHANNEL4_ADDR + 1) << 16) | KCS_CHANNEL4_ADDR);
++		writel(val, AST_LPC_BASE + LPC_LADR4);
++		break;
++
++	default:
++		DBG_KCS("Invalid channel (%d) specified\n", channel_num);
++		break;
++	}
++}
++
++static void enable_kcs_channel(u16 channel_num, u16 enable)
++{
++	u32 val;
++
++	switch (channel_num) {
++	case 1:
++		if (enable) {
++			val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE1;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++			val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC1E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++		} else {
++			val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC1E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++			val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE1;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++		}
++		break;
++
++	case 2:
++		if (enable) {
++			val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE2;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++			val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC2E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++		} else {
++			val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC2E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++			val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE2;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++		}
++		break;
++
++	case 3:
++		if (enable) {
++			val = readl(AST_LPC_BASE + LPC_HICR2) | BIT_IBFIE3;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++			val = readl(AST_LPC_BASE + LPC_HICR0) | BIT_LPC3E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++			val = readl(AST_LPC_BASE + LPC_HICR4) | BIT_KCSENBL;
++			writel(val, AST_LPC_BASE + LPC_HICR4);
++		} else {
++			val = readl(AST_LPC_BASE + LPC_HICR0) & ~BIT_LPC3E;
++			writel(val, AST_LPC_BASE + LPC_HICR0);
++			val = readl(AST_LPC_BASE + LPC_HICR4) & ~BIT_KCSENBL;
++			writel(val, AST_LPC_BASE + LPC_HICR4);
++			val = readl(AST_LPC_BASE + LPC_HICR2) & ~BIT_IBFIE3;
++			writel(val, AST_LPC_BASE + LPC_HICR2);
++		}
++		break;
++
++	case 4:
++		if (enable) {
++			val = readl(AST_LPC_BASE + LPC_HICRB) | BIT_IBFIE4 |
++			      BIT_LPC4E;
++			writel(val, AST_LPC_BASE + LPC_HICRB);
++		} else {
++			val = readl(AST_LPC_BASE + LPC_HICRB) &
++			      ~(BIT_IBFIE4 | BIT_LPC4E);
++			writel(val, AST_LPC_BASE + LPC_HICRB);
++		}
++		break;
++
++	default:
++		DBG_KCS("Invalid channel (%d) specified\n", channel_num);
++	}
++}
++
++void kcs_init(void)
++{
++	/* Initialize the KCS channels. */
++	for (u16 idx = 0; idx < NO_OF_ENABLED_KCS_CHANNELS; idx++) {
++		u16 channel_num = enabled_kcs_channel[idx];
++		DBG_KCS("%s Channel: %d\n", __func__, channel_num);
++		set_kcs_channel_addr(channel_num);
++		enable_kcs_channel(channel_num, 1);
++
++		/* Set KCS channel state to idle */
++		set_kcs_state(channel_num, KCS_STATE_IDLE);
++	}
++
++	/* KCS interrupt */
++	request_irq(IRQ_SRC_LPC, kcs_irq_handler);
++}
+diff --git a/board/aspeed/ast-g5/ast-g5-kcs.h b/board/aspeed/ast-g5/ast-g5-kcs.h
+new file mode 100644
+index 0000000..52b5097
+--- /dev/null
++++ b/board/aspeed/ast-g5/ast-g5-kcs.h
+@@ -0,0 +1,114 @@
++/* SPDX-License-Identifier: GPL-2.0 */
++/* Copyright (c) 2018-2019 Intel Corporation */
++
++#include <asm/io.h>
++#include <common.h>
++
++#include "ast-g5.h"
++
++#define KCS_CHANNEL_MAX		4
++#define IRQ_SRC_LPC		8 /* IRQ 8 */
++#define MAX_KCS_PKT_SIZE	(64 * 1024)
++/* KCS channel addresses */
++#define KCS_CHANNEL1_ADDR	0xCA0
++#define KCS_CHANNEL2_ADDR	0xCA8
++#define KCS_CHANNEL3_ADDR	0xCA2
++#define KCS_CHANNEL4_ADDR	0xCB2
++
++#define ZERO_DATA		0x00
++
++/* Aspeed KCS control registers */
++#define LPC_HICR0	0x00 /* Host Interface Control Register 0 */
++#define LPC_HICR1	0x04 /* Host Interface Control Register 1 */
++#define LPC_HICR2	0x08 /* Host Interface Control Register 2 */
++#define LPC_HICR3	0x0C /* Host Interface Control Register 3 */
++#define LPC_HICR4	0x10 /* Host Interface Control Register 4 */
++#define LPC_LADR3H	0x14 /* LPC channel #3 Address Register H */
++#define LPC_LADR3L	0x18 /* LPC channel #3 Address Register H */
++#define LPC_LADR12H	0x1C /* LPC channel #1#2 Address Register H */
++#define LPC_LADR12L	0x20 /* LPC channel #1#2 Address Register L */
++#define LPC_IDR1	0x24 /* Input Data Register 1 */
++#define LPC_IDR2	0x28 /* Input Data Register 2 */
++#define LPC_IDR3	0x2C /* Input Data Register 3 */
++#define LPC_ODR1	0x30 /* Output Data Register 1 */
++#define LPC_ODR2	0x34 /* Output Data Register 2 */
++#define LPC_ODR3	0x38 /* Output Data Register 3 */
++#define LPC_STR1	0x3C /* Status Register 1 */
++#define LPC_STR2	0x40 /* Status Register 2 */
++#define LPC_STR3	0x44 /* Status Register 3 */
++
++/* LPC Bits */
++#define BIT_LADR12AS	BIT(7) /* Channel Address selection */
++#define BIT_IBFIE1	BIT(1) /* Enable IDR1 Recv completion interrupt */
++#define BIT_IBFIE2	BIT(2) /* Enable IDR2 Recv completion interrupt */
++#define BIT_IBFIE3	BIT(3) /* Enable IBF13 interrupt */
++#define BIT_LPC1E	BIT(5) /* Enable LPC channel #1 */
++#define BIT_LPC2E	BIT(6) /* Enable LPC channel #2 */
++#define BIT_LPC3E	BIT(7) /* Enable LPC channel #2 */
++#define BIT_KCSENBL	BIT(2) /* Enable KCS interface in Channel #3 */
++
++/* mapped to lpc-host@80 IO space */
++#define LPC_HICRB	0x080
++#define BIT_IBFIE4	BIT(1)
++#define BIT_LPC4E	BIT(0)
++#define LPC_LADR4	0x090
++#define LPC_IDR4	0x094 /* Input Data Register 4 */
++#define LPC_ODR4	0x098 /* Output Data Register 4 */
++#define LPC_STR4	0x09c /* Status Data Register 4 */
++
++#define BIT_STATUS_OBF	BIT(0) /* Output Data Register full #1/#2/#3 */
++#define BIT_STATUS_IBF	BIT(1) /* Input Data Register full #1/#2/#3 */
++#define BIT_STATUS_COD	BIT(3) /* Command/Data - (1=command,0=data) */
++
++#define KCS_STATE_MASK		0xC0 /* BIT[6:7] of status register */
++#define KCS_STATE(state)	((state) << 6)
++
++/* IPMI2.0(section 9.7) - KCS interface State Bits */
++#define KCS_STATE_IDLE		0x00
++#define KCS_STATE_READ		0x01
++#define KCS_STATE_WRITE		0x02
++#define KCS_STATE_ERROR		0x03
++
++/* IPMI2.0(section 9.10) - KCS interface control codes */
++#define KCS_CTRL_CODE_GET_STATUS_ABORT	0x60
++#define KCS_CTRL_CODE_WRITE_START	0x61
++#define KCS_CTRL_CODE_WRITE_END		0x62
++#define KCS_CTRL_CODE_READ		0x68
++
++struct kcs_io_reg {
++	u32 idr;
++	u32 odr;
++	u32 str;
++};
++
++enum kcs_phase {
++	KCS_PHASE_IDLE = 0,
++	KCS_PHASE_WRITE_START = 1,
++	KCS_PHASE_WRITE_DATA = 2,
++	KCS_PHASE_WRITE_END = 3,
++	KCS_PHASE_READ_WAIT = 4,
++	KCS_PHASE_READ = 5,
++	KCS_PHASE_ABORT_1 = 6,
++	KCS_PHASE_ABORT_2 = 7,
++	KCS_PHASE_ERROR = 8
++};
++
++enum kcs_error {
++	KCS_NO_ERROR = 0x00,
++	KCS_ABORT_BY_CMD = 0x01,
++	KCS_ILLEGAL_CTRL_CMD = 0x02,
++	KCS_LENGTH_ERROR = 0x06,
++	KCS_UNSPECIFIED_ERROR = 0xFF,
++};
++
++struct kcs_packet {
++	enum kcs_phase phase;
++	enum kcs_error error;
++	u16 channel;
++	bool read_req_done;
++	u16 data_in_idx;
++	u8 data_in[MAX_KCS_PKT_SIZE];
++	u16 data_out_len;
++	u16 data_out_idx;
++	u8 data_out[MAX_KCS_PKT_SIZE];
++};
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch
new file mode 100644
index 000000000..746063a56
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0022-u-boot-env-change-for-PFR-image.patch
@@ -0,0 +1,35 @@
+From 6651a2663ee3e9f02c6ed8377097456528a2ee1a Mon Sep 17 00:00:00 2001
+From: Vikram Bodireddy <vikram.bodireddy@intel.com>
+Date: Tue, 26 Mar 2019 20:34:51 +0530
+Subject: [PATCH] u-boot env change for PFR image
+
+Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
+---
+ include/configs/ast-common.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/configs/ast-common.h b/include/configs/ast-common.h
+index b7d7192..dd89d91 100644
+--- a/include/configs/ast-common.h
++++ b/include/configs/ast-common.h
+@@ -103,7 +103,7 @@
+ #define CONFIG_SYS_MAX_FLASH_BANKS 	(CONFIG_FMC_CS)
+ #define CONFIG_SYS_MAX_FLASH_SECT	(8192)		/* max number of sectors on one chip */
+ #define CONFIG_ENV_IS_IN_FLASH		1
+-#define CONFIG_ENV_OFFSET		0x2400000	/* environment starts here  */
++#define CONFIG_ENV_OFFSET		0xa0000	/* environment starts here  */
+ #define CONFIG_ENV_ADDR			(AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET)
+ #define CONFIG_ENV_SIZE			0x10000	/* Total Size of Environment Sector */
+ 
+@@ -111,7 +111,7 @@
+ #define CONFIG_ENV_ADDR_REDUND	(AST_FMC_CS0_BASE + CONFIG_ENV_OFFSET_REDUND)
+ #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
+ 
+-#define CONFIG_BOOTCOMMAND		"bootm 20080000"
++#define CONFIG_BOOTCOMMAND		"bootm 21100000"
+ #define CONFIG_ENV_OVERWRITE
+ 
+ #define ASPEED_ENV_SETTINGS \
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch
new file mode 100644
index 000000000..5e8cd103d
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0023-Add-TPM-enable-pulse-triggering.patch
@@ -0,0 +1,52 @@
+From f762526077a7af02fc93bacc74fb9d49481d664f Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Fri, 29 Mar 2019 12:30:20 -0700
+Subject: [PATCH] Add TPM enable pulse triggering
+
+This commit adds onboard TPM enable pulse triggering.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ board/aspeed/ast-g5/ast-g5-intel.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
+index f9955c70d2f2..d9ba4a47a413 100644
+--- a/board/aspeed/ast-g5/ast-g5-intel.c
++++ b/board/aspeed/ast-g5/ast-g5-intel.c
+@@ -53,8 +53,8 @@ static const GPIOValue gpio_table[] = {
+ 				GPIO_DEBOUNCE_8MS},
+ 
+ 	/* Enable Pulse -- pin D6 */
+-	[GPIO_ENABLE_TPM_PULSE] = {PORT_PIN(GPIO_PORT_D, GPIO_PIN_6),
+-				   GPIO_CFG_DEFAULT, 0, GPIO_DEBOUNCE_8MS},
++	[GPIO_ENABLE_TPM_PULSE] = {TPM_EN_PULSE_PORT_PIN, GPCFG_OUTPUT_EN, 0,
++				   GPIO_DEBOUNCE_NONE},
+ };
+ 
+ #define LPC_SNOOP_ADDR 0x80
+@@ -232,6 +232,13 @@ void id_led_control(int id, int action)
+ 	gpio_set_value(s_led_info[id].gpio, s_led_info[id].state);
+ }
+ 
++static void enable_onboard_tpm(void)
++{
++	gpio_set_value(GPIO_ENABLE_TPM_PULSE, 1);
++	mdelay(50);
++	gpio_set_value(GPIO_ENABLE_TPM_PULSE, 0);
++}
++
+ static void timer8_irq_handler(void *regs)
+ {
+ 	int i;
+@@ -445,6 +452,7 @@ void ast_g5_intel(void)
+ 	espi_init();
+ 	sgpio_init();
+ 	timer8_init();
++	enable_onboard_tpm();
+ 	if (intel_force_firmware_jumper_enabled()) {
+ 		id_led_control(GPIO_AMBER_LED, EIDLED_On);
+ 		kcs_init();
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch
new file mode 100644
index 000000000..47cb56062
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/files/0024-IPMI-command-handler-implementation-in-uboot.patch
@@ -0,0 +1,339 @@
+From d770ea7a30742339b0692858847838dd2a738aeb Mon Sep 17 00:00:00 2001
+From: AppaRao Puli <apparao.puli@linux.intel.com>
+Date: Fri, 5 Apr 2019 17:53:21 +0530
+Subject: [PATCH] IPMI command handler implementation in uboot
+
+IPMI command handler implemtation in uBoot.
+Implemented IPMI commands:
+ 1) Get Device ID
+ 2) Get Self Test Result
+
+Tested By:
+Ran the above IPMI command Via KCS channel
+and got proper response.
+- Get Device ID
+  Req: cmdtool.efi 20 18 1
+  Res: 0x00 0x23 0x00 0x82 0x03 0x02 0x00 0x57 0x01 0x00 0x7b 0x00 0x00 0x00 0x00 0x00
+- Get Self Test Results
+  Req: cmdtool.efi 20 18 4
+  Res: 00 56 00
+
+Change-Id: I18b205bc45c34f7c4ef16adc29fa5bd494624ceb
+Signed-off-by: AppaRao Puli <apparao.puli@linux.intel.com>
+---
+ board/aspeed/ast-g5/Makefile       |   1 +
+ board/aspeed/ast-g5/ast-g5-kcs.c   |  78 +++++++++++++-----------
+ board/aspeed/ast-g5/ipmi-handler.c | 118 +++++++++++++++++++++++++++++++++++++
+ board/aspeed/ast-g5/ipmi-handler.h |  40 +++++++++++++
+ 4 files changed, 202 insertions(+), 35 deletions(-)
+ create mode 100644 board/aspeed/ast-g5/ipmi-handler.c
+ create mode 100644 board/aspeed/ast-g5/ipmi-handler.h
+
+diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile
+index 05972b9..f28fcfe 100644
+--- a/board/aspeed/ast-g5/Makefile
++++ b/board/aspeed/ast-g5/Makefile
+@@ -5,3 +5,4 @@ obj-y += ast-g5-irq.o
+ obj-y += ast-g5-gpio.o
+ obj-y += ast-g5-timer.o
+ obj-y += ast-g5-kcs.o
++obj-y += ipmi-handler.o
+diff --git a/board/aspeed/ast-g5/ast-g5-kcs.c b/board/aspeed/ast-g5/ast-g5-kcs.c
+index f983b4a..05b1cc2 100644
+--- a/board/aspeed/ast-g5/ast-g5-kcs.c
++++ b/board/aspeed/ast-g5/ast-g5-kcs.c
+@@ -1,7 +1,7 @@
+ // SPDX-License-Identifier: GPL-2.0
+ // Copyright (c) 2018-2019 Intel Corporation
+ 
+-#include "ast-g5-kcs.h"
++#include "ipmi-handler.h"
+ 
+ #define DEBUG_KCS_ENABLED	0
+ #ifdef DEBUG_KCS_ENABLED
+@@ -10,11 +10,6 @@
+ #define DBG_KCS(...)
+ #endif
+ 
+-/* TODO: Move to IPMI file. */
+-#define IPMI_CC_OK		0x00
+-#define IPMI_CC_INVALID		0xC1
+-#define IPMI_CC_UNSPECIFIED	0xFF
+-
+ #define KCS_CHANNEL_NO_3	3
+ 
+ static const u16 enabled_kcs_channel[] = { KCS_CHANNEL_NO_3 };
+@@ -104,13 +99,13 @@ static void init_kcs_packet(u16 channel_num)
+ static void process_kcs_request(u16 channel_num)
+ {
+ 	struct kcs_packet *kcs_pkt = NULL;
++	struct ipmi_cmd_data ipmi_data;
+ 
+ 	kcs_pkt = get_kcs_packet(channel_num);
+ 	if (!kcs_pkt->read_req_done)
+ 		return;
+ 
+ 	DBG_KCS("%s:- chan:%d\n", __func__, channel_num);
+-
+ #ifdef DEBUG_KCS_ENABLED
+ 	int i;
+ 
+@@ -119,37 +114,49 @@ static void process_kcs_request(u16 channel_num)
+ 		DBG_KCS(" 0x%02x", kcs_pkt->data_in[i]);
+ 	DBG_KCS("\n");
+ #endif
++	u8 req_lun = kcs_pkt->data_in[0] & 0x03; /* LUN[1:0]  */
++	ipmi_data.net_fun = (kcs_pkt->data_in[0] >> 2); /* netfn[7:2] */
++	ipmi_data.cmd = kcs_pkt->data_in[1]; /* cmd */
++	/* We support only BMC LUN 00h */
++	if (req_lun != LUN_BMC) {
++		kcs_pkt->data_out[0] =
++			GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun);
++		kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */
++		kcs_pkt->data_out[2] = IPMI_CC_INVALID_CMD_LUN; /* CC code */
++		kcs_pkt->data_out_len = 3;
++		goto done;
++	}
+ 
+-	/*
+-	 * TODO: Move it to IPMI Command Handler
+-	 * Below code is added for timebeing till
+-	 * we implement the IPMI command handler.
+-	 */
+-	kcs_pkt->data_out[0] = kcs_pkt->data_in[0]; /* netfn */
+-	kcs_pkt->data_out[1] = kcs_pkt->data_in[1]; /* cmd */
+-	kcs_pkt->data_out[2] = IPMI_CC_OK; /* cc */
+-
+-	if (((kcs_pkt->data_in[0] >> 2) == 0x06) &&
+-	    (kcs_pkt->data_in[1] == 0x01)) {
+-		/* Get Device ID */
+-		u8 device_id[15] = { 0x23, 0x00, 0x12, 0x03, 0x02,
+-				     0xBF, 0x57, 0x01, 0x00, 0x7B,
+-				     0x00, 0x00, 0x00, 0x00, 0x00 };
+-		for (i = 0; i < 15; i++)
+-			kcs_pkt->data_out[i + 3] = device_id[i];
+-		kcs_pkt->data_out_len = 18;
+-	} else if (((kcs_pkt->data_in[0] >> 2) == 0x06) &&
+-		   (kcs_pkt->data_in[1] == 0x04)) {
+-		/* Get Self Test Results */
+-		kcs_pkt->data_out[3] = 0x56;
+-		kcs_pkt->data_out[4] = 0x00;
+-		kcs_pkt->data_out_len = 5;
+-	} else {
+-		kcs_pkt->data_out[2] =
+-			IPMI_CC_INVALID; /* Invalid or not supported. */
++	/* Boundary check */
++	if ((kcs_pkt->data_in_idx - 2) > sizeof(ipmi_data.req_data)) {
++		kcs_pkt->data_out[0] =
++			GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun);
++		kcs_pkt->data_out[1] = ipmi_data.cmd; /* cmd */
++		kcs_pkt->data_out[2] = IPMI_CC_OUT_OF_SPACE; /* CC code */
+ 		kcs_pkt->data_out_len = 3;
++		goto done;
+ 	}
+-	/* END: TODO */
++	/* Fill in IPMI request data */
++	ipmi_data.req_len = kcs_pkt->data_in_idx - 2;
++	for (i = 0; i < kcs_pkt->data_in_idx - 2; i++)
++		ipmi_data.req_data[i] = kcs_pkt->data_in[i + 2];
++
++	/* Call IPMI command handler */
++	ipmi_cmd_handler(&ipmi_data);
++
++	/* Get IPMI response and fill KCS out data  */
++	/* First 2 bytes in KCS response are netFn, Cmd */
++	kcs_pkt->data_out[0] = GET_RESP_NETFN_LUN(req_lun, ipmi_data.net_fun);
++	kcs_pkt->data_out[1] = ipmi_data.cmd;
++	if ((ipmi_data.res_len + 2) > sizeof(kcs_pkt->data_out)) {
++		kcs_pkt->data_out[2] = IPMI_CC_UNSPECIFIED; /* CC code */
++		kcs_pkt->data_out_len = 3;
++		goto done;
++	}
++	for (i = 0; i < ipmi_data.res_len; i++)
++		kcs_pkt->data_out[i + 2] = ipmi_data.res_data[i];
++
++	kcs_pkt->data_out_len = ipmi_data.res_len + 2;
+ 
+ #ifdef DEBUG_KCS_ENABLED
+ 	DBG_KCS("Response data(Len:%d): ", kcs_pkt->data_out_len);
+@@ -158,6 +165,7 @@ static void process_kcs_request(u16 channel_num)
+ 	DBG_KCS("\n");
+ #endif
+ 
++done:
+ 	kcs_pkt->phase = KCS_PHASE_READ;
+ 	write_data(channel_num, kcs_pkt->data_out[kcs_pkt->data_out_idx++]);
+ 	kcs_pkt->read_req_done = false;
+diff --git a/board/aspeed/ast-g5/ipmi-handler.c b/board/aspeed/ast-g5/ipmi-handler.c
+new file mode 100644
+index 0000000..9cccee9
+--- /dev/null
++++ b/board/aspeed/ast-g5/ipmi-handler.c
+@@ -0,0 +1,118 @@
++
++// SPDX-License-Identifier: GPL-2.0
++// Copyright (c) 2018-2019 Intel Corporation
++
++#include "ipmi-handler.h"
++
++/* IPMI network function codes */
++#define NETFN_APP			0x06
++
++/* IPMI command codes */
++#define CMD_GET_DEV_ID			0x01
++#define CMD_GET_SELF_TEST_RESULTS	0x04
++
++typedef u16 (*fun_handler)(u8 *req, u16 req_len, u8 *res);
++
++struct get_dev_id {
++	u8 completion_code;
++	u8 dev_id;
++	u8 dev_rev;
++	u8 fw_rev1;
++	u8 fw_rev2;
++	u8 ipmi_ver;
++	u8 dev_support;
++	u8 mfg_id[3];
++	u8 product_id[2];
++	u8 aux_fw_rev[4];
++};
++struct self_test_res {
++	u8 completion_code;
++	u8 res_byte[2];
++};
++
++struct ipmi_cmd_table {
++	u8 net_fun;
++	u8 cmd;
++	fun_handler process_cmd;
++};
++
++static u16 get_device_id(u8 *req, u16 req_len, u8 *res)
++{
++	/* Get Device ID */
++	bool operation = 1; /* Firmware operation */
++	u8 intel_mfg_id[3] = { 0x57, 0x01, 0x00 };
++	u8 platform_id[2] = { 0x7B, 0x00 };
++	u8 aux_fw_rev[4] = { 0x00, 0x00, 0x00, 0x00 };
++	struct get_dev_id *result = (struct get_dev_id *)res;
++
++	if (req_len != 0) {
++		result->completion_code = IPMI_CC_INVALID_DATA_LENGTH;
++		return sizeof(result->completion_code);
++	}
++
++	result->completion_code = IPMI_CC_OK;
++	result->dev_id = 0x23;
++	result->dev_rev = 0x00; /* Not provides dev SDR */
++
++	result->ipmi_ver = 0x02; /* IPMI 2.0 */
++	result->dev_support = 0x00; /* No dev support in this mode */
++	memcpy(result->mfg_id, intel_mfg_id, sizeof(result->mfg_id));
++	memcpy(result->aux_fw_rev, aux_fw_rev, sizeof(result->aux_fw_rev));
++
++	/* TODO: Get Firmware version from flash(PFM Header) */
++	result->fw_rev1 = ((operation << 7) | (0x02 & 0x7F));
++	result->fw_rev2 = 0x03;
++	/* TODO: Read Platform ID from GPIO */
++	memcpy(result->product_id, platform_id, sizeof(result->product_id));
++
++	return sizeof(struct get_dev_id);
++}
++
++static u16 get_self_test_result(u8 *req, u16 req_len, u8 *res)
++{
++	/* Get Self Test Results */
++	struct self_test_res *result = (struct self_test_res *)res;
++
++	if (req_len != 0) {
++		result->completion_code = IPMI_CC_INVALID_DATA_LENGTH;
++		return sizeof(result->completion_code);
++	}
++
++	result->completion_code = IPMI_CC_OK;
++	result->res_byte[0] = 0x56; /* Self test function not implemented. */
++	result->res_byte[1] = 0x00;
++
++	return sizeof(struct self_test_res);
++}
++
++const struct ipmi_cmd_table cmd_info[] = {
++	{ NETFN_APP,	CMD_GET_DEV_ID,			get_device_id },
++	{ NETFN_APP,	CMD_GET_SELF_TEST_RESULTS,	get_self_test_result }
++};
++
++#define CMD_TABLE_SIZE ARRAY_SIZE(cmd_info)
++
++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data)
++{
++	int i = 0;
++	for (i = 0; i < CMD_TABLE_SIZE; i++) {
++		if ((cmd_info[i].net_fun == ipmi_data->net_fun) &&
++		    (cmd_info[i].cmd == ipmi_data->cmd)) {
++			break;
++		}
++	}
++
++	if (i == CMD_TABLE_SIZE) {
++		/* Invalid or not supported. */
++		ipmi_data->res_data[0] = IPMI_CC_INVALID_CMD;
++		ipmi_data->res_len = 1;
++		return;
++	}
++
++	/* Call the appropriate function handler */
++	ipmi_data->res_len =
++		cmd_info[i].process_cmd(ipmi_data->req_data, ipmi_data->req_len,
++					&ipmi_data->res_data[0]);
++
++	return;
++}
+diff --git a/board/aspeed/ast-g5/ipmi-handler.h b/board/aspeed/ast-g5/ipmi-handler.h
+new file mode 100644
+index 0000000..9d46d9b
+--- /dev/null
++++ b/board/aspeed/ast-g5/ipmi-handler.h
+@@ -0,0 +1,40 @@
++
++/* SPDX-License-Identifier: GPL-2.0 */
++/* Copyright (c) 2018-2019 Intel Corporation */
++
++#include "ast-g5-kcs.h"
++
++/* IPMI completion codes */
++#define IPMI_CC_OK			0x00
++#define IPMI_CC_NODE_BUSY		0xC0
++#define IPMI_CC_INVALID_CMD		0xC1
++#define IPMI_CC_INVALID_CMD_LUN		0xC2
++#define IPMI_CC_OUT_OF_SPACE		0xC4
++#define IPMI_CC_INVALID_DATA_LENGTH	0xC7
++#define IPMI_CC_INVALID_DATA_FIELD	0xCC
++#define IPMI_CC_UNSPECIFIED		0xFF
++
++/* BMC IPMB LUNs */
++#define LUN_BMC				0x00
++#define LUN_OEM1			0x01
++#define LUN_SMS				0x02
++#define LUN_OEM2			0x01
++
++
++#define MAX_IPMI_REQ_DATA_SIZE		MAX_KCS_PKT_SIZE
++#define MAX_IPMI_RES_DATA_SIZE		64
++
++/* Response netFn[7:2], Lun[1:0] */
++#define GET_RESP_NETFN_LUN(lun, netfn)                                         \
++	((lun & 0x03) | (((netfn + 1) << 2) & 0xFD))
++
++struct ipmi_cmd_data {
++	u8 net_fun;
++	u8 cmd;
++	u16 req_len;
++	u16 res_len;
++	u8 req_data[MAX_IPMI_REQ_DATA_SIZE];
++	u8 res_data[MAX_IPMI_RES_DATA_SIZE];
++};
++
++void ipmi_cmd_handler(struct ipmi_cmd_data *ipmi_data);
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
index 9494c823e..8eb06b622 100644
--- a/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
@@ -4,25 +4,30 @@ FILESEXTRAPATHS_append_wolfpass:= "${THISDIR}/files:"
 # with the intel layout for environment
 SRC_URI_remove_wolfpass = " file://0001-configs-ast-Add-redundnant-env.patch"
 
-SRC_URI_append_wolfpass = " file://0001-flash-use-readX-writeX-not-udelay.patch \
-                          file://0002-intel-layout-environment-addr.patch \
-                          file://0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch \
-                          file://0005-enable-passthrough-in-uboot.patch \
-                          file://0006-Add-Aspeed-g5-interrupt-support.patch \
-                          file://0007-Add-espi-support.patch \
-                          file://0008-add-sgio-support-for-port80-snoop-post-LEDs.patch \
-                          file://0009-Add-basic-GPIO-support.patch \
-                          file://0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch \
-                          file://0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch \
-                          file://0012-Add-status-and-ID-LED-support.patch \
-                          file://0013-aspeed-Add-Pwm-Driver.patch \
-                          file://0014-Keep-interrupts-enabled-until-last-second.patch \
-                          file://0015-Rewrite-memmove-to-optimize-on-word-transfers.patch \
-                          file://0016-Add-support-for-128MB-Macronix-spi-flash-MX66L1G45G.patch \
-                          file://0017-Enable-Macronix-and-Micron-SPI-support.patch \
-                          file://0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch \
-                          file://0019-u-boot-full-platform-reset-espi-oob-ready.patch \
-                          file://0020-Enable-PCIe-L1-support.patch \
-                          file://0020-Add-system-reset-status-support.patch \
-                          file://0021-Config-host-uart-clock-source-using-environment-vari.patch \
-                        "
+SRC_URI_append_wolfpass = " \
+    file://0001-flash-use-readX-writeX-not-udelay.patch \
+    file://0002-intel-layout-environment-addr.patch \
+    file://0004-Make-sure-debug-uart-is-using-24MHz-clock-source.patch \
+    file://0005-enable-passthrough-in-uboot.patch \
+    file://0006-Add-Aspeed-g5-interrupt-support.patch \
+    file://0007-Add-espi-support.patch \
+    file://0008-add-sgio-support-for-port80-snoop-post-LEDs.patch \
+    file://0009-Add-basic-GPIO-support.patch \
+    file://0010-Update-Force-Firmware-Update-Jumper-to-use-new-gpio.patch \
+    file://0011-Add-basic-timer-support-for-Aspeed-g5-in-U-Boot.patch \
+    file://0012-Add-status-and-ID-LED-support.patch \
+    file://0013-aspeed-Add-Pwm-Driver.patch \
+    file://0014-Keep-interrupts-enabled-until-last-second.patch \
+    file://0015-Rewrite-memmove-to-optimize-on-word-transfers.patch \
+    file://0016-Add-support-for-128MB-Macronix-spi-flash-MX66L1G45G.patch \
+    file://0017-Enable-Macronix-and-Micron-SPI-support.patch \
+    file://0018-Add-support-for-Macronix-and-Micron-1Gbits-SPI-flash.patch \
+    file://0019-u-boot-full-platform-reset-espi-oob-ready.patch \
+    file://0020-Enable-PCIe-L1-support.patch \
+    file://0020-Add-system-reset-status-support.patch \
+    file://0021-Config-host-uart-clock-source-using-environment-vari.patch \
+    file://0022-KCS-driver-support-in-uBoot.patch \
+    file://0023-Add-TPM-enable-pulse-triggering.patch \
+    file://0024-IPMI-command-handler-implementation-in-uboot.patch \
+    "
+SRC_URI_append_wolfpass += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'file://0022-u-boot-env-change-for-PFR-image.patch', '', d)}"
diff --git a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb
index 0cf8ed0f0..4b445ce0f 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb
+++ b/meta-openbmc-mods/meta-common/recipes-core/at-scale-debug/at-scale-debug.bb
@@ -13,7 +13,7 @@ do_configure[depends] += "virtual/kernel:do_shared_workdir"
 
 SRC_URI = "git://git@github.com/Intel-BMC/at-scale-debug;protocol=ssh"
 
-SRCREV = "e3ef64c6427f7be7c9cd6aa4cd696dd5c33f5085"
+SRCREV = "71a38355f46ee52620be7304c3712a47c00dad1e"
 S = "${WORKDIR}/git"
 
 SYSTEMD_SERVICE_${PN} += "com.intel.AtScaleDebug.service"
diff --git a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb b/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb
index 170412e0c..1d2a6e9df 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb
+++ b/meta-openbmc-mods/meta-common/recipes-core/cpu-log-util/cpu-log-util_git.bb
@@ -11,7 +11,7 @@ LICENSE = "CLOSED"
 LIC_FILES_CHKSUM = ""
 
 SRC_URI = "git://git@github.com/Intel-BMC/at-scale-debug;protocol=ssh"
-SRCREV = "e3ef64c6427f7be7c9cd6aa4cd696dd5c33f5085"
+SRCREV = "71a38355f46ee52620be7304c3712a47c00dad1e"
 
 S = "${WORKDIR}/git/cpu-log-util"
 PACKAGES += "libpeci"
diff --git a/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh
index 5a2637ba3..dd3b7f69a 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh
+++ b/meta-openbmc-mods/meta-common/recipes-core/fw-update/files/fwupd.sh
@@ -84,6 +84,18 @@ if [ $? -ne 0 ]; then
     exit 1
 fi
 
+#this file being created at build time for PFR images
+#TODO: Need to do runtime detection of PFR platform
+#TODO: Also to check if PFR is provisioned or not
+if [ -e /usr/share/pfr ]
+then
+TGT="/dev/mtd/image-stg"
+echo "Updating $(basename $TGT)"
+flash_erase $TGT 0 0
+echo "Writing $(stat -c "%s" "$LOCAL_PATH") bytes"
+cat "$LOCAL_PATH" > "$TGT"
+#TODO: Add I2C command to write to PFRCPLD about BMC update intent.
+else
 # guess based on fw_env which partition we booted from
 BOOTADDR=$(fw_printenv bootcmd | awk '{print $2}')
 
@@ -101,4 +113,4 @@ fw_setenv "bootcmd" "bootm ${BOOTADDR}"
 
 # reboot
 reboot
-
+fi
diff --git a/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb b/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb
index ac8e58c03..08d0057ef 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb
+++ b/meta-openbmc-mods/meta-common/recipes-core/fw-update/intel-fw-update.bb
@@ -11,12 +11,20 @@ RDEPENDS_intel-fw-update += "dosfstools parted"
 
 LICENSE = "Apache-2.0"
 LIC_FILES_CHKSUM = "file://${INTELBASE}/COPYING.apache-2.0;md5=34400b68072d710fecd0a2940a0d1658"
+PFR_EN = "${@bb.utils.contains('IMAGE_TYPE', 'pfr', 'pfr', '', d)}"
 
 SRC_URI += "file://fwupd.sh"
 SRC_URI += "file://usb-ctrl"
 
+FILES_${PN} += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', '${datadir}/pfr', '', d)}"
+
 do_install() {
         install -d ${D}${bindir}
         install -m 0755 ${WORKDIR}/fwupd.sh ${D}${bindir}
         install -m 0755 ${WORKDIR}/usb-ctrl ${D}${bindir}
+
+        if [ "${PFR_EN}" = "pfr" ]; then
+            install -d ${D}${datadir}
+            touch ${D}${datadir}/pfr
+        fi
 }
diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
index e0f4d5d2b..8e06bcbf2 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/intel-ipmi-oem_%.bbappend
@@ -1,2 +1,2 @@
 SRC_URI = "git://github.com/openbmc/intel-ipmi-oem.git"
-SRCREV = "7944c3072287a3833a29283aafa8650a31cd4ce7"
+SRCREV = "acc8a4ebf38231765175fe30a075c62643983748"
diff --git a/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb b/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb
index c23da6df2..39bf2b966 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb
+++ b/meta-openbmc-mods/meta-common/recipes-core/ipmi/ipmi-providers.bb
@@ -2,7 +2,7 @@ SUMMARY = "Intel IPMI Providers"
 DESCRIPTION = "IPMI Provider Libraries"
 
 SRC_URI = "git://git@github.com/Intel-BMC/intel-ipmi-providers;protocol=ssh"
-SRCREV = "bbb45687fc2993980ac95117d8503ee6c2358965"
+SRCREV = "91d0178dc4fe513cdfd0e3d52e5eb41193b2bf57"
 
 S = "${WORKDIR}/git"
 PV = "0.1+git${SRCPV}"
@@ -30,8 +30,3 @@ FILES_${PN}_append = " ${libdir}/host-ipmid/lib*${SOLIBS}"
 FILES_${PN}_append = " ${libdir}/net-ipmid/lib*${SOLIBS}"
 FILES_${PN}-dev_append = " ${libdir}/ipmid-providers/lib*${SOLIBSDEV}"
 
-do_configure_prepend() {
-    cp -r ${WORKDIR}/recipe-sysroot${libdir}/phosphor-ipmi-host ${S}
-    cp -r ${WORKDIR}/recipe-sysroot${includedir}/phosphor-ipmi-host ${S}
-    cp -r ${WORKDIR}/recipe-sysroot${includedir}/intel-ipmi-oem ${S}
-}
diff --git a/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb b/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb
index dec71e0d6..71909e69c 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb
+++ b/meta-openbmc-mods/meta-common/recipes-core/peci-pcie/peci-pcie_git.bb
@@ -10,7 +10,7 @@ SRC_URI = "git://git@github.com/Intel-BMC/provingground;protocol=ssh"
 DEPENDS = "boost sdbusplus cpu-log-util"
 
 PV = "0.1+git${SRCPV}"
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 S = "${WORKDIR}/git/peci_pcie"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf.bbappend b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend
index 8f26d784b..8f26d784b 100644
--- a/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-core/systemd/systemd-conf_%.bbappend
diff --git a/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend
new file mode 100644
index 000000000..5a2301d40
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-extended/sdbusplus/sdbusplus_%.bbappend
@@ -0,0 +1,4 @@
+
+#SRC_URI += "git://github.com/openbmc/sdbusplus"
+SRCREV = "4274c117dd2866ac60508f438e7427f99dee6be4"
+
diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend
index a7d8d8a95..b018ad53e 100644
--- a/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-graphics/libvncserver/libvncserver_%.bbappend
@@ -1,17 +1,14 @@
-PACKAGECONFIG_remove = "gcrypt gnutls png sdl zlib"
-
-TARGET_CXXFLAGS += " -Dflto"
+PACKAGECONFIG_remove = "gcrypt gnutls png sdl"
 
 do_install_append() {
     rm -rf ${D}${libdir}/libvncclient*
 }
 
-inherit cmake
-
 # Use the latest to support obmc-ikvm
 DEPENDS += "openssl lzo"
-SRC_URI = "git://github.com/LibVNC/libvncserver"
-SRCREV = "3348a7e42e86dfb98dd7458ad29def476cf6096f"
+
+#SRC_URI = "git://github.com/LibVNC/libvncserver"
+SRCREV = "f007b685b6c4201b445029ac3d459de38d30d94c"
 S = "${WORKDIR}/git"
 
 # Remove x11 and gtk+ that cause big image size
@@ -19,3 +16,5 @@ S = "${WORKDIR}/git"
 REQUIRED_DISTRO_FEATURES_remove = "x11"
 DEPENDS_remove = "gtk+"
 RDEPENDS_${PN}_remove = "gtk+"
+
+FULL_OPTIMIZATION = "-Os -flto -fno-fat-lto-objects"
diff --git a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb
index f69382440..37ab24b8a 100644
--- a/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb
+++ b/meta-openbmc-mods/meta-common/recipes-graphics/obmc-ikvm/obmc-ikvm_git.bb
@@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=75859989545e37968a99b631ef42722e"
 DEPENDS = " libvncserver sdbusplus sdbusplus-native phosphor-logging phosphor-dbus-interfaces autoconf-archive-native"
 
 SRC_URI = "git://github.com/openbmc/obmc-ikvm"
-SRCREV = "f6ed0e75b05b573345e4f3eb9d80e677f98992ac"
+SRCREV = "fb6a8e1e727a8ece5eb0350d3962dd3056a6f608"
 
 PR = "r1"
 PR_append = "+gitr${SRCPV}"
diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb
index 1635b41a1..a44b31efe 100644
--- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb
+++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control.bb
@@ -2,7 +2,7 @@ SUMMARY = "Chassis Power Control service for Intel based platform"
 DESCRIPTION = "Chassis Power Control service for Intel based platfrom"
 
 SRC_URI = "git://git@github.com/Intel-BMC/intel-chassis-control.git;protocol=ssh"
-SRCREV = "d49efd0b5e1c81fd530dbd9fa0a7545f071bc823"
+SRCREV = "feb401242a38d8fb9301dc8e3cb50d7a9c2b4cd1"
 
 S = "${WORKDIR}/git/services/chassis/"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/xyz.openbmc_project.Chassis.Control.Power@.service b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/xyz.openbmc_project.Chassis.Control.Power@.service
index 985479401..bf83a54e2 100644
--- a/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/xyz.openbmc_project.Chassis.Control.Power@.service
+++ b/meta-openbmc-mods/meta-common/recipes-intel/chassis/intel-chassis-control/xyz.openbmc_project.Chassis.Control.Power@.service
@@ -1,6 +1,8 @@
 
 [Unit]
 Description=Intel Power Control%i
+Wants=mapper-wait@-xyz-openbmc_project-control-gpio-Power_Good.service
+After=mapper-wait@-xyz-openbmc_project-control-gpio-Power_Good.service
 
 [Service]
 Restart=always
diff --git a/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend
index db0ec4688..b352295ba 100644
--- a/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-intel/packagegroups/packagegroup-obmc-apps.bbappend
@@ -1,6 +1,2 @@
-# this is here to keep obmc-mgr-system happy,
-# power control should stop relying on the deprcated
-# package then we can remove it obmc-mgr-inventory
-RDEPENDS_${PN}-inventory += "obmc-mgr-inventory"
 # this is for image signing and signature verification
-RDEPENDS_${PN}-extras += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', ' phosphor-image-signing', '', d)}"
-\ No newline at end of file
+RDEPENDS_${PN}-extras += "${@bb.utils.contains('IMAGE_TYPE', 'pfr', ' phosphor-image-signing', '', d)}"
diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb
index 323b2f18c..b44b3f3ec 100644
--- a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb
+++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv1.bb
@@ -2,7 +2,7 @@ SUMMARY = "SMBIOS MDR version 1 service for Intel based platform"
 DESCRIPTION = "SMBIOS MDR version 1 service for Intel based platfrom"
 
 SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh"
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 S = "${WORKDIR}/git/services/smbios/"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb
index 0cf0a7c32..ab696c051 100644
--- a/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb
+++ b/meta-openbmc-mods/meta-common/recipes-intel/smbios/smbios-mdrv2.bb
@@ -2,7 +2,7 @@ SUMMARY = "SMBIOS MDR version 2 service for Intel based platform"
 DESCRIPTION = "SMBIOS MDR version 2 service for Intel based platfrom"
 
 SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh"
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 S = "${WORKDIR}/git/services/smbios-mdrv2/"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-arm-dts-aspeed-g5-add-espi.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-arm-dts-aspeed-g5-add-espi.patch
index 2a94453b3..08498cd01 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-arm-dts-aspeed-g5-add-espi.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0005-arm-dts-aspeed-g5-add-espi.patch
@@ -1,19 +1,19 @@
-From 2affc8ab570c9d1e6d6e5ecbdbeddbc5e3b15cc5 Mon Sep 17 00:00:00 2001
+From 536b09695117440ed428ff27023cd9167fcf4dfe Mon Sep 17 00:00:00 2001
 From: Juston Li <juston.li@intel.com>
 Date: Mon, 27 Mar 2017 11:16:00 -0700
 Subject: [PATCH] arm: dts: aspeed-g5: add espi
 
-Change-Id: I0b607657883619a3acefdbf344d39bf01790c4b1
 Signed-off-by: Juston Li <juston.li@intel.com>
 ---
  arch/arm/boot/dts/aspeed-g5.dtsi | 18 +++++++++++++++++-
  1 file changed, 17 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index e4c5de3208e0..a3c456ba3f34 100644
+index a79e01ffe9d4..0c74adf739d2 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
-@@ -260,13 +260,22 @@
+@@ -261,7 +261,7 @@
+ 				#gpio-cells = <2>;
  				gpio-controller;
  				compatible = "aspeed,ast2500-gpio";
 -				reg = <0x1e780000 0x1000>;
@@ -21,7 +21,7 @@ index e4c5de3208e0..a3c456ba3f34 100644
  				interrupts = <20>;
  				gpio-ranges = <&pinctrl 0 0 220>;
  				clocks = <&syscon ASPEED_CLK_APB>;
- 				interrupt-controller;
+@@ -269,6 +269,15 @@
  				#interrupt-cells = <2>;
  			};
  
@@ -37,7 +37,7 @@ index e4c5de3208e0..a3c456ba3f34 100644
  			rtc: rtc@1e781000 {
  				compatible = "aspeed,ast2500-rtc";
  				reg = <0x1e781000 0x18>;
-@@ -342,6 +351,13 @@
+@@ -344,6 +353,13 @@
  				status = "disabled";
  			};
  
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-New-flash-map-for-intel.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-New-flash-map-for-intel.patch
index 2ac429a22..11663c503 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-New-flash-map-for-intel.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0007-New-flash-map-for-intel.patch
@@ -1,22 +1,23 @@
-From 074f1c74fde88aac3a10059e4928919782cd40d6 Mon Sep 17 00:00:00 2001
+From 3eabb52efdecfc0da896476ac5567060a6b3788a Mon Sep 17 00:00:00 2001
 From: Vernon Mauery <vernon.mauery@intel.com>
 Date: Mon, 4 Jun 2018 13:45:42 -0700
 Subject: [PATCH] New flash map for Intel
- ===================================================================
 
+Signed-off-by: Vernon Mauery <vernon.mauery@intel.com>
+Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
 ---
- .../boot/dts/openbmc-flash-layout-intel-128MB.dtsi | 58 ++++++++++++++++++++++
- .../boot/dts/openbmc-flash-layout-intel-64MB.dtsi  | 39 +++++++++++++++
- 2 files changed, 97 insertions(+)
+ .../boot/dts/openbmc-flash-layout-intel-128MB.dtsi | 52 ++++++++++++++++++++++
+ .../boot/dts/openbmc-flash-layout-intel-64MB.dtsi  | 39 ++++++++++++++++
+ 2 files changed, 91 insertions(+)
  create mode 100644 arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi
  create mode 100644 arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi
 
 diff --git a/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi b/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi
 new file mode 100644
-index 0000000..23426ac
+index 000000000000..23426acc30c7
 --- /dev/null
 +++ b/arch/arm/boot/dts/openbmc-flash-layout-intel-128MB.dtsi
-@@ -0,0 +1,58 @@
+@@ -0,0 +1,52 @@
 +// SPDX-License-Identifier: GPL-2.0+
 +// 128MB flash layout: PFR (active + tmp1/tmp2 + extra)
 +//                     image with common RW partition
@@ -31,53 +32,47 @@ index 0000000..23426ac
 +		label = "u-boot";
 +	};
 +
-+	fit-image-a@80000 {
-+		reg = <0x80000 0x1b80000>;
-+		label = "image-a";
++	pfm@80000 {
++		reg = <0x80000 0x20000>;
++		label = "pfm";
 +	};
 +
-+	sofs@1c00000 {
-+		reg = <0x1c00000 0x200000>;
-+		label = "sofs";
++	u-boot-env@a0000 {
++		reg = <0xa0000 0x20000>;
++		label = "u-boot-env";
 +	};
 +
-+	rwfs@1e00000 {
-+		reg = <0x1e00000 0x600000>;
-+		label = "rwfs";
++	sofs@c0000 {
++		reg = <0xc0000 0x200000>;
++		label = "sofs";
 +	};
 +
-+	u-boot-env@2400000 {
-+		reg = <0x2400000 0x20000>;
-+		label = "u-boot-env";
++	rwfs@2c0000 {
++		reg = <0x2c0000 0xe40000>;
++		label = "rwfs";
 +	};
 +
-+	/*
-+	pfr-resvd@1260000 {
-+		reg = <0x2460000 0x20000>;
-+		label = "pfr-resvd";
++	fit-image-a@1100000 {
++		reg = <0x1100000 0x2500000>;
++		label = "image-a";
 +	};
-+	*/
 +
-+	rc1@2480000 {
-+		reg = <0x2480000 0x1b80000>;
-+		label = "rc1";
++	rc-image@3600000 {
++		reg = <0x3600000 0x2500000>;
++		label = "rc-image";
 +	};
 +
-+	rc2@4000000 {
-+		reg = <0x4000000 0x1b80000>;
-+		label = "rc2";
++	image-staging@5b00000 {
++		reg = <0x5b00000 0x2500000>;
++		label = "image-stg";
 +	};
 +
-+	bios-staging@6000000 {
-+		reg = <0x6000000 0x2000000>;
-+		label = "bios-staging";
-+	};
 +};
 +
 +
 diff --git a/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi b/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi
 new file mode 100644
-index 0000000..6ae8e57
+index 000000000000..6ae8e57087e2
 --- /dev/null
 +++ b/arch/arm/boot/dts/openbmc-flash-layout-intel-64MB.dtsi
 @@ -0,0 +1,39 @@
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-Add-ASPEED-SGPIO-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-Add-ASPEED-SGPIO-driver.patch
index 78824dde7..beb5087f5 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-Add-ASPEED-SGPIO-driver.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0008-Add-ASPEED-SGPIO-driver.patch
@@ -1,4 +1,4 @@
-From 42505ffb3c24b3e7f8182af520ab1c10a3b3f3c4 Mon Sep 17 00:00:00 2001
+From 58adbd18074fbf8005d5d7a5ec116c326252f606 Mon Sep 17 00:00:00 2001
 From: "Feist, James" <james.feist@intel.com>
 Date: Mon, 5 Jun 2017 11:13:52 -0700
 Subject: [PATCH] Add ASPEED SGPIO driver.
@@ -6,7 +6,6 @@ Subject: [PATCH] Add ASPEED SGPIO driver.
 Port aspeed sgpio driver to OBMC Kernel and
 enable it on Purley config. Based off AST sdk 4.0.
 
-Change-Id: I8529c3fb001ea6f93e63b269cdcdde3887a84e40
 Signed-off-by: James Feist <james.feist@linux.intel.com>
 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 ---
@@ -17,7 +16,7 @@ Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
  create mode 100644 drivers/gpio/sgpio-aspeed.c
 
 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
-index 71c0ab46f216..a0485be99db7 100644
+index b5a2845347ec..e3ce2b68a1fc 100644
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -124,6 +124,14 @@ config GPIO_ASPEED
@@ -36,7 +35,7 @@ index 71c0ab46f216..a0485be99db7 100644
  	tristate "Atheros AR71XX/AR724X/AR913X GPIO support"
  	default y if ATH79
 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
-index 1324c8f966a7..23b8d29bef70 100644
+index 37628f8dbf70..069155f1db9e 100644
 --- a/drivers/gpio/Makefile
 +++ b/drivers/gpio/Makefile
 @@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_AMDPT)	+= gpio-amdpt.o
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch
index 346b9e3e3..1c5d9ab53 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch
@@ -1,4 +1,4 @@
-From f4b91f5c6723e56e106a609cdbcc8da48c56499e Mon Sep 17 00:00:00 2001
+From 2f895fe17cd72124b2a04af306f9349e5da90a6c Mon Sep 17 00:00:00 2001
 From: Vernon Mauery <vernon.mauery@intel.com>
 Date: Wed, 16 May 2018 10:03:14 -0700
 Subject: [PATCH] SGPIO DT and pinctrl fixup
@@ -15,11 +15,11 @@ Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
  4 files changed, 54 insertions(+), 60 deletions(-)
 
 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
-index 6af12872ee74..9aed0f696a98 100644
+index 3990aed25ee6..19f721118b52 100644
 --- a/arch/arm/boot/dts/aspeed-g4.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
-@@ -201,6 +201,18 @@
- 				interrupt-controller;
+@@ -203,6 +203,18 @@
+ 				#interrupt-cells = <2>;
  			};
  
 +			sgpio: sgpio@1e780200 {
@@ -37,7 +37,7 @@ index 6af12872ee74..9aed0f696a98 100644
  			timer: timer@1e782000 {
  				/* This timer is a Faraday FTTMR010 derivative */
  				compatible = "aspeed,ast2400-timer";
-@@ -1150,44 +1162,14 @@
+@@ -1183,44 +1195,14 @@
  		groups = "SD2";
  	};
  
@@ -89,10 +89,10 @@ index 6af12872ee74..9aed0f696a98 100644
  
  	pinctrl_sioonctrl_default: sioonctrl_default {
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index 01e901031bd4..36d72c91a2ad 100644
+index 0c74adf739d2..d4c99b82f7bd 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
-@@ -274,6 +274,9 @@
+@@ -276,6 +276,9 @@
  				reg = <0x1e780200 0x0100>;
  				interrupts = <40>;
  				interrupt-controller;
@@ -101,8 +101,8 @@ index 01e901031bd4..36d72c91a2ad 100644
 +				status = "disabled";
  			};
  
- 			timer: timer@1e782000 {
-@@ -1324,6 +1327,11 @@
+ 			rtc: rtc@1e781000 {
+@@ -1388,6 +1391,11 @@
  		groups = "SDA2";
  	};
  
@@ -207,7 +207,7 @@ index 05b153034517..353af05b8602 100644
  	ASPEED_PINCTRL_FUNC(SIOPBI),
  	ASPEED_PINCTRL_FUNC(SIOPBO),
 diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-index 187abd7693cf..0c89647f166f 100644
+index 4230e1038a88..13f749e35001 100644
 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
 +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
 @@ -577,6 +577,8 @@ SS_PIN_DECL(N3, GPIOJ2, SGPMO);
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch
index 3cd1d9e84..db21250bb 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0010-Update-PECI-drivers-to-sync-with-linux-upstreaming-v.patch
@@ -1,4 +1,4 @@
-From ce7a88017fb2124100c4e5481a205034f34da23c Mon Sep 17 00:00:00 2001
+From 63ccbbe64f7e6560233971b886f6166fc59d20ef Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Mon, 7 Jan 2019 09:56:10 -0800
 Subject: [PATCH] Update PECI drivers to sync with linux upstreaming version
@@ -89,10 +89,10 @@ index 821a9258f2e6..a3a3e465c888 100644
 +temp[6-*]_crit_hyst	Provides the hysteresis value from Tcontrol to Tjmax of
  			the core.
 diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
-index 9e118d700b48..efe67f7faed3 100644
+index 996e80590b5b..93945eb19261 100644
 --- a/drivers/hwmon/Kconfig
 +++ b/drivers/hwmon/Kconfig
-@@ -1319,7 +1319,7 @@ config SENSORS_PECI_CPUTEMP
+@@ -1321,7 +1321,7 @@ config SENSORS_PECI_CPUTEMP
  	  the PECI Client Command Suite via the processor PECI client.
  	  Check Documentation/hwmon/peci-cputemp for details.
  
@@ -101,7 +101,7 @@ index 9e118d700b48..efe67f7faed3 100644
  	  will be called peci-cputemp.
  
  config SENSORS_PECI_DIMMTEMP
-@@ -1333,7 +1333,7 @@ config SENSORS_PECI_DIMMTEMP
+@@ -1335,7 +1335,7 @@ config SENSORS_PECI_DIMMTEMP
  	  Suite via the processor PECI client.
  	  Check Documentation/hwmon/peci-dimmtemp for details.
  
@@ -109,7 +109,7 @@ index 9e118d700b48..efe67f7faed3 100644
 +	  This driver can also be built as a module. If so, the module
  	  will be called peci-dimmtemp.
  
- source drivers/hwmon/pmbus/Kconfig
+ source "drivers/hwmon/pmbus/Kconfig"
 diff --git a/drivers/hwmon/peci-cputemp.c b/drivers/hwmon/peci-cputemp.c
 index 11880c86a854..30ba1638e358 100644
 --- a/drivers/hwmon/peci-cputemp.c
@@ -663,10 +663,10 @@ index 6ca1855a86bb..ce6b470eae63 100644
  
  /**
 diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
-index 66b71a6122d6..28a83b354ea8 100644
+index 9af5730ad7ba..28087e9cd4da 100644
 --- a/drivers/mfd/Kconfig
 +++ b/drivers/mfd/Kconfig
-@@ -596,7 +596,7 @@ config MFD_INTEL_MSIC
+@@ -606,7 +606,7 @@ config MFD_INTEL_MSIC
  	  devices used in Intel Medfield platforms.
  
  config MFD_INTEL_PECI_CLIENT
@@ -675,7 +675,7 @@ index 66b71a6122d6..28a83b354ea8 100644
  	depends on (PECI || COMPILE_TEST)
  	select MFD_CORE
  	help
-@@ -609,6 +609,9 @@ config MFD_INTEL_PECI_CLIENT
+@@ -619,6 +619,9 @@ config MFD_INTEL_PECI_CLIENT
  	  Additional drivers must be enabled in order to use the functionality
  	  of the device.
  
@@ -1940,7 +1940,7 @@ index 51cb2563ceb6..000000000000
 -MODULE_DESCRIPTION("ASPEED PECI driver");
 -MODULE_LICENSE("GPL v2");
 diff --git a/drivers/peci/peci-core.c b/drivers/peci/peci-core.c
-index fac8c72dcda8..e2ef013e5002 100644
+index 6f241469ec7e..e2ef013e5002 100644
 --- a/drivers/peci/peci-core.c
 +++ b/drivers/peci/peci-core.c
 @@ -1,38 +1,31 @@
@@ -2851,7 +2851,7 @@ index fac8c72dcda8..e2ef013e5002 100644
 -		return -ENOTTY;
 -	}
 -
--	if (!access_ok(VERIFY_WRITE, argp, msg_len))
+-	if (!access_ok(argp, msg_len))
 -		return -EFAULT;
 -
 -	msg = memdup_user(argp, msg_len);
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch
index 95302aae8..e6dd44cd7 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0021-Initial-Port-of-Aspeed-LPC-SIO-driver.patch
@@ -111,7 +111,7 @@ index 768278b059c3..de2d5c6d186c 100644
 +obj-$(CONFIG_ASPEED_LPC_SIO)   += aspeed-lpc-sio.o
  obj-$(CONFIG_PCI_ENDPOINT_TEST)	+= pci_endpoint_test.o
  obj-$(CONFIG_OCXL)		+= ocxl/
- obj-$(CONFIG_MISC_RTSX)		+= cardreader/
+ obj-y				+= cardreader/
 diff --git a/drivers/misc/aspeed-lpc-sio.c b/drivers/misc/aspeed-lpc-sio.c
 new file mode 100644
 index 000000000000..c717a3182320
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch
index 120adbbc8..216c750de 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0022-Add-AST2500-eSPI-driver.patch
@@ -1,4 +1,4 @@
-From a01815b4bb983ede71993d6c761dedd22d148b6b Mon Sep 17 00:00:00 2001
+From 3437db37b2f39a69505338546d9f846338de6c88 Mon Sep 17 00:00:00 2001
 From: Haiyue Wang <haiyue.wang@linux.intel.com>
 Date: Sat, 24 Feb 2018 11:12:32 +0800
 Subject: [PATCH] eSPI: add ASPEED AST2500 eSPI driver to boot a host with PCH
@@ -181,10 +181,10 @@ index 000000000000..185acd71bd26
 +<https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0.pdf>`_
 +
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index 4a302d745b09..165a2bddc6cd 100644
+index da9e903808bc..01d27e845982 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
-@@ -266,6 +266,7 @@
+@@ -267,6 +267,7 @@
  				clocks = <&syscon ASPEED_CLK_APB>;
  				interrupt-controller;
  				#interrupt-cells = <2>;
@@ -192,7 +192,7 @@ index 4a302d745b09..165a2bddc6cd 100644
  			};
  
  			sgpio: sgpio@1e780200 {
-@@ -360,6 +361,9 @@
+@@ -361,6 +362,9 @@
  				reg = <0x1e6ee000 0x100>;
  				interrupts = <23>;
  				status = "disabled";
@@ -203,7 +203,7 @@ index 4a302d745b09..165a2bddc6cd 100644
  
  			lpc: lpc@1e789000 {
 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
-index fe1e2a4072a8..f2062546250c 100644
+index d4ed3777462a..8b1fcf741411 100644
 --- a/drivers/misc/Kconfig
 +++ b/drivers/misc/Kconfig
 @@ -485,6 +485,14 @@ config VEXPRESS_SYSCFG
@@ -222,7 +222,7 @@ index fe1e2a4072a8..f2062546250c 100644
  	depends on (ARCH_ASPEED || COMPILE_TEST) && REGMAP && MFD_SYSCON
  	tristate "Aspeed ast2400/2500 HOST LPC to BMC bridge control"
 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
-index a2b85ec21d09..bb89694e6b4b 100644
+index 7b018962cad3..89b051f82391 100644
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
 @@ -53,6 +53,7 @@ obj-$(CONFIG_GENWQE)		+= genwqe/
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch
index 860a1ba5d..89a667e95 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0028-Add-AST2500-JTAG-driver.patch
@@ -1,4 +1,4 @@
-From 43470f186979483ba6c1e6374c7ea3a129622862 Mon Sep 17 00:00:00 2001
+From 409ea2cede8588a59badd5dd7cf8721879d4c68a Mon Sep 17 00:00:00 2001
 From: "Hunt, Bryan" <bryan.hunt@intel.com>
 Date: Fri, 30 Mar 2018 10:48:01 -0700
 Subject: [PATCH] Add AST2500d JTAG driver
@@ -21,10 +21,10 @@ Signed-off-by: Hunt, Bryan <bryan.hunt@intel.com>
  create mode 100644 include/uapi/linux/jtag_drv.h
 
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index a7bbc2adecc9..b63003c2c0c7 100644
+index 01d27e845982..adde826ac1d9 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
-@@ -366,6 +366,15 @@
+@@ -367,6 +367,15 @@
  				pinctrl-0 = <&pinctrl_espi_default>;
  			};
  
@@ -41,17 +41,17 @@ index a7bbc2adecc9..b63003c2c0c7 100644
  				compatible = "aspeed,ast2500-lpc", "simple-mfd";
  				reg = <0x1e789000 0x1000>;
 diff --git a/drivers/Kconfig b/drivers/Kconfig
-index c633db2b41fb..2778a5c33ca5 100644
+index bbb66439a307..a1579d66f47d 100644
 --- a/drivers/Kconfig
 +++ b/drivers/Kconfig
-@@ -221,4 +221,5 @@ source "drivers/slimbus/Kconfig"
+@@ -230,4 +230,5 @@ source "drivers/slimbus/Kconfig"
  
  source "drivers/peci/Kconfig"
  
 +source "drivers/jtag/Kconfig"
  endmenu
 diff --git a/drivers/Makefile b/drivers/Makefile
-index 63c9b425e6e1..714067945fd2 100644
+index 9ec44c032a42..69b201766154 100644
 --- a/drivers/Makefile
 +++ b/drivers/Makefile
 @@ -187,3 +187,4 @@ obj-$(CONFIG_UNISYS_VISORBUS)	+= visorbus/
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch
index 539c976c7..e015f2fd9 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch
@@ -1,4 +1,4 @@
-From e39e3a3e54cbe8e5a39b4148a9232f4570d009a6 Mon Sep 17 00:00:00 2001
+From 37b192b278d5ea5da62b2fcff4fce7cf372e4fe6 Mon Sep 17 00:00:00 2001
 From: Oskar Senft <osk@google.com>
 Date: Wed, 8 Aug 2018 10:15:05 -0400
 Subject: [PATCH] misc: aspeed: Add Aspeed UART routing control driver.
@@ -102,10 +102,10 @@ index 000000000000..afaf17cb7eda
 +$ cat /sys/bus/platform/drivers/aspeed-uart-routing/*.uart_routing/uart1
 +io1 io2 io3 io4 uart2 [uart3] uart4 io6
 diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 655bb37e422f..eb05f5a2c480 100644
+index 8aba46cdce46..d184fdf6dda6 100644
 --- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
 +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -174,6 +174,10 @@
+@@ -227,6 +227,10 @@
  	status = "okay";
  };
  
@@ -117,10 +117,10 @@ index 655bb37e422f..eb05f5a2c480 100644
  	status = "okay";
  
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index 3bb31c1daf9d..92843cc1a8f4 100644
+index adde826ac1d9..5606ac1d96d5 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
-@@ -482,6 +482,12 @@
+@@ -479,6 +479,12 @@
  						status = "disabled";
  					};
  				};
@@ -134,12 +134,12 @@ index 3bb31c1daf9d..92843cc1a8f4 100644
  
  			peci: bus@1e78b000 {
 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
-index f2062546250c..8e2fc51dcc44 100644
+index 8b1fcf741411..60f203c04b9b 100644
 --- a/drivers/misc/Kconfig
 +++ b/drivers/misc/Kconfig
-@@ -537,6 +537,12 @@ config MISC_RTSX
- 	tristate
- 	default MISC_RTSX_PCI || MISC_RTSX_USB
+@@ -560,6 +560,12 @@ config NPCM7XX_PCI_MBOX
+ 	  Expose the NPCM750/730/715/705 PCI MBOX registers found on
+ 	  Nuvoton SOCs to userspace.
  
 +config ASPEED_UART_ROUTING
 +	tristate "Aspeed ast2500 UART routing control"
@@ -151,7 +151,7 @@ index f2062546250c..8e2fc51dcc44 100644
  source "drivers/misc/eeprom/Kconfig"
  source "drivers/misc/cb710/Kconfig"
 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
-index bb89694e6b4b..0f00eb63556c 100644
+index 89b051f82391..8f70b888a9ca 100644
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
 @@ -56,6 +56,7 @@ obj-$(CONFIG_CXL_BASE)		+= cxl/
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0034-arm-dts-adpeed-Swap-the-mac-nodes-numbering.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0034-arm-dts-aspeed-Swap-the-mac-nodes-numbering.patch
index eef3bee6f..b819be69b 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0034-arm-dts-adpeed-Swap-the-mac-nodes-numbering.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0034-arm-dts-aspeed-Swap-the-mac-nodes-numbering.patch
@@ -1,7 +1,7 @@
 From 9c509b9450f641c169ee3aeb60e398c43810dcb2 Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Wed, 3 Oct 2018 10:17:58 -0700
-Subject: [PATCH] arm: dts: adpeed: Swap the mac nodes numbering
+Subject: [PATCH] arm: dts: aspeed: Swap the mac nodes numbering
 
 This patch swaps the numbering of mac0 and mac1 to make a dedicated
 nic get assigned the first ethernet device number.
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch
index 51ddbb18e..3863ea8f6 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0035-Implement-a-memory-driver-share-memory.patch
@@ -1,5 +1,5 @@
-From 1d459c15998c9a79ba7a758cef6129ed29f3b958 Mon Sep 17 00:00:00 2001
-From: cyang29 <cheng.c.yang@intel.com>
+From dae410353f8681b58907c61eb2eb056513d86f6d Mon Sep 17 00:00:00 2001
+From: Cheng C Yang <cheng.c.yang@intel.com>
 Date: Fri, 9 Nov 2018 10:24:37 +0800
 Subject: [PATCH] Implement a memory driver share memory
 
@@ -8,7 +8,7 @@ The driver is used by MDRV2. In MDRV2 BIOS will send whole
 SMBIOS table to VGA memory and BMC can get the table from VGA
 memory through this driver.
 
-Signed-off-by: cyang29 <cheng.c.yang@intel.com>
+Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
 ---
  .../devicetree/bindings/misc/vga-shared-memory.txt |  20 +++
  drivers/misc/Kconfig                               |  10 ++
@@ -45,10 +45,10 @@ index 000000000000..03f57c53e844
 +	reg = <0x9ff00000 0x100000>;
 +};
 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
-index 8e2fc51dcc44..1279a9674537 100644
+index 60f203c04b9b..2d4c6ba87e70 100644
 --- a/drivers/misc/Kconfig
 +++ b/drivers/misc/Kconfig
-@@ -543,6 +543,16 @@ config ASPEED_UART_ROUTING
+@@ -566,6 +566,16 @@ config ASPEED_UART_ROUTING
  	  If you want to configure UART routing on Aspeed BMC platforms, enable
  	  this option.
  
@@ -66,14 +66,17 @@ index 8e2fc51dcc44..1279a9674537 100644
  source "drivers/misc/eeprom/Kconfig"
  source "drivers/misc/cb710/Kconfig"
 diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
-index 0f00eb63556c..f4951a6e435b 100644
+index 8f70b888a9ca..30ee065491ef 100644
 --- a/drivers/misc/Makefile
 +++ b/drivers/misc/Makefile
-@@ -62,3 +62,4 @@ obj-$(CONFIG_ASPEED_LPC_SIO)   += aspeed-lpc-sio.o
+@@ -59,6 +59,7 @@ obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
+ obj-$(CONFIG_ASPEED_UART_ROUTING) += aspeed-uart-routing.o
+ obj-$(CONFIG_ASPEED_LPC_MBOX)	+= aspeed-lpc-mbox.o
+ obj-$(CONFIG_ASPEED_LPC_SIO)   += aspeed-lpc-sio.o
++obj-$(CONFIG_ASPEED_VGA_SHAREDMEM) += aspeed-vga-sharedmem.o
  obj-$(CONFIG_PCI_ENDPOINT_TEST)	+= pci_endpoint_test.o
  obj-$(CONFIG_OCXL)		+= ocxl/
- obj-$(CONFIG_MISC_RTSX)		+= cardreader/
-+obj-$(CONFIG_ASPEED_VGA_SHAREDMEM) += aspeed-vga-sharedmem.o
+ obj-y				+= cardreader/
 diff --git a/drivers/misc/aspeed-vga-sharedmem.c b/drivers/misc/aspeed-vga-sharedmem.c
 new file mode 100644
 index 000000000000..76f60cd67d3a
@@ -245,5 +248,5 @@ index 000000000000..76f60cd67d3a
 +MODULE_DESCRIPTION("Shared VGA memory");
 +MODULE_LICENSE("GPL v2");
 -- 
-2.16.2
+2.7.4
 
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0036-net-ncsi-backport-ncsi-patches.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0036-net-ncsi-backport-ncsi-patches.patch
deleted file mode 100644
index 83717369c..000000000
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0036-net-ncsi-backport-ncsi-patches.patch
+++ /dev/null
@@ -1,1425 +0,0 @@
-From 58c3299017c5e6022fb2a2a74b662b2a4c0306f5 Mon Sep 17 00:00:00 2001
-From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
-Date: Tue, 20 Nov 2018 10:14:47 -0800
-Subject: [PATCH] net/ncsi: backport ncsi patches
-
-net/ncsi: Allow enabling multiple packages & channels
-
-This series extends the NCSI driver to configure multiple packages
-and/or channels simultaneously. Since the RFC series this includes a few
-extra changes to fix areas in the driver that either made this harder or
-were roadblocks due to deviations from the NCSI specification.
-
-Patches 1 & 2 fix two issues where the driver made assumptions about the
-capabilities of the NCSI topology.
-Patches 3 & 4 change some internal semantics slightly to make multi-mode
-easier.
-Patch 5 introduces a cleaner way of reconfiguring the NCSI configuration
-and keeping track of channel states.
-Patch 6 implements the main multi-package/multi-channel configuration,
-configured via the Netlink interface.
-
-Readers who have an interesting NCSI setup - especially multi-package
-with HWA - please test! I think I've covered all permutations but I
-don't have infinite hardware to test on.
-
-net/ncsi: Don't enable all channels when HWA available
-
-NCSI hardware arbitration allows multiple packages to be enabled at once
-and share the same wiring. If the NCSI driver recognises that HWA is
-available it unconditionally enables all packages and channels; but that
-is a configuration decision rather than something required by HWA.
-Additionally the current implementation will not failover on link events
-which can cause connectivity to be lost unless the interface is manually
-bounced.
-
-Retain basic HWA support but remove the separate configuration path to
-enable all channels, leaving this to be handled by a later
-implementation.
-
-net/ncsi: Probe single packages to avoid conflict
-
-Currently the NCSI driver sends a select-package command to all possible
-packages simultaneously to discover what packages are available. However
-at this stage in the probe process the driver does not know if
-hardware arbitration is available: if it isn't then this process could
-cause collisions on the RMII bus when packages try to respond.
-
-Update the probe loop to probe each package one by one, and once
-complete check if HWA is universally supported.
-
-net/ncsi: Don't deselect package in suspend if active
-
-When a package is deselected all channels of that package cease
-communication. If there are other channels active on the package of the
-suspended channel this will disable them as well, so only send a
-deselect-package command if no other channels are active.
-
-net/ncsi: Don't mark configured channels inactive
-
-The concepts of a channel being 'active' and it having link are slightly
-muddled in the NCSI driver. Tweak this slightly so that
-NCSI_CHANNEL_ACTIVE represents a channel that has been configured and
-enabled, and NCSI_CHANNEL_INACTIVE represents a de-configured channel.
-This distinction is important because a channel can be 'active' but have
-its link down; in this case the channel may still need to be configured
-so that it may receive AEN link-state-change packets.
-
-net/ncsi: Reset channel state in ncsi_start_dev()
-
-When the NCSI driver is stopped with ncsi_stop_dev() the channel
-monitors are stopped and the state set to "inactive". However the
-channels are still configured and active from the perspective of the
-network controller. We should suspend each active channel but in the
-context of ncsi_stop_dev() the transmit queue has been or is about to be
-stopped so we won't have time to do so.
-
-Instead when ncsi_start_dev() is called if the NCSI topology has already
-been probed then call ncsi_reset_dev() to suspend any channels that were
-previously active. This resets the network controller to a known state,
-provides an up to date view of channel link state, and makes sure that
-mode flags such as NCSI_MODE_TX_ENABLE are properly reset.
-
-In addition to ncsi_start_dev() use ncsi_reset_dev() in ncsi-netlink.c
-to update the channel configuration more cleanly.
-
-net/ncsi: Configure multi-package, multi-channel modes with failover
-
-This patch extends the ncsi-netlink interface with two new commands and
-three new attributes to configure multiple packages and/or channels at
-once, and configure specific failover modes.
-
-NCSI_CMD_SET_PACKAGE mask and NCSI_CMD_SET_CHANNEL_MASK set a whitelist
-of packages or channels allowed to be configured with the
-NCSI_ATTR_PACKAGE_MASK and NCSI_ATTR_CHANNEL_MASK attributes
-respectively. If one of these whitelists is set only packages or
-channels matching the whitelist are considered for the channel queue in
-ncsi_choose_active_channel().
-
-These commands may also use the NCSI_ATTR_MULTI_FLAG to signal that
-multiple packages or channels may be configured simultaneously. NCSI
-hardware arbitration (HWA) must be available in order to enable
-multi-package mode. Multi-channel mode is always available.
-
-If the NCSI_ATTR_CHANNEL_ID attribute is present in the
-NCSI_CMD_SET_CHANNEL_MASK command the it sets the preferred channel as
-with the NCSI_CMD_SET_INTERFACE command. The combination of preferred
-channel and channel whitelist defines a primary channel and the allowed
-failover channels.
-If the NCSI_ATTR_MULTI_FLAG attribute is also present then the preferred
-channel is configured for Tx/Rx and the other channels are enabled only
-for Rx.
-
-Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
-Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
----
- include/uapi/linux/ncsi.h |  15 ++
- net/ncsi/internal.h       |  19 +-
- net/ncsi/ncsi-aen.c       |  75 +++++--
- net/ncsi/ncsi-manage.c    | 522 ++++++++++++++++++++++++++++++++--------------
- net/ncsi/ncsi-netlink.c   | 233 ++++++++++++++++++---
- net/ncsi/ncsi-rsp.c       |   2 +-
- 6 files changed, 660 insertions(+), 206 deletions(-)
-
-diff --git a/include/uapi/linux/ncsi.h b/include/uapi/linux/ncsi.h
-index 0a26a5576645..a3f87c54fdb3 100644
---- a/include/uapi/linux/ncsi.h
-+++ b/include/uapi/linux/ncsi.h
-@@ -26,6 +26,12 @@
-  * @NCSI_CMD_SEND_CMD: send NC-SI command to network card.
-  *	Requires NCSI_ATTR_IFINDEX, NCSI_ATTR_PACKAGE_ID
-  *	and NCSI_ATTR_CHANNEL_ID.
-+ * @NCSI_CMD_SET_PACKAGE_MASK: set a whitelist of allowed packages.
-+ *	Requires NCSI_ATTR_IFINDEX and NCSI_ATTR_PACKAGE_MASK.
-+ * @NCSI_CMD_SET_CHANNEL_MASK: set a whitelist of allowed channels.
-+ *	Requires NCSI_ATTR_IFINDEX, NCSI_ATTR_PACKAGE_ID, and
-+ *	NCSI_ATTR_CHANNEL_MASK. If NCSI_ATTR_CHANNEL_ID is present it sets
-+ *	the primary channel.
-  * @NCSI_CMD_MAX: highest command number
-  */
- enum ncsi_nl_commands {
-@@ -34,6 +40,8 @@ enum ncsi_nl_commands {
- 	NCSI_CMD_SET_INTERFACE,
- 	NCSI_CMD_CLEAR_INTERFACE,
- 	NCSI_CMD_SEND_CMD,
-+	NCSI_CMD_SET_PACKAGE_MASK,
-+	NCSI_CMD_SET_CHANNEL_MASK,
- 
- 	__NCSI_CMD_AFTER_LAST,
- 	NCSI_CMD_MAX = __NCSI_CMD_AFTER_LAST - 1
-@@ -48,6 +56,10 @@ enum ncsi_nl_commands {
-  * @NCSI_ATTR_PACKAGE_ID: package ID
-  * @NCSI_ATTR_CHANNEL_ID: channel ID
-  * @NCSI_ATTR_DATA: command payload
-+ * @NCSI_ATTR_MULTI_FLAG: flag to signal that multi-mode should be enabled with
-+ *	NCSI_CMD_SET_PACKAGE_MASK or NCSI_CMD_SET_CHANNEL_MASK.
-+ * @NCSI_ATTR_PACKAGE_MASK: 32-bit mask of allowed packages.
-+ * @NCSI_ATTR_CHANNEL_MASK: 32-bit mask of allowed channels.
-  * @NCSI_ATTR_MAX: highest attribute number
-  */
- enum ncsi_nl_attrs {
-@@ -57,6 +69,9 @@ enum ncsi_nl_attrs {
- 	NCSI_ATTR_PACKAGE_ID,
- 	NCSI_ATTR_CHANNEL_ID,
- 	NCSI_ATTR_DATA,
-+	NCSI_ATTR_MULTI_FLAG,
-+	NCSI_ATTR_PACKAGE_MASK,
-+	NCSI_ATTR_CHANNEL_MASK,
- 
- 	__NCSI_ATTR_AFTER_LAST,
- 	NCSI_ATTR_MAX = __NCSI_ATTR_AFTER_LAST - 1
-diff --git a/net/ncsi/internal.h b/net/ncsi/internal.h
-index 1dae77c54009..9e3642b802c4 100644
---- a/net/ncsi/internal.h
-+++ b/net/ncsi/internal.h
-@@ -222,6 +222,10 @@ struct ncsi_package {
- 	unsigned int         channel_num; /* Number of channels     */
- 	struct list_head     channels;    /* List of chanels        */
- 	struct list_head     node;        /* Form list of packages  */
-+
-+	bool                 multi_channel; /* Enable multiple channels  */
-+	u32                  channel_whitelist; /* Channels to configure */
-+	struct ncsi_channel  *preferred_channel; /* Primary channel      */
- };
- 
- struct ncsi_request {
-@@ -287,16 +291,16 @@ struct ncsi_dev_priv {
- #define NCSI_DEV_PROBED		1            /* Finalized NCSI topology    */
- #define NCSI_DEV_HWA		2            /* Enabled HW arbitration     */
- #define NCSI_DEV_RESHUFFLE	4
-+#define NCSI_DEV_RESET		8            /* Reset state of NC          */
- 	unsigned int        gma_flag;        /* OEM GMA flag               */
- 	spinlock_t          lock;            /* Protect the NCSI device    */
- #if IS_ENABLED(CONFIG_IPV6)
- 	unsigned int        inet6_addr_num;  /* Number of IPv6 addresses   */
- #endif
-+	unsigned int        package_probe_id;/* Current ID during probe    */
- 	unsigned int        package_num;     /* Number of packages         */
- 	struct list_head    packages;        /* List of packages           */
- 	struct ncsi_channel *hot_channel;    /* Channel was ever active    */
--	struct ncsi_package *force_package;  /* Force a specific package   */
--	struct ncsi_channel *force_channel;  /* Force a specific channel   */
- 	struct ncsi_request requests[256];   /* Request table              */
- 	unsigned int        request_id;      /* Last used request ID       */
- #define NCSI_REQ_START_IDX	1
-@@ -309,6 +313,9 @@ struct ncsi_dev_priv {
- 	struct list_head    node;            /* Form NCSI device list      */
- #define NCSI_MAX_VLAN_VIDS	15
- 	struct list_head    vlan_vids;       /* List of active VLAN IDs */
-+
-+	bool                multi_package;   /* Enable multiple packages   */
-+	u32                 package_whitelist; /* Packages to configure    */
- };
- 
- struct ncsi_cmd_arg {
-@@ -341,6 +348,7 @@ extern spinlock_t ncsi_dev_lock;
- 	list_for_each_entry_rcu(nc, &np->channels, node)
- 
- /* Resources */
-+int ncsi_reset_dev(struct ncsi_dev *nd);
- void ncsi_start_channel_monitor(struct ncsi_channel *nc);
- void ncsi_stop_channel_monitor(struct ncsi_channel *nc);
- struct ncsi_channel *ncsi_find_channel(struct ncsi_package *np,
-@@ -361,6 +369,13 @@ struct ncsi_request *ncsi_alloc_request(struct ncsi_dev_priv *ndp,
- void ncsi_free_request(struct ncsi_request *nr);
- struct ncsi_dev *ncsi_find_dev(struct net_device *dev);
- int ncsi_process_next_channel(struct ncsi_dev_priv *ndp);
-+bool ncsi_channel_has_link(struct ncsi_channel *channel);
-+bool ncsi_channel_is_last(struct ncsi_dev_priv *ndp,
-+			  struct ncsi_channel *channel);
-+int ncsi_update_tx_channel(struct ncsi_dev_priv *ndp,
-+			   struct ncsi_package *np,
-+			   struct ncsi_channel *disable,
-+			   struct ncsi_channel *enable);
- 
- /* Packet handlers */
- u32 ncsi_calculate_checksum(unsigned char *data, int len);
-diff --git a/net/ncsi/ncsi-aen.c b/net/ncsi/ncsi-aen.c
-index 25e483e8278b..26d67e27551f 100644
---- a/net/ncsi/ncsi-aen.c
-+++ b/net/ncsi/ncsi-aen.c
-@@ -50,13 +50,15 @@ static int ncsi_validate_aen_pkt(struct ncsi_aen_pkt_hdr *h,
- static int ncsi_aen_handler_lsc(struct ncsi_dev_priv *ndp,
- 				struct ncsi_aen_pkt_hdr *h)
- {
--	struct ncsi_aen_lsc_pkt *lsc;
--	struct ncsi_channel *nc;
-+	struct ncsi_channel *nc, *tmp;
- 	struct ncsi_channel_mode *ncm;
--	bool chained;
--	int state;
- 	unsigned long old_data, data;
-+	struct ncsi_aen_lsc_pkt *lsc;
-+	struct ncsi_package *np;
-+	bool had_link, has_link;
- 	unsigned long flags;
-+	bool chained;
-+	int state;
- 
- 	/* Find the NCSI channel */
- 	ncsi_find_package_and_channel(ndp, h->common.channel, NULL, &nc);
-@@ -73,6 +75,9 @@ static int ncsi_aen_handler_lsc(struct ncsi_dev_priv *ndp,
- 	ncm->data[2] = data;
- 	ncm->data[4] = ntohl(lsc->oem_status);
- 
-+	had_link = !!(old_data & 0x1);
-+	has_link = !!(data & 0x1);
-+
- 	netdev_dbg(ndp->ndev.dev, "NCSI: LSC AEN - channel %u state %s\n",
- 		   nc->id, data & 0x1 ? "up" : "down");
- 
-@@ -80,22 +85,60 @@ static int ncsi_aen_handler_lsc(struct ncsi_dev_priv *ndp,
- 	state = nc->state;
- 	spin_unlock_irqrestore(&nc->lock, flags);
- 
--	if (!((old_data ^ data) & 0x1) || chained)
--		return 0;
--	if (!(state == NCSI_CHANNEL_INACTIVE && (data & 0x1)) &&
--	    !(state == NCSI_CHANNEL_ACTIVE && !(data & 0x1)))
-+	if (state == NCSI_CHANNEL_INACTIVE)
-+		netdev_warn(ndp->ndev.dev,
-+			    "NCSI: Inactive channel %u received AEN!\n",
-+			    nc->id);
-+
-+	if ((had_link == has_link) || chained)
- 		return 0;
- 
--	if (!(ndp->flags & NCSI_DEV_HWA) &&
--	    state == NCSI_CHANNEL_ACTIVE)
--		ndp->flags |= NCSI_DEV_RESHUFFLE;
-+	if (!ndp->multi_package && !nc->package->multi_channel) {
-+		if (had_link) {
-+			ndp->flags |= NCSI_DEV_RESHUFFLE;
-+			ncsi_stop_channel_monitor(nc);
-+			spin_lock_irqsave(&ndp->lock, flags);
-+			list_add_tail_rcu(&nc->link, &ndp->channel_queue);
-+			spin_unlock_irqrestore(&ndp->lock, flags);
-+			return ncsi_process_next_channel(ndp);
-+		}
-+		/* Configured channel came up */
-+		return 0;
-+	}
- 
--	ncsi_stop_channel_monitor(nc);
--	spin_lock_irqsave(&ndp->lock, flags);
--	list_add_tail_rcu(&nc->link, &ndp->channel_queue);
--	spin_unlock_irqrestore(&ndp->lock, flags);
-+	if (had_link) {
-+		ncm = &nc->modes[NCSI_MODE_TX_ENABLE];
-+		if (ncsi_channel_is_last(ndp, nc)) {
-+			/* No channels left, reconfigure */
-+			return ncsi_reset_dev(&ndp->ndev);
-+		} else if (ncm->enable) {
-+			/* Need to failover Tx channel */
-+			ncsi_update_tx_channel(ndp, nc->package, nc, NULL);
-+		}
-+	} else if (has_link && nc->package->preferred_channel == nc) {
-+		/* Return Tx to preferred channel */
-+		ncsi_update_tx_channel(ndp, nc->package, NULL, nc);
-+	} else if (has_link) {
-+		NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+			NCSI_FOR_EACH_CHANNEL(np, tmp) {
-+				/* Enable Tx on this channel if the current Tx
-+				 * channel is down.
-+				 */
-+				ncm = &tmp->modes[NCSI_MODE_TX_ENABLE];
-+				if (ncm->enable &&
-+				    !ncsi_channel_has_link(tmp)) {
-+					ncsi_update_tx_channel(ndp, nc->package,
-+							       tmp, nc);
-+					break;
-+				}
-+			}
-+		}
-+	}
- 
--	return ncsi_process_next_channel(ndp);
-+	/* Leave configured channels active in a multi-channel scenario so
-+	 * AEN events are still received.
-+	 */
-+	return 0;
- }
- 
- static int ncsi_aen_handler_cr(struct ncsi_dev_priv *ndp,
-diff --git a/net/ncsi/ncsi-manage.c b/net/ncsi/ncsi-manage.c
-index bfc43b28c7a6..92e59f07f9a7 100644
---- a/net/ncsi/ncsi-manage.c
-+++ b/net/ncsi/ncsi-manage.c
-@@ -28,6 +28,29 @@
- LIST_HEAD(ncsi_dev_list);
- DEFINE_SPINLOCK(ncsi_dev_lock);
- 
-+bool ncsi_channel_has_link(struct ncsi_channel *channel)
-+{
-+	return !!(channel->modes[NCSI_MODE_LINK].data[2] & 0x1);
-+}
-+
-+bool ncsi_channel_is_last(struct ncsi_dev_priv *ndp,
-+			  struct ncsi_channel *channel)
-+{
-+	struct ncsi_package *np;
-+	struct ncsi_channel *nc;
-+
-+	NCSI_FOR_EACH_PACKAGE(ndp, np)
-+		NCSI_FOR_EACH_CHANNEL(np, nc) {
-+			if (nc == channel)
-+				continue;
-+			if (nc->state == NCSI_CHANNEL_ACTIVE &&
-+			    ncsi_channel_has_link(nc))
-+				return false;
-+		}
-+
-+	return true;
-+}
-+
- static void ncsi_report_link(struct ncsi_dev_priv *ndp, bool force_down)
- {
- 	struct ncsi_dev *nd = &ndp->ndev;
-@@ -52,7 +75,7 @@ static void ncsi_report_link(struct ncsi_dev_priv *ndp, bool force_down)
- 				continue;
- 			}
- 
--			if (nc->modes[NCSI_MODE_LINK].data[2] & 0x1) {
-+			if (ncsi_channel_has_link(nc)) {
- 				spin_unlock_irqrestore(&nc->lock, flags);
- 				nd->link_up = 1;
- 				goto report;
-@@ -113,10 +136,8 @@ static void ncsi_channel_monitor(struct timer_list *t)
- 	default:
- 		netdev_err(ndp->ndev.dev, "NCSI Channel %d timed out!\n",
- 			   nc->id);
--		if (!(ndp->flags & NCSI_DEV_HWA)) {
--			ncsi_report_link(ndp, true);
--			ndp->flags |= NCSI_DEV_RESHUFFLE;
--		}
-+		ncsi_report_link(ndp, true);
-+		ndp->flags |= NCSI_DEV_RESHUFFLE;
- 
- 		ncsi_stop_channel_monitor(nc);
- 
-@@ -269,6 +290,7 @@ struct ncsi_package *ncsi_add_package(struct ncsi_dev_priv *ndp,
- 	np->ndp = ndp;
- 	spin_lock_init(&np->lock);
- 	INIT_LIST_HEAD(&np->channels);
-+	np->channel_whitelist = UINT_MAX;
- 
- 	spin_lock_irqsave(&ndp->lock, flags);
- 	tmp = ncsi_find_package(ndp, id);
-@@ -442,12 +464,14 @@ static void ncsi_request_timeout(struct timer_list *t)
- static void ncsi_suspend_channel(struct ncsi_dev_priv *ndp)
- {
- 	struct ncsi_dev *nd = &ndp->ndev;
--	struct ncsi_package *np = ndp->active_package;
--	struct ncsi_channel *nc = ndp->active_channel;
-+	struct ncsi_package *np;
-+	struct ncsi_channel *nc, *tmp;
- 	struct ncsi_cmd_arg nca;
- 	unsigned long flags;
- 	int ret;
- 
-+	np = ndp->active_package;
-+	nc = ndp->active_channel;
- 	nca.ndp = ndp;
- 	nca.req_flags = NCSI_REQ_FLAG_EVENT_DRIVEN;
- 	switch (nd->state) {
-@@ -523,6 +547,15 @@ static void ncsi_suspend_channel(struct ncsi_dev_priv *ndp)
- 		if (ret)
- 			goto error;
- 
-+		NCSI_FOR_EACH_CHANNEL(np, tmp) {
-+			/* If there is another channel active on this package
-+			 * do not deselect the package.
-+			 */
-+			if (tmp != nc && tmp->state == NCSI_CHANNEL_ACTIVE) {
-+				nd->state = ncsi_dev_state_suspend_done;
-+				break;
-+			}
-+		}
- 		break;
- 	case ncsi_dev_state_suspend_deselect:
- 		ndp->pending_req_num = 1;
-@@ -541,8 +574,10 @@ static void ncsi_suspend_channel(struct ncsi_dev_priv *ndp)
- 		spin_lock_irqsave(&nc->lock, flags);
- 		nc->state = NCSI_CHANNEL_INACTIVE;
- 		spin_unlock_irqrestore(&nc->lock, flags);
--		ncsi_process_next_channel(ndp);
--
-+		if (ndp->flags & NCSI_DEV_RESET)
-+			ncsi_reset_dev(nd);
-+		else
-+			ncsi_process_next_channel(ndp);
- 		break;
- 	default:
- 		netdev_warn(nd->dev, "Wrong NCSI state 0x%x in suspend\n",
-@@ -717,13 +752,144 @@ static int ncsi_gma_handler(struct ncsi_cmd_arg *nca, unsigned int mf_id)
- 
- #endif /* CONFIG_NCSI_OEM_CMD_GET_MAC */
- 
-+/* Determine if a given channel from the channel_queue should be used for Tx */
-+static bool ncsi_channel_is_tx(struct ncsi_dev_priv *ndp,
-+			       struct ncsi_channel *nc)
-+{
-+	struct ncsi_channel_mode *ncm;
-+	struct ncsi_channel *channel;
-+	struct ncsi_package *np;
-+
-+	/* Check if any other channel has Tx enabled; a channel may have already
-+	 * been configured and removed from the channel queue.
-+	 */
-+	NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+		if (!ndp->multi_package && np != nc->package)
-+			continue;
-+		NCSI_FOR_EACH_CHANNEL(np, channel) {
-+			ncm = &channel->modes[NCSI_MODE_TX_ENABLE];
-+			if (ncm->enable)
-+				return false;
-+		}
-+	}
-+
-+	/* This channel is the preferred channel and has link */
-+	list_for_each_entry_rcu(channel, &ndp->channel_queue, link) {
-+		np = channel->package;
-+		if (np->preferred_channel &&
-+		    ncsi_channel_has_link(np->preferred_channel)) {
-+			return np->preferred_channel == nc;
-+		}
-+	}
-+
-+	/* This channel has link */
-+	if (ncsi_channel_has_link(nc))
-+		return true;
-+
-+	list_for_each_entry_rcu(channel, &ndp->channel_queue, link)
-+		if (ncsi_channel_has_link(channel))
-+			return false;
-+
-+	/* No other channel has link; default to this one */
-+	return true;
-+}
-+
-+/* Change the active Tx channel in a multi-channel setup */
-+int ncsi_update_tx_channel(struct ncsi_dev_priv *ndp,
-+			   struct ncsi_package *package,
-+			   struct ncsi_channel *disable,
-+			   struct ncsi_channel *enable)
-+{
-+	struct ncsi_cmd_arg nca;
-+	struct ncsi_channel *nc;
-+	struct ncsi_package *np;
-+	int ret = 0;
-+
-+	if (!package->multi_channel && !ndp->multi_package)
-+		netdev_warn(ndp->ndev.dev,
-+			    "NCSI: Trying to update Tx channel in single-channel mode\n");
-+	nca.ndp = ndp;
-+	nca.req_flags = 0;
-+
-+	/* Find current channel with Tx enabled */
-+	NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+		if (disable)
-+			break;
-+		if (!ndp->multi_package && np != package)
-+			continue;
-+
-+		NCSI_FOR_EACH_CHANNEL(np, nc)
-+			if (nc->modes[NCSI_MODE_TX_ENABLE].enable) {
-+				disable = nc;
-+				break;
-+			}
-+	}
-+
-+	/* Find a suitable channel for Tx */
-+	NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+		if (enable)
-+			break;
-+		if (!ndp->multi_package && np != package)
-+			continue;
-+		if (!(ndp->package_whitelist & (0x1 << np->id)))
-+			continue;
-+
-+		if (np->preferred_channel &&
-+		    ncsi_channel_has_link(np->preferred_channel)) {
-+			enable = np->preferred_channel;
-+			break;
-+		}
-+
-+		NCSI_FOR_EACH_CHANNEL(np, nc) {
-+			if (!(np->channel_whitelist & 0x1 << nc->id))
-+				continue;
-+			if (nc->state != NCSI_CHANNEL_ACTIVE)
-+				continue;
-+			if (ncsi_channel_has_link(nc)) {
-+				enable = nc;
-+				break;
-+			}
-+		}
-+	}
-+
-+	if (disable == enable)
-+		return -1;
-+
-+	if (!enable)
-+		return -1;
-+
-+	if (disable) {
-+		nca.channel = disable->id;
-+		nca.package = disable->package->id;
-+		nca.type = NCSI_PKT_CMD_DCNT;
-+		ret = ncsi_xmit_cmd(&nca);
-+		if (ret)
-+			netdev_err(ndp->ndev.dev,
-+				   "Error %d sending DCNT\n",
-+				   ret);
-+	}
-+
-+	netdev_info(ndp->ndev.dev, "NCSI: channel %u enables Tx\n", enable->id);
-+
-+	nca.channel = enable->id;
-+	nca.package = enable->package->id;
-+	nca.type = NCSI_PKT_CMD_ECNT;
-+	ret = ncsi_xmit_cmd(&nca);
-+	if (ret)
-+		netdev_err(ndp->ndev.dev,
-+			   "Error %d sending ECNT\n",
-+			   ret);
-+
-+	return ret;
-+}
-+
- static void ncsi_configure_channel(struct ncsi_dev_priv *ndp)
- {
--	struct ncsi_dev *nd = &ndp->ndev;
--	struct net_device *dev = nd->dev;
- 	struct ncsi_package *np = ndp->active_package;
- 	struct ncsi_channel *nc = ndp->active_channel;
- 	struct ncsi_channel *hot_nc = NULL;
-+	struct ncsi_dev *nd = &ndp->ndev;
-+	struct net_device *dev = nd->dev;
- 	struct ncsi_cmd_arg nca;
- 	unsigned char index;
- 	unsigned long flags;
-@@ -845,20 +1011,29 @@ static void ncsi_configure_channel(struct ncsi_dev_priv *ndp)
- 		} else if (nd->state == ncsi_dev_state_config_ebf) {
- 			nca.type = NCSI_PKT_CMD_EBF;
- 			nca.dwords[0] = nc->caps[NCSI_CAP_BC].cap;
--			nd->state = ncsi_dev_state_config_ecnt;
-+			if (ncsi_channel_is_tx(ndp, nc))
-+				nd->state = ncsi_dev_state_config_ecnt;
-+			else
-+				nd->state = ncsi_dev_state_config_ec;
- #if IS_ENABLED(CONFIG_IPV6)
- 			if (ndp->inet6_addr_num > 0 &&
- 			    (nc->caps[NCSI_CAP_GENERIC].cap &
- 			     NCSI_CAP_GENERIC_MC))
- 				nd->state = ncsi_dev_state_config_egmf;
--			else
--				nd->state = ncsi_dev_state_config_ecnt;
- 		} else if (nd->state == ncsi_dev_state_config_egmf) {
- 			nca.type = NCSI_PKT_CMD_EGMF;
- 			nca.dwords[0] = nc->caps[NCSI_CAP_MC].cap;
--			nd->state = ncsi_dev_state_config_ecnt;
-+			if (ncsi_channel_is_tx(ndp, nc))
-+				nd->state = ncsi_dev_state_config_ecnt;
-+			else
-+				nd->state = ncsi_dev_state_config_ec;
- #endif /* CONFIG_IPV6 */
- 		} else if (nd->state == ncsi_dev_state_config_ecnt) {
-+			if (np->preferred_channel &&
-+			    nc != np->preferred_channel)
-+				netdev_info(ndp->ndev.dev,
-+					    "NCSI: Tx failed over to channel %u\n",
-+					    nc->id);
- 			nca.type = NCSI_PKT_CMD_ECNT;
- 			nd->state = ncsi_dev_state_config_ec;
- 		} else if (nd->state == ncsi_dev_state_config_ec) {
-@@ -889,6 +1064,16 @@ static void ncsi_configure_channel(struct ncsi_dev_priv *ndp)
- 		netdev_dbg(ndp->ndev.dev, "NCSI: channel %u config done\n",
- 			   nc->id);
- 		spin_lock_irqsave(&nc->lock, flags);
-+		nc->state = NCSI_CHANNEL_ACTIVE;
-+
-+		if (ndp->flags & NCSI_DEV_RESET) {
-+			/* A reset event happened during config, start it now */
-+			nc->reconfigure_needed = false;
-+			spin_unlock_irqrestore(&nc->lock, flags);
-+			ncsi_reset_dev(nd);
-+			break;
-+		}
-+
- 		if (nc->reconfigure_needed) {
- 			/* This channel's configuration has been updated
- 			 * part-way during the config state - start the
-@@ -909,10 +1094,8 @@ static void ncsi_configure_channel(struct ncsi_dev_priv *ndp)
- 
- 		if (nc->modes[NCSI_MODE_LINK].data[2] & 0x1) {
- 			hot_nc = nc;
--			nc->state = NCSI_CHANNEL_ACTIVE;
- 		} else {
- 			hot_nc = NULL;
--			nc->state = NCSI_CHANNEL_INACTIVE;
- 			netdev_dbg(ndp->ndev.dev,
- 				   "NCSI: channel %u link down after config\n",
- 				   nc->id);
-@@ -940,43 +1123,35 @@ static void ncsi_configure_channel(struct ncsi_dev_priv *ndp)
- 
- static int ncsi_choose_active_channel(struct ncsi_dev_priv *ndp)
- {
--	struct ncsi_package *np, *force_package;
--	struct ncsi_channel *nc, *found, *hot_nc, *force_channel;
-+	struct ncsi_channel *nc, *found, *hot_nc;
- 	struct ncsi_channel_mode *ncm;
--	unsigned long flags;
-+	unsigned long flags, cflags;
-+	struct ncsi_package *np;
-+	bool with_link;
- 
- 	spin_lock_irqsave(&ndp->lock, flags);
- 	hot_nc = ndp->hot_channel;
--	force_channel = ndp->force_channel;
--	force_package = ndp->force_package;
- 	spin_unlock_irqrestore(&ndp->lock, flags);
- 
--	/* Force a specific channel whether or not it has link if we have been
--	 * configured to do so
--	 */
--	if (force_package && force_channel) {
--		found = force_channel;
--		ncm = &found->modes[NCSI_MODE_LINK];
--		if (!(ncm->data[2] & 0x1))
--			netdev_info(ndp->ndev.dev,
--				    "NCSI: Channel %u forced, but it is link down\n",
--				    found->id);
--		goto out;
--	}
--
--	/* The search is done once an inactive channel with up
--	 * link is found.
-+	/* By default the search is done once an inactive channel with up
-+	 * link is found, unless a preferred channel is set.
-+	 * If multi_package or multi_channel are configured all channels in the
-+	 * whitelist are added to the channel queue.
- 	 */
- 	found = NULL;
-+	with_link = false;
- 	NCSI_FOR_EACH_PACKAGE(ndp, np) {
--		if (ndp->force_package && np != ndp->force_package)
-+		if (!(ndp->package_whitelist & (0x1 << np->id)))
- 			continue;
- 		NCSI_FOR_EACH_CHANNEL(np, nc) {
--			spin_lock_irqsave(&nc->lock, flags);
-+			if (!(np->channel_whitelist & (0x1 << nc->id)))
-+				continue;
-+
-+			spin_lock_irqsave(&nc->lock, cflags);
- 
- 			if (!list_empty(&nc->link) ||
- 			    nc->state != NCSI_CHANNEL_INACTIVE) {
--				spin_unlock_irqrestore(&nc->lock, flags);
-+				spin_unlock_irqrestore(&nc->lock, cflags);
- 				continue;
- 			}
- 
-@@ -988,32 +1163,49 @@ static int ncsi_choose_active_channel(struct ncsi_dev_priv *ndp)
- 
- 			ncm = &nc->modes[NCSI_MODE_LINK];
- 			if (ncm->data[2] & 0x1) {
--				spin_unlock_irqrestore(&nc->lock, flags);
- 				found = nc;
--				goto out;
-+				with_link = true;
- 			}
- 
--			spin_unlock_irqrestore(&nc->lock, flags);
-+			/* If multi_channel is enabled configure all valid
-+			 * channels whether or not they currently have link
-+			 * so they will have AENs enabled.
-+			 */
-+			if (with_link || np->multi_channel) {
-+				spin_lock_irqsave(&ndp->lock, flags);
-+				list_add_tail_rcu(&nc->link,
-+						  &ndp->channel_queue);
-+				spin_unlock_irqrestore(&ndp->lock, flags);
-+
-+				netdev_dbg(ndp->ndev.dev,
-+					   "NCSI: Channel %u added to queue (link %s)\n",
-+					   nc->id,
-+					   ncm->data[2] & 0x1 ? "up" : "down");
-+			}
-+
-+			spin_unlock_irqrestore(&nc->lock, cflags);
-+
-+			if (with_link && !np->multi_channel)
-+				break;
- 		}
-+		if (with_link && !ndp->multi_package)
-+			break;
- 	}
- 
--	if (!found) {
-+	if (list_empty(&ndp->channel_queue) && found) {
-+		netdev_info(ndp->ndev.dev,
-+			    "NCSI: No channel with link found, configuring channel %u\n",
-+			    found->id);
-+		spin_lock_irqsave(&ndp->lock, flags);
-+		list_add_tail_rcu(&found->link, &ndp->channel_queue);
-+		spin_unlock_irqrestore(&ndp->lock, flags);
-+	} else if (!found) {
- 		netdev_warn(ndp->ndev.dev,
--			    "NCSI: No channel found with link\n");
-+			    "NCSI: No channel found to configure!\n");
- 		ncsi_report_link(ndp, true);
- 		return -ENODEV;
- 	}
- 
--	ncm = &found->modes[NCSI_MODE_LINK];
--	netdev_dbg(ndp->ndev.dev,
--		   "NCSI: Channel %u added to queue (link %s)\n",
--		   found->id, ncm->data[2] & 0x1 ? "up" : "down");
--
--out:
--	spin_lock_irqsave(&ndp->lock, flags);
--	list_add_tail_rcu(&found->link, &ndp->channel_queue);
--	spin_unlock_irqrestore(&ndp->lock, flags);
--
- 	return ncsi_process_next_channel(ndp);
- }
- 
-@@ -1050,35 +1242,6 @@ static bool ncsi_check_hwa(struct ncsi_dev_priv *ndp)
- 	return false;
- }
- 
--static int ncsi_enable_hwa(struct ncsi_dev_priv *ndp)
--{
--	struct ncsi_package *np;
--	struct ncsi_channel *nc;
--	unsigned long flags;
--
--	/* Move all available channels to processing queue */
--	spin_lock_irqsave(&ndp->lock, flags);
--	NCSI_FOR_EACH_PACKAGE(ndp, np) {
--		NCSI_FOR_EACH_CHANNEL(np, nc) {
--			WARN_ON_ONCE(nc->state != NCSI_CHANNEL_INACTIVE ||
--				     !list_empty(&nc->link));
--			ncsi_stop_channel_monitor(nc);
--			list_add_tail_rcu(&nc->link, &ndp->channel_queue);
--		}
--	}
--	spin_unlock_irqrestore(&ndp->lock, flags);
--
--	/* We can have no channels in extremely case */
--	if (list_empty(&ndp->channel_queue)) {
--		netdev_err(ndp->ndev.dev,
--			   "NCSI: No available channels for HWA\n");
--		ncsi_report_link(ndp, false);
--		return -ENOENT;
--	}
--
--	return ncsi_process_next_channel(ndp);
--}
--
- static void ncsi_probe_channel(struct ncsi_dev_priv *ndp)
- {
- 	struct ncsi_dev *nd = &ndp->ndev;
-@@ -1110,70 +1273,28 @@ static void ncsi_probe_channel(struct ncsi_dev_priv *ndp)
- 		nd->state = ncsi_dev_state_probe_package;
- 		break;
- 	case ncsi_dev_state_probe_package:
--		ndp->pending_req_num = 16;
-+		ndp->pending_req_num = 1;
- 
--		/* Select all possible packages */
- 		nca.type = NCSI_PKT_CMD_SP;
- 		nca.bytes[0] = 1;
-+		nca.package = ndp->package_probe_id;
- 		nca.channel = NCSI_RESERVED_CHANNEL;
--		for (index = 0; index < 8; index++) {
--			nca.package = index;
--			ret = ncsi_xmit_cmd(&nca);
--			if (ret)
--				goto error;
--		}
--
--		/* Disable all possible packages */
--		nca.type = NCSI_PKT_CMD_DP;
--		for (index = 0; index < 8; index++) {
--			nca.package = index;
--			ret = ncsi_xmit_cmd(&nca);
--			if (ret)
--				goto error;
--		}
--
-+		ret = ncsi_xmit_cmd(&nca);
-+		if (ret)
-+			goto error;
- 		nd->state = ncsi_dev_state_probe_channel;
- 		break;
- 	case ncsi_dev_state_probe_channel:
--		if (!ndp->active_package)
--			ndp->active_package = list_first_or_null_rcu(
--				&ndp->packages, struct ncsi_package, node);
--		else if (list_is_last(&ndp->active_package->node,
--				      &ndp->packages))
--			ndp->active_package = NULL;
--		else
--			ndp->active_package = list_next_entry(
--				ndp->active_package, node);
--
--		/* All available packages and channels are enumerated. The
--		 * enumeration happens for once when the NCSI interface is
--		 * started. So we need continue to start the interface after
--		 * the enumeration.
--		 *
--		 * We have to choose an active channel before configuring it.
--		 * Note that we possibly don't have active channel in extreme
--		 * situation.
--		 */
-+		ndp->active_package = ncsi_find_package(ndp,
-+							ndp->package_probe_id);
- 		if (!ndp->active_package) {
--			ndp->flags |= NCSI_DEV_PROBED;
--			if (ncsi_check_hwa(ndp))
--				ncsi_enable_hwa(ndp);
--			else
--				ncsi_choose_active_channel(ndp);
--			return;
-+			/* No response */
-+			nd->state = ncsi_dev_state_probe_dp;
-+			schedule_work(&ndp->work);
-+			break;
- 		}
--
--		/* Select the active package */
--		ndp->pending_req_num = 1;
--		nca.type = NCSI_PKT_CMD_SP;
--		nca.bytes[0] = 1;
--		nca.package = ndp->active_package->id;
--		nca.channel = NCSI_RESERVED_CHANNEL;
--		ret = ncsi_xmit_cmd(&nca);
--		if (ret)
--			goto error;
--
- 		nd->state = ncsi_dev_state_probe_cis;
-+		schedule_work(&ndp->work);
- 		break;
- 	case ncsi_dev_state_probe_cis:
- 		ndp->pending_req_num = NCSI_RESERVED_CHANNEL;
-@@ -1222,22 +1343,35 @@ static void ncsi_probe_channel(struct ncsi_dev_priv *ndp)
- 	case ncsi_dev_state_probe_dp:
- 		ndp->pending_req_num = 1;
- 
--		/* Deselect the active package */
-+		/* Deselect the current package */
- 		nca.type = NCSI_PKT_CMD_DP;
--		nca.package = ndp->active_package->id;
-+		nca.package = ndp->package_probe_id;
- 		nca.channel = NCSI_RESERVED_CHANNEL;
- 		ret = ncsi_xmit_cmd(&nca);
- 		if (ret)
- 			goto error;
- 
--		/* Scan channels in next package */
--		nd->state = ncsi_dev_state_probe_channel;
-+		/* Probe next package */
-+		ndp->package_probe_id++;
-+		if (ndp->package_probe_id >= 8) {
-+			/* Probe finished */
-+			ndp->flags |= NCSI_DEV_PROBED;
-+			break;
-+		}
-+		nd->state = ncsi_dev_state_probe_package;
-+		ndp->active_package = NULL;
- 		break;
- 	default:
- 		netdev_warn(nd->dev, "Wrong NCSI state 0x%0x in enumeration\n",
- 			    nd->state);
- 	}
- 
-+	if (ndp->flags & NCSI_DEV_PROBED) {
-+		/* Check if all packages have HWA support */
-+		ncsi_check_hwa(ndp);
-+		ncsi_choose_active_channel(ndp);
-+	}
-+
- 	return;
- error:
- 	netdev_err(ndp->ndev.dev,
-@@ -1556,6 +1690,7 @@ struct ncsi_dev *ncsi_register_dev(struct net_device *dev,
- 	INIT_LIST_HEAD(&ndp->channel_queue);
- 	INIT_LIST_HEAD(&ndp->vlan_vids);
- 	INIT_WORK(&ndp->work, ncsi_dev_work);
-+	ndp->package_whitelist = UINT_MAX;
- 
- 	/* Initialize private NCSI device */
- 	spin_lock_init(&ndp->lock);
-@@ -1592,26 +1727,19 @@ EXPORT_SYMBOL_GPL(ncsi_register_dev);
- int ncsi_start_dev(struct ncsi_dev *nd)
- {
- 	struct ncsi_dev_priv *ndp = TO_NCSI_DEV_PRIV(nd);
--	int ret;
- 
- 	if (nd->state != ncsi_dev_state_registered &&
- 	    nd->state != ncsi_dev_state_functional)
- 		return -ENOTTY;
- 
- 	if (!(ndp->flags & NCSI_DEV_PROBED)) {
-+		ndp->package_probe_id = 0;
- 		nd->state = ncsi_dev_state_probe;
- 		schedule_work(&ndp->work);
- 		return 0;
- 	}
- 
--	if (ndp->flags & NCSI_DEV_HWA) {
--		netdev_info(ndp->ndev.dev, "NCSI: Enabling HWA mode\n");
--		ret = ncsi_enable_hwa(ndp);
--	} else {
--		ret = ncsi_choose_active_channel(ndp);
--	}
--
--	return ret;
-+	return ncsi_reset_dev(nd);
- }
- EXPORT_SYMBOL_GPL(ncsi_start_dev);
- 
-@@ -1624,7 +1752,10 @@ void ncsi_stop_dev(struct ncsi_dev *nd)
- 	int old_state;
- 	unsigned long flags;
- 
--	/* Stop the channel monitor and reset channel's state */
-+	/* Stop the channel monitor on any active channels. Don't reset the
-+	 * channel state so we know which were active when ncsi_start_dev()
-+	 * is next called.
-+	 */
- 	NCSI_FOR_EACH_PACKAGE(ndp, np) {
- 		NCSI_FOR_EACH_CHANNEL(np, nc) {
- 			ncsi_stop_channel_monitor(nc);
-@@ -1632,7 +1763,6 @@ void ncsi_stop_dev(struct ncsi_dev *nd)
- 			spin_lock_irqsave(&nc->lock, flags);
- 			chained = !list_empty(&nc->link);
- 			old_state = nc->state;
--			nc->state = NCSI_CHANNEL_INACTIVE;
- 			spin_unlock_irqrestore(&nc->lock, flags);
- 
- 			WARN_ON_ONCE(chained ||
-@@ -1645,6 +1775,92 @@ void ncsi_stop_dev(struct ncsi_dev *nd)
- }
- EXPORT_SYMBOL_GPL(ncsi_stop_dev);
- 
-+int ncsi_reset_dev(struct ncsi_dev *nd)
-+{
-+	struct ncsi_dev_priv *ndp = TO_NCSI_DEV_PRIV(nd);
-+	struct ncsi_channel *nc, *active, *tmp;
-+	struct ncsi_package *np;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&ndp->lock, flags);
-+
-+	if (!(ndp->flags & NCSI_DEV_RESET)) {
-+		/* Haven't been called yet, check states */
-+		switch (nd->state & ncsi_dev_state_major) {
-+		case ncsi_dev_state_registered:
-+		case ncsi_dev_state_probe:
-+			/* Not even probed yet - do nothing */
-+			spin_unlock_irqrestore(&ndp->lock, flags);
-+			return 0;
-+		case ncsi_dev_state_suspend:
-+		case ncsi_dev_state_config:
-+			/* Wait for the channel to finish its suspend/config
-+			 * operation; once it finishes it will check for
-+			 * NCSI_DEV_RESET and reset the state.
-+			 */
-+			ndp->flags |= NCSI_DEV_RESET;
-+			spin_unlock_irqrestore(&ndp->lock, flags);
-+			return 0;
-+		}
-+	} else {
-+		switch (nd->state) {
-+		case ncsi_dev_state_suspend_done:
-+		case ncsi_dev_state_config_done:
-+		case ncsi_dev_state_functional:
-+			/* Ok */
-+			break;
-+		default:
-+			/* Current reset operation happening */
-+			spin_unlock_irqrestore(&ndp->lock, flags);
-+			return 0;
-+		}
-+	}
-+
-+	if (!list_empty(&ndp->channel_queue)) {
-+		/* Clear any channel queue we may have interrupted */
-+		list_for_each_entry_safe(nc, tmp, &ndp->channel_queue, link)
-+			list_del_init(&nc->link);
-+	}
-+	spin_unlock_irqrestore(&ndp->lock, flags);
-+
-+	active = NULL;
-+	NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+		NCSI_FOR_EACH_CHANNEL(np, nc) {
-+			spin_lock_irqsave(&nc->lock, flags);
-+
-+			if (nc->state == NCSI_CHANNEL_ACTIVE) {
-+				active = nc;
-+				nc->state = NCSI_CHANNEL_INVISIBLE;
-+				spin_unlock_irqrestore(&nc->lock, flags);
-+				ncsi_stop_channel_monitor(nc);
-+				break;
-+			}
-+
-+			spin_unlock_irqrestore(&nc->lock, flags);
-+		}
-+		if (active)
-+			break;
-+	}
-+
-+	if (!active) {
-+		/* Done */
-+		spin_lock_irqsave(&ndp->lock, flags);
-+		ndp->flags &= ~NCSI_DEV_RESET;
-+		spin_unlock_irqrestore(&ndp->lock, flags);
-+		return ncsi_choose_active_channel(ndp);
-+	}
-+
-+	spin_lock_irqsave(&ndp->lock, flags);
-+	ndp->flags |= NCSI_DEV_RESET;
-+	ndp->active_channel = active;
-+	ndp->active_package = active->package;
-+	spin_unlock_irqrestore(&ndp->lock, flags);
-+
-+	nd->state = ncsi_dev_state_suspend;
-+	schedule_work(&ndp->work);
-+	return 0;
-+}
-+
- void ncsi_unregister_dev(struct ncsi_dev *nd)
- {
- 	struct ncsi_dev_priv *ndp = TO_NCSI_DEV_PRIV(nd);
-diff --git a/net/ncsi/ncsi-netlink.c b/net/ncsi/ncsi-netlink.c
-index 33314381b4f5..5d782445d2fc 100644
---- a/net/ncsi/ncsi-netlink.c
-+++ b/net/ncsi/ncsi-netlink.c
-@@ -30,6 +30,9 @@ static const struct nla_policy ncsi_genl_policy[NCSI_ATTR_MAX + 1] = {
- 	[NCSI_ATTR_PACKAGE_ID] =	{ .type = NLA_U32 },
- 	[NCSI_ATTR_CHANNEL_ID] =	{ .type = NLA_U32 },
- 	[NCSI_ATTR_DATA] =		{ .type = NLA_BINARY, .len = 2048 },
-+	[NCSI_ATTR_MULTI_FLAG] =	{ .type = NLA_FLAG },
-+	[NCSI_ATTR_PACKAGE_MASK] =	{ .type = NLA_U32 },
-+	[NCSI_ATTR_CHANNEL_MASK] =	{ .type = NLA_U32 },
- };
- 
- static struct ncsi_dev_priv *ndp_from_ifindex(struct net *net, u32 ifindex)
-@@ -69,7 +72,7 @@ static int ncsi_write_channel_info(struct sk_buff *skb,
- 	nla_put_u32(skb, NCSI_CHANNEL_ATTR_LINK_STATE, m->data[2]);
- 	if (nc->state == NCSI_CHANNEL_ACTIVE)
- 		nla_put_flag(skb, NCSI_CHANNEL_ATTR_ACTIVE);
--	if (ndp->force_channel == nc)
-+	if (nc == nc->package->preferred_channel)
- 		nla_put_flag(skb, NCSI_CHANNEL_ATTR_FORCED);
- 
- 	nla_put_u32(skb, NCSI_CHANNEL_ATTR_VERSION_MAJOR, nc->version.version);
-@@ -114,7 +117,7 @@ static int ncsi_write_package_info(struct sk_buff *skb,
- 		if (!pnest)
- 			return -ENOMEM;
- 		nla_put_u32(skb, NCSI_PKG_ATTR_ID, np->id);
--		if (ndp->force_package == np)
-+		if ((0x1 << np->id) == ndp->package_whitelist)
- 			nla_put_flag(skb, NCSI_PKG_ATTR_FORCED);
- 		cnest = nla_nest_start(skb, NCSI_PKG_ATTR_CHANNEL_LIST);
- 		if (!cnest) {
-@@ -290,49 +293,58 @@ static int ncsi_set_interface_nl(struct sk_buff *msg, struct genl_info *info)
- 	package_id = nla_get_u32(info->attrs[NCSI_ATTR_PACKAGE_ID]);
- 	package = NULL;
- 
--	spin_lock_irqsave(&ndp->lock, flags);
--
- 	NCSI_FOR_EACH_PACKAGE(ndp, np)
- 		if (np->id == package_id)
- 			package = np;
- 	if (!package) {
- 		/* The user has set a package that does not exist */
--		spin_unlock_irqrestore(&ndp->lock, flags);
- 		return -ERANGE;
- 	}
- 
- 	channel = NULL;
--	if (!info->attrs[NCSI_ATTR_CHANNEL_ID]) {
--		/* Allow any channel */
--		channel_id = NCSI_RESERVED_CHANNEL;
--	} else {
-+	if (info->attrs[NCSI_ATTR_CHANNEL_ID]) {
- 		channel_id = nla_get_u32(info->attrs[NCSI_ATTR_CHANNEL_ID]);
- 		NCSI_FOR_EACH_CHANNEL(package, nc)
--			if (nc->id == channel_id)
-+			if (nc->id == channel_id) {
- 				channel = nc;
-+				break;
-+			}
-+		if (!channel) {
-+			netdev_info(ndp->ndev.dev,
-+				    "NCSI: Channel %u does not exist!\n",
-+				    channel_id);
-+			return -ERANGE;
-+		}
- 	}
- 
--	if (channel_id != NCSI_RESERVED_CHANNEL && !channel) {
--		/* The user has set a channel that does not exist on this
--		 * package
--		 */
--		spin_unlock_irqrestore(&ndp->lock, flags);
--		netdev_info(ndp->ndev.dev, "NCSI: Channel %u does not exist!\n",
--			    channel_id);
--		return -ERANGE;
--	}
--
--	ndp->force_package = package;
--	ndp->force_channel = channel;
-+	spin_lock_irqsave(&ndp->lock, flags);
-+	ndp->package_whitelist = 0x1 << package->id;
-+	ndp->multi_package = false;
- 	spin_unlock_irqrestore(&ndp->lock, flags);
- 
--	netdev_info(ndp->ndev.dev, "Set package 0x%x, channel 0x%x%s as preferred\n",
--		    package_id, channel_id,
--		    channel_id == NCSI_RESERVED_CHANNEL ? " (any)" : "");
-+	spin_lock_irqsave(&package->lock, flags);
-+	package->multi_channel = false;
-+	if (channel) {
-+		package->channel_whitelist = 0x1 << channel->id;
-+		package->preferred_channel = channel;
-+	} else {
-+		/* Allow any channel */
-+		package->channel_whitelist = UINT_MAX;
-+		package->preferred_channel = NULL;
-+	}
-+	spin_unlock_irqrestore(&package->lock, flags);
-+
-+	if (channel)
-+		netdev_info(ndp->ndev.dev,
-+			    "Set package 0x%x, channel 0x%x as preferred\n",
-+			    package_id, channel_id);
-+	else
-+		netdev_info(ndp->ndev.dev, "Set package 0x%x as preferred\n",
-+			    package_id);
- 
--	/* Bounce the NCSI channel to set changes */
--	ncsi_stop_dev(&ndp->ndev);
--	ncsi_start_dev(&ndp->ndev);
-+	/* Update channel configuration */
-+	if (!(ndp->flags & NCSI_DEV_RESET))
-+		ncsi_reset_dev(&ndp->ndev);
- 
- 	return 0;
- }
-@@ -340,6 +352,7 @@ static int ncsi_set_interface_nl(struct sk_buff *msg, struct genl_info *info)
- static int ncsi_clear_interface_nl(struct sk_buff *msg, struct genl_info *info)
- {
- 	struct ncsi_dev_priv *ndp;
-+	struct ncsi_package *np;
- 	unsigned long flags;
- 
- 	if (!info || !info->attrs)
-@@ -353,16 +366,24 @@ static int ncsi_clear_interface_nl(struct sk_buff *msg, struct genl_info *info)
- 	if (!ndp)
- 		return -ENODEV;
- 
--	/* Clear any override */
-+	/* Reset any whitelists and disable multi mode */
- 	spin_lock_irqsave(&ndp->lock, flags);
--	ndp->force_package = NULL;
--	ndp->force_channel = NULL;
-+	ndp->package_whitelist = UINT_MAX;
-+	ndp->multi_package = false;
- 	spin_unlock_irqrestore(&ndp->lock, flags);
-+
-+	NCSI_FOR_EACH_PACKAGE(ndp, np) {
-+		spin_lock_irqsave(&np->lock, flags);
-+		np->multi_channel = false;
-+		np->channel_whitelist = UINT_MAX;
-+		np->preferred_channel = NULL;
-+		spin_unlock_irqrestore(&np->lock, flags);
-+	}
- 	netdev_info(ndp->ndev.dev, "NCSI: Cleared preferred package/channel\n");
- 
--	/* Bounce the NCSI channel to set changes */
--	ncsi_stop_dev(&ndp->ndev);
--	ncsi_start_dev(&ndp->ndev);
-+	/* Update channel configuration */
-+	if (!(ndp->flags & NCSI_DEV_RESET))
-+		ncsi_reset_dev(&ndp->ndev);
- 
- 	return 0;
- }
-@@ -563,6 +584,138 @@ int ncsi_send_netlink_err(struct net_device *dev,
- 	return nlmsg_unicast(net->genl_sock, skb, snd_portid);
- }
- 
-+static int ncsi_set_package_mask_nl(struct sk_buff *msg,
-+				    struct genl_info *info)
-+{
-+	struct ncsi_dev_priv *ndp;
-+	unsigned long flags;
-+	int rc;
-+
-+	if (!info || !info->attrs)
-+		return -EINVAL;
-+
-+	if (!info->attrs[NCSI_ATTR_IFINDEX])
-+		return -EINVAL;
-+
-+	if (!info->attrs[NCSI_ATTR_PACKAGE_MASK])
-+		return -EINVAL;
-+
-+	ndp = ndp_from_ifindex(get_net(sock_net(msg->sk)),
-+			       nla_get_u32(info->attrs[NCSI_ATTR_IFINDEX]));
-+	if (!ndp)
-+		return -ENODEV;
-+
-+	spin_lock_irqsave(&ndp->lock, flags);
-+	if (nla_get_flag(info->attrs[NCSI_ATTR_MULTI_FLAG])) {
-+		if (ndp->flags & NCSI_DEV_HWA) {
-+			ndp->multi_package = true;
-+			rc = 0;
-+		} else {
-+			netdev_err(ndp->ndev.dev,
-+				   "NCSI: Can't use multiple packages without HWA\n");
-+			rc = -EPERM;
-+		}
-+	} else {
-+		ndp->multi_package = false;
-+		rc = 0;
-+	}
-+
-+	if (!rc)
-+		ndp->package_whitelist =
-+			nla_get_u32(info->attrs[NCSI_ATTR_PACKAGE_MASK]);
-+	spin_unlock_irqrestore(&ndp->lock, flags);
-+
-+	if (!rc) {
-+		/* Update channel configuration */
-+		if (!(ndp->flags & NCSI_DEV_RESET))
-+			ncsi_reset_dev(&ndp->ndev);
-+	}
-+
-+	return rc;
-+}
-+
-+static int ncsi_set_channel_mask_nl(struct sk_buff *msg,
-+				    struct genl_info *info)
-+{
-+	struct ncsi_package *np, *package;
-+	struct ncsi_channel *nc, *channel;
-+	u32 package_id, channel_id;
-+	struct ncsi_dev_priv *ndp;
-+	unsigned long flags;
-+
-+	if (!info || !info->attrs)
-+		return -EINVAL;
-+
-+	if (!info->attrs[NCSI_ATTR_IFINDEX])
-+		return -EINVAL;
-+
-+	if (!info->attrs[NCSI_ATTR_PACKAGE_ID])
-+		return -EINVAL;
-+
-+	if (!info->attrs[NCSI_ATTR_CHANNEL_MASK])
-+		return -EINVAL;
-+
-+	ndp = ndp_from_ifindex(get_net(sock_net(msg->sk)),
-+			       nla_get_u32(info->attrs[NCSI_ATTR_IFINDEX]));
-+	if (!ndp)
-+		return -ENODEV;
-+
-+	package_id = nla_get_u32(info->attrs[NCSI_ATTR_PACKAGE_ID]);
-+	package = NULL;
-+	NCSI_FOR_EACH_PACKAGE(ndp, np)
-+		if (np->id == package_id) {
-+			package = np;
-+			break;
-+		}
-+	if (!package)
-+		return -ERANGE;
-+
-+	spin_lock_irqsave(&package->lock, flags);
-+
-+	channel = NULL;
-+	if (info->attrs[NCSI_ATTR_CHANNEL_ID]) {
-+		channel_id = nla_get_u32(info->attrs[NCSI_ATTR_CHANNEL_ID]);
-+		NCSI_FOR_EACH_CHANNEL(np, nc)
-+			if (nc->id == channel_id) {
-+				channel = nc;
-+				break;
-+			}
-+		if (!channel) {
-+			spin_unlock_irqrestore(&package->lock, flags);
-+			return -ERANGE;
-+		}
-+		netdev_dbg(ndp->ndev.dev,
-+			   "NCSI: Channel %u set as preferred channel\n",
-+			   channel->id);
-+	}
-+
-+	package->channel_whitelist =
-+		nla_get_u32(info->attrs[NCSI_ATTR_CHANNEL_MASK]);
-+	if (package->channel_whitelist == 0)
-+		netdev_dbg(ndp->ndev.dev,
-+			   "NCSI: Package %u set to all channels disabled\n",
-+			   package->id);
-+
-+	package->preferred_channel = channel;
-+
-+	if (nla_get_flag(info->attrs[NCSI_ATTR_MULTI_FLAG])) {
-+		package->multi_channel = true;
-+		netdev_info(ndp->ndev.dev,
-+			    "NCSI: Multi-channel enabled on package %u\n",
-+			    package_id);
-+	} else {
-+		package->multi_channel = false;
-+	}
-+
-+	spin_unlock_irqrestore(&package->lock, flags);
-+
-+	/* Update channel configuration */
-+	if (!(ndp->flags & NCSI_DEV_RESET))
-+		ncsi_reset_dev(&ndp->ndev);
-+
-+	return 0;
-+}
-+
- static const struct genl_ops ncsi_ops[] = {
- 	{
- 		.cmd = NCSI_CMD_PKG_INFO,
-@@ -589,6 +742,18 @@ static const struct genl_ops ncsi_ops[] = {
- 		.doit = ncsi_send_cmd_nl,
- 		.flags = GENL_ADMIN_PERM,
- 	},
-+	{
-+		.cmd = NCSI_CMD_SET_PACKAGE_MASK,
-+		.policy = ncsi_genl_policy,
-+		.doit = ncsi_set_package_mask_nl,
-+		.flags = GENL_ADMIN_PERM,
-+	},
-+	{
-+		.cmd = NCSI_CMD_SET_CHANNEL_MASK,
-+		.policy = ncsi_genl_policy,
-+		.doit = ncsi_set_channel_mask_nl,
-+		.flags = GENL_ADMIN_PERM,
-+	},
- };
- 
- static struct genl_family ncsi_genl_family __ro_after_init = {
-diff --git a/net/ncsi/ncsi-rsp.c b/net/ncsi/ncsi-rsp.c
-index 77e07ba3f493..de7737a27889 100644
---- a/net/ncsi/ncsi-rsp.c
-+++ b/net/ncsi/ncsi-rsp.c
-@@ -256,7 +256,7 @@ static int ncsi_rsp_handler_dcnt(struct ncsi_request *nr)
- 	if (!ncm->enable)
- 		return 0;
- 
--	ncm->enable = 1;
-+	ncm->enable = 0;
- 	return 0;
- }
- 
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch
index 02e423057..92d0a045d 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0038-media-aspeed-backport-ikvm-patches.patch
@@ -1,16 +1,8 @@
-From feb75b023dfd0ebe3e8ca46f0e74603f07542c29 Mon Sep 17 00:00:00 2001
+From 13d6fd0f71b3d0d69370878613bf7eb78fefa18f Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Fri, 9 Nov 2018 11:32:27 -0800
 Subject: [PATCH] Add Aspeed Video Engine Driver
 
-The Video Engine (VE) embedded in the Aspeed AST2400 and AST2500 SOCs
-can capture and compress video data from digital or analog sources. With
-the Aspeed chip acting a service processor, the Video Engine can capture
-the host processor graphics output.
-
-Add a V4L2 driver to capture video data and compress it to JPEG images.
-Make the video frames available through the V4L2 streaming interface.
-
 media: platform: Fix missing spin_lock_init()
 
 The driver allocates the spinlock but not initialize it.
@@ -27,71 +19,14 @@ Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
 Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
 ---
- .../devicetree/bindings/media/aspeed-video.txt     |   26 +
- MAINTAINERS                                        |    8 +
- arch/arm/boot/dts/aspeed-g5.dtsi                   |   11 +
- drivers/clk/clk-aspeed.c                           |   41 +-
- drivers/media/platform/Kconfig                     |    9 +
- drivers/media/platform/Makefile                    |    1 +
- drivers/media/platform/aspeed-video.c              | 1730 ++++++++++++++++++++
- include/dt-bindings/clock/aspeed-clock.h           |    1 +
- 8 files changed, 1825 insertions(+), 2 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/media/aspeed-video.txt
- create mode 100644 drivers/media/platform/aspeed-video.c
+ arch/arm/boot/dts/aspeed-g5.dtsi         | 11 +++++++++
+ drivers/clk/clk-aspeed.c                 | 41 ++++++++++++++++++++++++++++++--
+ drivers/media/platform/aspeed-video.c    |  1 +
+ include/dt-bindings/clock/aspeed-clock.h |  1 +
+ 4 files changed, 52 insertions(+), 2 deletions(-)
 
-diff --git a/Documentation/devicetree/bindings/media/aspeed-video.txt b/Documentation/devicetree/bindings/media/aspeed-video.txt
-new file mode 100644
-index 000000000000..78b464ae2672
---- /dev/null
-+++ b/Documentation/devicetree/bindings/media/aspeed-video.txt
-@@ -0,0 +1,26 @@
-+* Device tree bindings for Aspeed Video Engine
-+
-+The Video Engine (VE) embedded in the Aspeed AST2400 and AST2500 SOCs can
-+capture and compress video data from digital or analog sources.
-+
-+Required properties:
-+ - compatible:		"aspeed,ast2400-video-engine" or
-+			"aspeed,ast2500-video-engine"
-+ - reg:			contains the offset and length of the VE memory region
-+ - clocks:		clock specifiers for the syscon clocks associated with
-+			the VE (ordering must match the clock-names property)
-+ - clock-names:		"vclk" and "eclk"
-+ - resets:		reset specifier for the syscon reset associated with
-+			the VE
-+ - interrupts:		the interrupt associated with the VE on this platform
-+
-+Example:
-+
-+video-engine@1e700000 {
-+    compatible = "aspeed,ast2500-video-engine";
-+    reg = <0x1e700000 0x20000>;
-+    clocks = <&syscon ASPEED_CLK_GATE_VCLK>, <&syscon ASPEED_CLK_GATE_ECLK>;
-+    clock-names = "vclk", "eclk";
-+    resets = <&syscon ASPEED_RESET_VIDEO>;
-+    interrupts = <7>;
-+};
-diff --git a/MAINTAINERS b/MAINTAINERS
-index b98a5763f6c1..cdd8f824b6da 100644
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -2358,6 +2358,14 @@ S:	Maintained
- F:	Documentation/hwmon/asc7621
- F:	drivers/hwmon/asc7621.c
- 
-+ASPEED VIDEO ENGINE DRIVER
-+M:	Eddie James <eajames@linux.ibm.com>
-+L:	linux-media@vger.kernel.org
-+L:	openbmc@lists.ozlabs.org (moderated for non-subscribers)
-+S:	Maintained
-+F:	drivers/media/platform/aspeed-video.c
-+F:	Documentation/devicetree/bindings/media/aspeed-video.txt
-+
- ASUS NOTEBOOKS AND EEEPC ACPI/WMI EXTRAS DRIVERS
- M:	Corentin Chary <corentin.chary@gmail.com>
- L:	acpi4asus-user@lists.sourceforge.net
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index 69330ae2efd3..946c13eaa1d4 100644
+index 6f26e0d323d6..d5783eaf30ae 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
 @@ -243,6 +243,17 @@
@@ -211,1774 +146,18 @@ index 3bbb4fbf00c9..6cea55de485f 100644
  	 */
  
  	/* Get the uart clock source configuration from SCU4C*/
-diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
-index 54fe90acb5b2..d6edf2d28f9b 100644
---- a/drivers/media/platform/Kconfig
-+++ b/drivers/media/platform/Kconfig
-@@ -32,6 +32,15 @@ source "drivers/media/platform/davinci/Kconfig"
- 
- source "drivers/media/platform/omap/Kconfig"
- 
-+config VIDEO_ASPEED
-+	tristate "Aspeed AST2400 and AST2500 Video Engine driver"
-+	depends on VIDEO_V4L2
-+	select VIDEOBUF2_DMA_CONTIG
-+	help
-+	  Support for the Aspeed Video Engine (VE) embedded in the Aspeed
-+	  AST2400 and AST2500 SOCs. The VE can capture and compress video data
-+	  from digital or analog sources.
-+
- config VIDEO_SH_VOU
- 	tristate "SuperH VOU video output driver"
- 	depends on MEDIA_CAMERA_SUPPORT
-diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
-index 41322ab65802..205c33a004fc 100644
---- a/drivers/media/platform/Makefile
-+++ b/drivers/media/platform/Makefile
-@@ -3,6 +3,7 @@
- # Makefile for the video capture/playback device drivers.
- #
- 
-+obj-$(CONFIG_VIDEO_ASPEED)		+= aspeed-video.o
- obj-$(CONFIG_VIDEO_CADENCE)		+= cadence/
- obj-$(CONFIG_VIDEO_VIA_CAMERA) += via-camera.o
- obj-$(CONFIG_VIDEO_CAFE_CCIC) += marvell-ccic/
 diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c
-new file mode 100644
-index 000000000000..692e08ef38c0
---- /dev/null
+index dfec813f50a9..692e08ef38c0 100644
+--- a/drivers/media/platform/aspeed-video.c
 +++ b/drivers/media/platform/aspeed-video.c
-@@ -0,0 +1,1730 @@
-+// SPDX-License-Identifier: GPL-2.0+
-+
-+#include <linux/atomic.h>
-+#include <linux/bitfield.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/interrupt.h>
-+#include <linux/jiffies.h>
-+#include <linux/module.h>
-+#include <linux/mutex.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_reserved_mem.h>
-+#include <linux/platform_device.h>
-+#include <linux/reset.h>
-+#include <linux/sched.h>
-+#include <linux/spinlock.h>
-+#include <linux/string.h>
-+#include <linux/v4l2-controls.h>
-+#include <linux/videodev2.h>
-+#include <linux/wait.h>
-+#include <linux/workqueue.h>
-+#include <media/v4l2-ctrls.h>
-+#include <media/v4l2-dev.h>
-+#include <media/v4l2-device.h>
-+#include <media/v4l2-dv-timings.h>
-+#include <media/v4l2-event.h>
-+#include <media/v4l2-ioctl.h>
-+#include <media/videobuf2-dma-contig.h>
-+
-+#define DEVICE_NAME			"aspeed-video"
-+
-+#define ASPEED_VIDEO_JPEG_NUM_QUALITIES	12
-+#define ASPEED_VIDEO_JPEG_HEADER_SIZE	10
-+#define ASPEED_VIDEO_JPEG_QUANT_SIZE	116
-+#define ASPEED_VIDEO_JPEG_DCT_SIZE	34
-+
-+#define MAX_FRAME_RATE			60
-+#define MAX_HEIGHT			1200
-+#define MAX_WIDTH			1920
-+#define MIN_HEIGHT			480
-+#define MIN_WIDTH			640
-+
-+#define NUM_POLARITY_CHECKS		10
-+#define INVALID_RESOLUTION_RETRIES	2
-+#define INVALID_RESOLUTION_DELAY	msecs_to_jiffies(250)
-+#define RESOLUTION_CHANGE_DELAY		msecs_to_jiffies(500)
-+#define MODE_DETECT_TIMEOUT		msecs_to_jiffies(500)
-+#define STOP_TIMEOUT			msecs_to_jiffies(1000)
-+#define DIRECT_FETCH_THRESHOLD		0x0c0000 /* 1024 * 768 */
-+
-+#define VE_MAX_SRC_BUFFER_SIZE		0x8ca000 /* 1920 * 1200, 32bpp */
-+#define VE_JPEG_HEADER_SIZE		0x006000 /* 512 * 12 * 4 */
-+
-+#define VE_PROTECTION_KEY		0x000
-+#define  VE_PROTECTION_KEY_UNLOCK	0x1a038aa8
-+
-+#define VE_SEQ_CTRL			0x004
-+#define  VE_SEQ_CTRL_TRIG_MODE_DET	BIT(0)
-+#define  VE_SEQ_CTRL_TRIG_CAPTURE	BIT(1)
-+#define  VE_SEQ_CTRL_FORCE_IDLE		BIT(2)
-+#define  VE_SEQ_CTRL_MULT_FRAME		BIT(3)
-+#define  VE_SEQ_CTRL_TRIG_COMP		BIT(4)
-+#define  VE_SEQ_CTRL_AUTO_COMP		BIT(5)
-+#define  VE_SEQ_CTRL_EN_WATCHDOG	BIT(7)
-+#define  VE_SEQ_CTRL_YUV420		BIT(10)
-+#define  VE_SEQ_CTRL_COMP_FMT		GENMASK(11, 10)
-+#define  VE_SEQ_CTRL_HALT		BIT(12)
-+#define  VE_SEQ_CTRL_EN_WATCHDOG_COMP	BIT(14)
-+#define  VE_SEQ_CTRL_TRIG_JPG		BIT(15)
-+#define  VE_SEQ_CTRL_CAP_BUSY		BIT(16)
-+#define  VE_SEQ_CTRL_COMP_BUSY		BIT(18)
-+
-+#ifdef CONFIG_MACH_ASPEED_G5
-+#define  VE_SEQ_CTRL_JPEG_MODE		BIT(13)	/* AST2500 */
-+#else
-+#define  VE_SEQ_CTRL_JPEG_MODE		BIT(8)	/* AST2400 */
-+#endif /* CONFIG_MACH_ASPEED_G5 */
-+
-+#define VE_CTRL				0x008
-+#define  VE_CTRL_HSYNC_POL		BIT(0)
-+#define  VE_CTRL_VSYNC_POL		BIT(1)
-+#define  VE_CTRL_SOURCE			BIT(2)
-+#define  VE_CTRL_INT_DE			BIT(4)
-+#define  VE_CTRL_DIRECT_FETCH		BIT(5)
-+#define  VE_CTRL_YUV			BIT(6)
-+#define  VE_CTRL_RGB			BIT(7)
-+#define  VE_CTRL_CAPTURE_FMT		GENMASK(7, 6)
-+#define  VE_CTRL_AUTO_OR_CURSOR		BIT(8)
-+#define  VE_CTRL_CLK_INVERSE		BIT(11)
-+#define  VE_CTRL_CLK_DELAY		GENMASK(11, 9)
-+#define  VE_CTRL_INTERLACE		BIT(14)
-+#define  VE_CTRL_HSYNC_POL_CTRL		BIT(15)
-+#define  VE_CTRL_FRC			GENMASK(23, 16)
-+
-+#define VE_TGS_0			0x00c
-+#define VE_TGS_1			0x010
-+#define  VE_TGS_FIRST			GENMASK(28, 16)
-+#define  VE_TGS_LAST			GENMASK(12, 0)
-+
-+#define VE_SCALING_FACTOR		0x014
-+#define VE_SCALING_FILTER0		0x018
-+#define VE_SCALING_FILTER1		0x01c
-+#define VE_SCALING_FILTER2		0x020
-+#define VE_SCALING_FILTER3		0x024
-+
-+#define VE_CAP_WINDOW			0x030
-+#define VE_COMP_WINDOW			0x034
-+#define VE_COMP_PROC_OFFSET		0x038
-+#define VE_COMP_OFFSET			0x03c
-+#define VE_JPEG_ADDR			0x040
-+#define VE_SRC0_ADDR			0x044
-+#define VE_SRC_SCANLINE_OFFSET		0x048
-+#define VE_SRC1_ADDR			0x04c
-+#define VE_COMP_ADDR			0x054
-+
-+#define VE_STREAM_BUF_SIZE		0x058
-+#define  VE_STREAM_BUF_SIZE_N_PACKETS	GENMASK(5, 3)
-+#define  VE_STREAM_BUF_SIZE_P_SIZE	GENMASK(2, 0)
-+
-+#define VE_COMP_CTRL			0x060
-+#define  VE_COMP_CTRL_VQ_DCT_ONLY	BIT(0)
-+#define  VE_COMP_CTRL_VQ_4COLOR		BIT(1)
-+#define  VE_COMP_CTRL_QUANTIZE		BIT(2)
-+#define  VE_COMP_CTRL_EN_BQ		BIT(4)
-+#define  VE_COMP_CTRL_EN_CRYPTO		BIT(5)
-+#define  VE_COMP_CTRL_DCT_CHR		GENMASK(10, 6)
-+#define  VE_COMP_CTRL_DCT_LUM		GENMASK(15, 11)
-+#define  VE_COMP_CTRL_EN_HQ		BIT(16)
-+#define  VE_COMP_CTRL_RSVD		BIT(19)
-+#define  VE_COMP_CTRL_ENCODE		GENMASK(21, 20)
-+#define  VE_COMP_CTRL_HQ_DCT_CHR	GENMASK(26, 22)
-+#define  VE_COMP_CTRL_HQ_DCT_LUM	GENMASK(31, 27)
-+
-+#define VE_OFFSET_COMP_STREAM		0x078
-+
-+#define VE_SRC_LR_EDGE_DET		0x090
-+#define  VE_SRC_LR_EDGE_DET_LEFT	GENMASK(11, 0)
-+#define  VE_SRC_LR_EDGE_DET_NO_V	BIT(12)
-+#define  VE_SRC_LR_EDGE_DET_NO_H	BIT(13)
-+#define  VE_SRC_LR_EDGE_DET_NO_DISP	BIT(14)
-+#define  VE_SRC_LR_EDGE_DET_NO_CLK	BIT(15)
-+#define  VE_SRC_LR_EDGE_DET_RT_SHF	16
-+#define  VE_SRC_LR_EDGE_DET_RT		GENMASK(27, VE_SRC_LR_EDGE_DET_RT_SHF)
-+#define  VE_SRC_LR_EDGE_DET_INTERLACE	BIT(31)
-+
-+#define VE_SRC_TB_EDGE_DET		0x094
-+#define  VE_SRC_TB_EDGE_DET_TOP		GENMASK(12, 0)
-+#define  VE_SRC_TB_EDGE_DET_BOT_SHF	16
-+#define  VE_SRC_TB_EDGE_DET_BOT		GENMASK(28, VE_SRC_TB_EDGE_DET_BOT_SHF)
-+
-+#define VE_MODE_DETECT_STATUS		0x098
-+#define  VE_MODE_DETECT_H_PIXELS	GENMASK(11, 0)
-+#define  VE_MODE_DETECT_V_LINES_SHF	16
-+#define  VE_MODE_DETECT_V_LINES		GENMASK(27, VE_MODE_DETECT_V_LINES_SHF)
-+#define  VE_MODE_DETECT_STATUS_VSYNC	BIT(28)
-+#define  VE_MODE_DETECT_STATUS_HSYNC	BIT(29)
-+
-+#define VE_SYNC_STATUS			0x09c
-+#define  VE_SYNC_STATUS_HSYNC		GENMASK(11, 0)
-+#define  VE_SYNC_STATUS_VSYNC_SHF	16
-+#define  VE_SYNC_STATUS_VSYNC		GENMASK(27, VE_SYNC_STATUS_VSYNC_SHF)
-+
-+#define VE_INTERRUPT_CTRL		0x304
-+#define VE_INTERRUPT_STATUS		0x308
-+#define  VE_INTERRUPT_MODE_DETECT_WD	BIT(0)
-+#define  VE_INTERRUPT_CAPTURE_COMPLETE	BIT(1)
-+#define  VE_INTERRUPT_COMP_READY	BIT(2)
-+#define  VE_INTERRUPT_COMP_COMPLETE	BIT(3)
-+#define  VE_INTERRUPT_MODE_DETECT	BIT(4)
-+#define  VE_INTERRUPT_FRAME_COMPLETE	BIT(5)
-+#define  VE_INTERRUPT_DECODE_ERR	BIT(6)
-+#define  VE_INTERRUPT_HALT_READY	BIT(8)
-+#define  VE_INTERRUPT_HANG_WD		BIT(9)
-+#define  VE_INTERRUPT_STREAM_DESC	BIT(10)
-+#define  VE_INTERRUPT_VSYNC_DESC	BIT(11)
-+
-+#define VE_MODE_DETECT			0x30c
-+#define VE_MEM_RESTRICT_START		0x310
-+#define VE_MEM_RESTRICT_END		0x314
-+
-+enum {
-+	VIDEO_MODE_DETECT_DONE,
-+	VIDEO_RES_CHANGE,
-+	VIDEO_RES_DETECT,
-+	VIDEO_STREAMING,
-+	VIDEO_FRAME_INPRG,
-+	VIDEO_STOPPED,
-+};
-+
-+struct aspeed_video_addr {
-+	unsigned int size;
-+	dma_addr_t dma;
-+	void *virt;
-+};
-+
-+struct aspeed_video_buffer {
-+	struct vb2_v4l2_buffer vb;
-+	struct list_head link;
-+};
-+
-+#define to_aspeed_video_buffer(x) \
-+	container_of((x), struct aspeed_video_buffer, vb)
-+
-+struct aspeed_video {
-+	void __iomem *base;
-+	struct clk *eclk;
-+	struct clk *vclk;
-+	struct reset_control *rst;
-+
-+	struct device *dev;
-+	struct v4l2_ctrl_handler ctrl_handler;
-+	struct v4l2_device v4l2_dev;
-+	struct v4l2_pix_format pix_fmt;
-+	struct v4l2_bt_timings active_timings;
-+	struct v4l2_bt_timings detected_timings;
-+	u32 v4l2_input_status;
-+	struct vb2_queue queue;
-+	struct video_device vdev;
-+	struct mutex video_lock;	/* v4l2 and videobuf2 lock */
-+
-+	wait_queue_head_t wait;
-+	spinlock_t lock;		/* buffer list lock */
-+	struct delayed_work res_work;
-+	struct list_head buffers;
-+	unsigned long flags;
-+	unsigned int sequence;
-+
-+	unsigned int max_compressed_size;
-+	struct aspeed_video_addr srcs[2];
-+	struct aspeed_video_addr jpeg;
-+
-+	bool yuv420;
-+	unsigned int frame_rate;
-+	unsigned int jpeg_quality;
-+
-+	unsigned int frame_bottom;
-+	unsigned int frame_left;
-+	unsigned int frame_right;
-+	unsigned int frame_top;
-+};
-+
-+#define to_aspeed_video(x) container_of((x), struct aspeed_video, v4l2_dev)
-+
-+static const u32 aspeed_video_jpeg_header[ASPEED_VIDEO_JPEG_HEADER_SIZE] = {
-+	0xe0ffd8ff, 0x464a1000, 0x01004649, 0x60000101, 0x00006000, 0x0f00feff,
-+	0x00002d05, 0x00000000, 0x00000000, 0x00dbff00
-+};
-+
-+static const u32 aspeed_video_jpeg_quant[ASPEED_VIDEO_JPEG_QUANT_SIZE] = {
-+	0x081100c0, 0x00000000, 0x00110103, 0x03011102, 0xc4ff0111, 0x00001f00,
-+	0x01010501, 0x01010101, 0x00000000, 0x00000000, 0x04030201, 0x08070605,
-+	0xff0b0a09, 0x10b500c4, 0x03010200, 0x03040203, 0x04040505, 0x7d010000,
-+	0x00030201, 0x12051104, 0x06413121, 0x07615113, 0x32147122, 0x08a19181,
-+	0xc1b14223, 0xf0d15215, 0x72623324, 0x160a0982, 0x1a191817, 0x28272625,
-+	0x35342a29, 0x39383736, 0x4544433a, 0x49484746, 0x5554534a, 0x59585756,
-+	0x6564635a, 0x69686766, 0x7574736a, 0x79787776, 0x8584837a, 0x89888786,
-+	0x9493928a, 0x98979695, 0xa3a29a99, 0xa7a6a5a4, 0xb2aaa9a8, 0xb6b5b4b3,
-+	0xbab9b8b7, 0xc5c4c3c2, 0xc9c8c7c6, 0xd4d3d2ca, 0xd8d7d6d5, 0xe2e1dad9,
-+	0xe6e5e4e3, 0xeae9e8e7, 0xf4f3f2f1, 0xf8f7f6f5, 0xc4fffaf9, 0x00011f00,
-+	0x01010103, 0x01010101, 0x00000101, 0x00000000, 0x04030201, 0x08070605,
-+	0xff0b0a09, 0x11b500c4, 0x02010200, 0x04030404, 0x04040507, 0x77020100,
-+	0x03020100, 0x21050411, 0x41120631, 0x71610751, 0x81322213, 0x91421408,
-+	0x09c1b1a1, 0xf0523323, 0xd1726215, 0x3424160a, 0x17f125e1, 0x261a1918,
-+	0x2a292827, 0x38373635, 0x44433a39, 0x48474645, 0x54534a49, 0x58575655,
-+	0x64635a59, 0x68676665, 0x74736a69, 0x78777675, 0x83827a79, 0x87868584,
-+	0x928a8988, 0x96959493, 0x9a999897, 0xa5a4a3a2, 0xa9a8a7a6, 0xb4b3b2aa,
-+	0xb8b7b6b5, 0xc3c2bab9, 0xc7c6c5c4, 0xd2cac9c8, 0xd6d5d4d3, 0xdad9d8d7,
-+	0xe5e4e3e2, 0xe9e8e7e6, 0xf4f3f2ea, 0xf8f7f6f5, 0xdafffaf9, 0x01030c00,
-+	0x03110200, 0x003f0011
-+};
-+
-+static const u32 aspeed_video_jpeg_dct[ASPEED_VIDEO_JPEG_NUM_QUALITIES]
-+				      [ASPEED_VIDEO_JPEG_DCT_SIZE] = {
-+	{ 0x0d140043, 0x0c0f110f, 0x11101114, 0x17141516, 0x1e20321e,
-+	  0x3d1e1b1b, 0x32242e2b, 0x4b4c3f48, 0x44463f47, 0x61735a50,
-+	  0x566c5550, 0x88644644, 0x7a766c65, 0x4d808280, 0x8c978d60,
-+	  0x7e73967d, 0xdbff7b80, 0x1f014300, 0x272d2121, 0x3030582d,
-+	  0x697bb958, 0xb8b9b97b, 0xb9b8a6a6, 0xb9b9b9b9, 0xb9b9b9b9,
-+	  0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9,
-+	  0xb9b9b9b9, 0xb9b9b9b9, 0xb9b9b9b9, 0xffb9b9b9 },
-+	{ 0x0c110043, 0x0a0d0f0d, 0x0f0e0f11, 0x14111213, 0x1a1c2b1a,
-+	  0x351a1818, 0x2b1f2826, 0x4142373f, 0x3c3d373e, 0x55644e46,
-+	  0x4b5f4a46, 0x77573d3c, 0x6b675f58, 0x43707170, 0x7a847b54,
-+	  0x6e64836d, 0xdbff6c70, 0x1b014300, 0x22271d1d, 0x2a2a4c27,
-+	  0x5b6ba04c, 0xa0a0a06b, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
-+	  0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0,
-+	  0xa0a0a0a0, 0xa0a0a0a0, 0xa0a0a0a0, 0xffa0a0a0 },
-+	{ 0x090e0043, 0x090a0c0a, 0x0c0b0c0e, 0x110e0f10, 0x15172415,
-+	  0x2c151313, 0x241a211f, 0x36372e34, 0x31322e33, 0x4653413a,
-+	  0x3e4e3d3a, 0x62483231, 0x58564e49, 0x385d5e5d, 0x656d6645,
-+	  0x5b536c5a, 0xdbff595d, 0x16014300, 0x1c201818, 0x22223f20,
-+	  0x4b58853f, 0x85858558, 0x85858585, 0x85858585, 0x85858585,
-+	  0x85858585, 0x85858585, 0x85858585, 0x85858585, 0x85858585,
-+	  0x85858585, 0x85858585, 0x85858585, 0xff858585 },
-+	{ 0x070b0043, 0x07080a08, 0x0a090a0b, 0x0d0b0c0c, 0x11121c11,
-+	  0x23110f0f, 0x1c141a19, 0x2b2b2429, 0x27282428, 0x3842332e,
-+	  0x313e302e, 0x4e392827, 0x46443e3a, 0x2c4a4a4a, 0x50565137,
-+	  0x48425647, 0xdbff474a, 0x12014300, 0x161a1313, 0x1c1c331a,
-+	  0x3d486c33, 0x6c6c6c48, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
-+	  0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c,
-+	  0x6c6c6c6c, 0x6c6c6c6c, 0x6c6c6c6c, 0xff6c6c6c },
-+	{ 0x06090043, 0x05060706, 0x07070709, 0x0a09090a, 0x0d0e160d,
-+	  0x1b0d0c0c, 0x16101413, 0x21221c20, 0x1e1f1c20, 0x2b332824,
-+	  0x26302624, 0x3d2d1f1e, 0x3735302d, 0x22393a39, 0x3f443f2b,
-+	  0x38334338, 0xdbff3739, 0x0d014300, 0x11130e0e, 0x15152613,
-+	  0x2d355026, 0x50505035, 0x50505050, 0x50505050, 0x50505050,
-+	  0x50505050, 0x50505050, 0x50505050, 0x50505050, 0x50505050,
-+	  0x50505050, 0x50505050, 0x50505050, 0xff505050 },
-+	{ 0x04060043, 0x03040504, 0x05040506, 0x07060606, 0x09090f09,
-+	  0x12090808, 0x0f0a0d0d, 0x16161315, 0x14151315, 0x1d221b18,
-+	  0x19201918, 0x281e1514, 0x2423201e, 0x17262726, 0x2a2d2a1c,
-+	  0x25222d25, 0xdbff2526, 0x09014300, 0x0b0d0a0a, 0x0e0e1a0d,
-+	  0x1f25371a, 0x37373725, 0x37373737, 0x37373737, 0x37373737,
-+	  0x37373737, 0x37373737, 0x37373737, 0x37373737, 0x37373737,
-+	  0x37373737, 0x37373737, 0x37373737, 0xff373737 },
-+	{ 0x02030043, 0x01020202, 0x02020203, 0x03030303, 0x04040704,
-+	  0x09040404, 0x07050606, 0x0b0b090a, 0x0a0a090a, 0x0e110d0c,
-+	  0x0c100c0c, 0x140f0a0a, 0x1211100f, 0x0b131313, 0x1516150e,
-+	  0x12111612, 0xdbff1213, 0x04014300, 0x05060505, 0x07070d06,
-+	  0x0f121b0d, 0x1b1b1b12, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
-+	  0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b,
-+	  0x1b1b1b1b, 0x1b1b1b1b, 0x1b1b1b1b, 0xff1b1b1b },
-+	{ 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
-+	  0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
-+	  0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
-+	  0x0c0b0f0c, 0xdbff0c0c, 0x03014300, 0x03040303, 0x04040804,
-+	  0x0a0c1208, 0x1212120c, 0x12121212, 0x12121212, 0x12121212,
-+	  0x12121212, 0x12121212, 0x12121212, 0x12121212, 0x12121212,
-+	  0x12121212, 0x12121212, 0x12121212, 0xff121212 },
-+	{ 0x01020043, 0x01010101, 0x01010102, 0x02020202, 0x03030503,
-+	  0x06030202, 0x05030404, 0x07070607, 0x06070607, 0x090b0908,
-+	  0x080a0808, 0x0d0a0706, 0x0c0b0a0a, 0x070c0d0c, 0x0e0f0e09,
-+	  0x0c0b0f0c, 0xdbff0c0c, 0x02014300, 0x03030202, 0x04040703,
-+	  0x080a0f07, 0x0f0f0f0a, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
-+	  0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f,
-+	  0x0f0f0f0f, 0x0f0f0f0f, 0x0f0f0f0f, 0xff0f0f0f },
-+	{ 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x02020302,
-+	  0x04020202, 0x03020303, 0x05050405, 0x05050405, 0x07080606,
-+	  0x06080606, 0x0a070505, 0x09080807, 0x05090909, 0x0a0b0a07,
-+	  0x09080b09, 0xdbff0909, 0x02014300, 0x02030202, 0x03030503,
-+	  0x07080c05, 0x0c0c0c08, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
-+	  0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c,
-+	  0x0c0c0c0c, 0x0c0c0c0c, 0x0c0c0c0c, 0xff0c0c0c },
-+	{ 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010201,
-+	  0x03010101, 0x02010202, 0x03030303, 0x03030303, 0x04050404,
-+	  0x04050404, 0x06050303, 0x06050505, 0x03060606, 0x07070704,
-+	  0x06050706, 0xdbff0606, 0x01014300, 0x01020101, 0x02020402,
-+	  0x05060904, 0x09090906, 0x09090909, 0x09090909, 0x09090909,
-+	  0x09090909, 0x09090909, 0x09090909, 0x09090909, 0x09090909,
-+	  0x09090909, 0x09090909, 0x09090909, 0xff090909 },
-+	{ 0x01010043, 0x01010101, 0x01010101, 0x01010101, 0x01010101,
-+	  0x01010101, 0x01010101, 0x01010101, 0x01010101, 0x02020202,
-+	  0x02020202, 0x03020101, 0x03020202, 0x01030303, 0x03030302,
-+	  0x03020303, 0xdbff0403, 0x01014300, 0x01010101, 0x01010201,
-+	  0x03040602, 0x06060604, 0x06060606, 0x06060606, 0x06060606,
-+	  0x06060606, 0x06060606, 0x06060606, 0x06060606, 0x06060606,
-+	  0x06060606, 0x06060606, 0x06060606, 0xff060606 }
-+};
-+
-+static const struct v4l2_dv_timings_cap aspeed_video_timings_cap = {
-+	.type = V4L2_DV_BT_656_1120,
-+	.bt = {
-+		.min_width = MIN_WIDTH,
-+		.max_width = MAX_WIDTH,
-+		.min_height = MIN_HEIGHT,
-+		.max_height = MAX_HEIGHT,
-+		.min_pixelclock = 6574080, /* 640 x 480 x 24Hz */
-+		.max_pixelclock = 138240000, /* 1920 x 1200 x 60Hz */
-+		.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
-+			V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
-+		.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
-+			V4L2_DV_BT_CAP_REDUCED_BLANKING |
-+			V4L2_DV_BT_CAP_CUSTOM,
-+	},
-+};
-+
-+static void aspeed_video_init_jpeg_table(u32 *table, bool yuv420)
-+{
-+	int i;
-+	unsigned int base;
-+
-+	for (i = 0; i < ASPEED_VIDEO_JPEG_NUM_QUALITIES; i++) {
-+		base = 256 * i;	/* AST HW requires this header spacing */
-+		memcpy(&table[base], aspeed_video_jpeg_header,
-+		       sizeof(aspeed_video_jpeg_header));
-+
-+		base += ASPEED_VIDEO_JPEG_HEADER_SIZE;
-+		memcpy(&table[base], aspeed_video_jpeg_dct[i],
-+		       sizeof(aspeed_video_jpeg_dct[i]));
-+
-+		base += ASPEED_VIDEO_JPEG_DCT_SIZE;
-+		memcpy(&table[base], aspeed_video_jpeg_quant,
-+		       sizeof(aspeed_video_jpeg_quant));
-+
-+		if (yuv420)
-+			table[base + 2] = 0x00220103;
-+	}
-+}
-+
-+static void aspeed_video_update(struct aspeed_video *video, u32 reg, u32 clear,
-+				u32 bits)
-+{
-+	u32 t = readl(video->base + reg);
-+	u32 before = t;
-+
-+	t &= ~clear;
-+	t |= bits;
-+	writel(t, video->base + reg);
-+	dev_dbg(video->dev, "update %03x[%08x -> %08x]\n", reg, before,
-+		readl(video->base + reg));
-+}
-+
-+static u32 aspeed_video_read(struct aspeed_video *video, u32 reg)
-+{
-+	u32 t = readl(video->base + reg);
-+
-+	dev_dbg(video->dev, "read %03x[%08x]\n", reg, t);
-+	return t;
-+}
-+
-+static void aspeed_video_write(struct aspeed_video *video, u32 reg, u32 val)
-+{
-+	writel(val, video->base + reg);
-+	dev_dbg(video->dev, "write %03x[%08x]\n", reg,
-+		readl(video->base + reg));
-+}
-+
-+static int aspeed_video_start_frame(struct aspeed_video *video)
-+{
-+	dma_addr_t addr;
-+	unsigned long flags;
-+	struct aspeed_video_buffer *buf;
-+	u32 seq_ctrl = aspeed_video_read(video, VE_SEQ_CTRL);
-+
-+	if (video->v4l2_input_status) {
-+		dev_dbg(video->dev, "No signal; don't start frame\n");
-+		return 0;
-+	}
-+
-+	if (!(seq_ctrl & VE_SEQ_CTRL_COMP_BUSY) ||
-+	    !(seq_ctrl & VE_SEQ_CTRL_CAP_BUSY)) {
-+		dev_err(video->dev, "Engine busy; don't start frame\n");
-+		return -EBUSY;
-+	}
-+
-+	spin_lock_irqsave(&video->lock, flags);
-+	buf = list_first_entry_or_null(&video->buffers,
-+				       struct aspeed_video_buffer, link);
-+	if (!buf) {
-+		spin_unlock_irqrestore(&video->lock, flags);
-+		dev_dbg(video->dev, "No buffers; don't start frame\n");
-+		return -EPROTO;
-+	}
-+
-+	set_bit(VIDEO_FRAME_INPRG, &video->flags);
-+	addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
-+	spin_unlock_irqrestore(&video->lock, flags);
-+
-+	aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
-+	aspeed_video_write(video, VE_COMP_OFFSET, 0);
-+	aspeed_video_write(video, VE_COMP_ADDR, addr);
-+
-+	aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
-+			    VE_INTERRUPT_COMP_COMPLETE |
-+			    VE_INTERRUPT_CAPTURE_COMPLETE);
-+
-+	aspeed_video_update(video, VE_SEQ_CTRL, 0,
-+			    VE_SEQ_CTRL_TRIG_CAPTURE | VE_SEQ_CTRL_TRIG_COMP);
-+
-+	return 0;
-+}
-+
-+static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
-+{
-+	/* Enable mode detect interrupts */
-+	aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
-+			    VE_INTERRUPT_MODE_DETECT);
-+
-+	/* Trigger mode detect */
-+	aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_TRIG_MODE_DET);
-+}
-+
-+static void aspeed_video_reset(struct aspeed_video *video)
-+{
-+	/* Reset the engine */
-+	reset_control_assert(video->rst);
-+
-+	/* Don't usleep here; function may be called in interrupt context */
-+	udelay(100);
-+	reset_control_deassert(video->rst);
-+}
-+
-+static void aspeed_video_off(struct aspeed_video *video)
-+{
-+	aspeed_video_reset(video);
-+
-+	/* Turn off the relevant clocks */
-+	clk_disable_unprepare(video->vclk);
-+	clk_disable_unprepare(video->eclk);
-+}
-+
-+static void aspeed_video_on(struct aspeed_video *video)
-+{
-+	/* Turn on the relevant clocks */
-+	clk_prepare_enable(video->eclk);
-+	clk_prepare_enable(video->vclk);
-+
-+	aspeed_video_reset(video);
-+}
-+
-+static void aspeed_video_bufs_done(struct aspeed_video *video,
-+				   enum vb2_buffer_state state)
-+{
-+	unsigned long flags;
-+	struct aspeed_video_buffer *buf;
-+
-+	spin_lock_irqsave(&video->lock, flags);
-+	list_for_each_entry(buf, &video->buffers, link)
-+		vb2_buffer_done(&buf->vb.vb2_buf, state);
-+	INIT_LIST_HEAD(&video->buffers);
-+	spin_unlock_irqrestore(&video->lock, flags);
-+}
-+
-+static void aspeed_video_irq_res_change(struct aspeed_video *video)
-+{
-+	dev_dbg(video->dev, "Resolution changed; resetting\n");
-+
-+	set_bit(VIDEO_RES_CHANGE, &video->flags);
-+	clear_bit(VIDEO_FRAME_INPRG, &video->flags);
-+
-+	aspeed_video_off(video);
-+	aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
-+
-+	schedule_delayed_work(&video->res_work, RESOLUTION_CHANGE_DELAY);
-+}
-+
-+static irqreturn_t aspeed_video_irq(int irq, void *arg)
-+{
-+	struct aspeed_video *video = arg;
-+	u32 sts = aspeed_video_read(video, VE_INTERRUPT_STATUS);
-+
-+	/*
-+	 * Resolution changed or signal was lost; reset the engine and
-+	 * re-initialize
-+	 */
-+	if (sts & VE_INTERRUPT_MODE_DETECT_WD) {
-+		aspeed_video_irq_res_change(video);
-+		return IRQ_HANDLED;
-+	}
-+
-+	if (sts & VE_INTERRUPT_MODE_DETECT) {
-+		if (test_bit(VIDEO_RES_DETECT, &video->flags)) {
-+			aspeed_video_update(video, VE_INTERRUPT_CTRL,
-+					    VE_INTERRUPT_MODE_DETECT, 0);
-+			aspeed_video_write(video, VE_INTERRUPT_STATUS,
-+					   VE_INTERRUPT_MODE_DETECT);
-+
-+			set_bit(VIDEO_MODE_DETECT_DONE, &video->flags);
-+			wake_up_interruptible_all(&video->wait);
-+		} else {
-+			/*
-+			 * Signal acquired while NOT doing resolution
-+			 * detection; reset the engine and re-initialize
-+			 */
-+			aspeed_video_irq_res_change(video);
-+			return IRQ_HANDLED;
-+		}
-+	}
-+
-+	if ((sts & VE_INTERRUPT_COMP_COMPLETE) &&
-+	    (sts & VE_INTERRUPT_CAPTURE_COMPLETE)) {
-+		struct aspeed_video_buffer *buf;
-+		u32 frame_size = aspeed_video_read(video,
-+						   VE_OFFSET_COMP_STREAM);
-+
-+		spin_lock(&video->lock);
-+		clear_bit(VIDEO_FRAME_INPRG, &video->flags);
-+		buf = list_first_entry_or_null(&video->buffers,
-+					       struct aspeed_video_buffer,
-+					       link);
-+		if (buf) {
-+			vb2_set_plane_payload(&buf->vb.vb2_buf, 0, frame_size);
-+
-+			if (!list_is_last(&buf->link, &video->buffers)) {
-+				buf->vb.vb2_buf.timestamp = ktime_get_ns();
-+				buf->vb.sequence = video->sequence++;
-+				buf->vb.field = V4L2_FIELD_NONE;
-+				vb2_buffer_done(&buf->vb.vb2_buf,
-+						VB2_BUF_STATE_DONE);
-+				list_del(&buf->link);
-+			}
-+		}
-+		spin_unlock(&video->lock);
-+
-+		aspeed_video_update(video, VE_SEQ_CTRL,
-+				    VE_SEQ_CTRL_TRIG_CAPTURE |
-+				    VE_SEQ_CTRL_FORCE_IDLE |
-+				    VE_SEQ_CTRL_TRIG_COMP, 0);
-+		aspeed_video_update(video, VE_INTERRUPT_CTRL,
-+				    VE_INTERRUPT_COMP_COMPLETE |
-+				    VE_INTERRUPT_CAPTURE_COMPLETE, 0);
-+		aspeed_video_write(video, VE_INTERRUPT_STATUS,
-+				   VE_INTERRUPT_COMP_COMPLETE |
-+				   VE_INTERRUPT_CAPTURE_COMPLETE);
-+
-+		if (test_bit(VIDEO_STREAMING, &video->flags) && buf)
-+			aspeed_video_start_frame(video);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static void aspeed_video_check_and_set_polarity(struct aspeed_video *video)
-+{
-+	int i;
-+	int hsync_counter = 0;
-+	int vsync_counter = 0;
-+	u32 sts;
-+
-+	for (i = 0; i < NUM_POLARITY_CHECKS; ++i) {
-+		sts = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
-+		if (sts & VE_MODE_DETECT_STATUS_VSYNC)
-+			vsync_counter--;
-+		else
-+			vsync_counter++;
-+
-+		if (sts & VE_MODE_DETECT_STATUS_HSYNC)
-+			hsync_counter--;
-+		else
-+			hsync_counter++;
-+	}
-+
-+	if (hsync_counter < 0 || vsync_counter < 0) {
-+		u32 ctrl;
-+
-+		if (hsync_counter < 0) {
-+			ctrl = VE_CTRL_HSYNC_POL;
-+			video->detected_timings.polarities &=
-+				~V4L2_DV_HSYNC_POS_POL;
-+		} else {
-+			video->detected_timings.polarities |=
-+				V4L2_DV_HSYNC_POS_POL;
-+		}
-+
-+		if (vsync_counter < 0) {
-+			ctrl = VE_CTRL_VSYNC_POL;
-+			video->detected_timings.polarities &=
-+				~V4L2_DV_VSYNC_POS_POL;
-+		} else {
-+			video->detected_timings.polarities |=
-+				V4L2_DV_VSYNC_POS_POL;
-+		}
-+
-+		aspeed_video_update(video, VE_CTRL, 0, ctrl);
-+	}
-+}
-+
-+static bool aspeed_video_alloc_buf(struct aspeed_video *video,
-+				   struct aspeed_video_addr *addr,
-+				   unsigned int size)
-+{
-+	addr->virt = dma_alloc_coherent(video->dev, size, &addr->dma,
-+					GFP_KERNEL);
-+	if (!addr->virt)
-+		return false;
-+
-+	addr->size = size;
-+	return true;
-+}
-+
-+static void aspeed_video_free_buf(struct aspeed_video *video,
-+				  struct aspeed_video_addr *addr)
-+{
-+	dma_free_coherent(video->dev, addr->size, addr->virt, addr->dma);
-+	addr->size = 0;
-+	addr->dma = 0ULL;
-+	addr->virt = NULL;
-+}
-+
-+/*
-+ * Get the minimum HW-supported compression buffer size for the frame size.
-+ * Assume worst-case JPEG compression size is 1/8 raw size. This should be
-+ * plenty even for maximum quality; any worse and the engine will simply return
-+ * incomplete JPEGs.
-+ */
-+static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
-+					      unsigned int frame_size)
-+{
-+	int i, j;
-+	u32 compression_buffer_size_reg = 0;
-+	unsigned int size;
-+	const unsigned int num_compression_packets = 4;
-+	const unsigned int compression_packet_size = 1024;
-+	const unsigned int max_compressed_size = frame_size / 2; /* 4bpp / 8 */
-+
-+	video->max_compressed_size = UINT_MAX;
-+
-+	for (i = 0; i < 6; ++i) {
-+		for (j = 0; j < 8; ++j) {
-+			size = (num_compression_packets << i) *
-+				(compression_packet_size << j);
-+			if (size < max_compressed_size)
-+				continue;
-+
-+			if (size < video->max_compressed_size) {
-+				compression_buffer_size_reg = (i << 3) | j;
-+				video->max_compressed_size = size;
-+			}
-+		}
-+	}
-+
-+	aspeed_video_write(video, VE_STREAM_BUF_SIZE,
-+			   compression_buffer_size_reg);
-+
-+	dev_dbg(video->dev, "Max compressed size: %x\n",
-+		video->max_compressed_size);
-+}
-+
-+#define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
-+
-+static void aspeed_video_get_resolution(struct aspeed_video *video)
-+{
-+	bool invalid_resolution = true;
-+	int rc;
-+	int tries = 0;
-+	u32 mds;
-+	u32 src_lr_edge;
-+	u32 src_tb_edge;
-+	u32 sync;
-+	struct v4l2_bt_timings *det = &video->detected_timings;
-+
-+	det->width = MIN_WIDTH;
-+	det->height = MIN_HEIGHT;
-+	video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
-+
-+	/*
-+	 * Since we need max buffer size for detection, free the second source
-+	 * buffer first.
-+	 */
-+	if (video->srcs[1].size)
-+		aspeed_video_free_buf(video, &video->srcs[1]);
-+
-+	if (video->srcs[0].size < VE_MAX_SRC_BUFFER_SIZE) {
-+		if (video->srcs[0].size)
-+			aspeed_video_free_buf(video, &video->srcs[0]);
-+
-+		if (!aspeed_video_alloc_buf(video, &video->srcs[0],
-+					    VE_MAX_SRC_BUFFER_SIZE)) {
-+			dev_err(video->dev,
-+				"Failed to allocate source buffers\n");
-+			return;
-+		}
-+	}
-+
-+	aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
-+
-+	do {
-+		if (tries) {
-+			set_current_state(TASK_INTERRUPTIBLE);
-+			if (schedule_timeout(INVALID_RESOLUTION_DELAY))
-+				return;
-+		}
-+
-+		set_bit(VIDEO_RES_DETECT, &video->flags);
-+		aspeed_video_enable_mode_detect(video);
-+
-+		rc = wait_event_interruptible_timeout(video->wait,
-+						      res_check(video),
-+						      MODE_DETECT_TIMEOUT);
-+		if (!rc) {
-+			dev_err(video->dev, "Timed out; first mode detect\n");
-+			clear_bit(VIDEO_RES_DETECT, &video->flags);
-+			return;
-+		}
-+
-+		/* Disable mode detect in order to re-trigger */
-+		aspeed_video_update(video, VE_SEQ_CTRL,
-+				    VE_SEQ_CTRL_TRIG_MODE_DET, 0);
-+
-+		aspeed_video_check_and_set_polarity(video);
-+
-+		aspeed_video_enable_mode_detect(video);
-+
-+		rc = wait_event_interruptible_timeout(video->wait,
-+						      res_check(video),
-+						      MODE_DETECT_TIMEOUT);
-+		clear_bit(VIDEO_RES_DETECT, &video->flags);
-+		if (!rc) {
-+			dev_err(video->dev, "Timed out; second mode detect\n");
-+			return;
-+		}
-+
-+		src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
-+		src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
-+		mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
-+		sync = aspeed_video_read(video, VE_SYNC_STATUS);
-+
-+		video->frame_bottom = (src_tb_edge & VE_SRC_TB_EDGE_DET_BOT) >>
-+			VE_SRC_TB_EDGE_DET_BOT_SHF;
-+		video->frame_top = src_tb_edge & VE_SRC_TB_EDGE_DET_TOP;
-+		det->vfrontporch = video->frame_top;
-+		det->vbackporch = ((mds & VE_MODE_DETECT_V_LINES) >>
-+			VE_MODE_DETECT_V_LINES_SHF) - video->frame_bottom;
-+		det->vsync = (sync & VE_SYNC_STATUS_VSYNC) >>
-+			VE_SYNC_STATUS_VSYNC_SHF;
-+		if (video->frame_top > video->frame_bottom)
-+			continue;
-+
-+		video->frame_right = (src_lr_edge & VE_SRC_LR_EDGE_DET_RT) >>
-+			VE_SRC_LR_EDGE_DET_RT_SHF;
-+		video->frame_left = src_lr_edge & VE_SRC_LR_EDGE_DET_LEFT;
-+		det->hfrontporch = video->frame_left;
-+		det->hbackporch = (mds & VE_MODE_DETECT_H_PIXELS) -
-+			video->frame_right;
-+		det->hsync = sync & VE_SYNC_STATUS_HSYNC;
-+		if (video->frame_left > video->frame_right)
-+			continue;
-+
-+		invalid_resolution = false;
-+	} while (invalid_resolution && (tries++ < INVALID_RESOLUTION_RETRIES));
-+
-+	if (invalid_resolution) {
-+		dev_err(video->dev, "Invalid resolution detected\n");
-+		return;
-+	}
-+
-+	det->height = (video->frame_bottom - video->frame_top) + 1;
-+	det->width = (video->frame_right - video->frame_left) + 1;
-+	video->v4l2_input_status = 0;
-+
-+	/*
-+	 * Enable mode-detect watchdog, resolution-change watchdog and
-+	 * automatic compression after frame capture.
-+	 */
-+	aspeed_video_update(video, VE_INTERRUPT_CTRL, 0,
-+			    VE_INTERRUPT_MODE_DETECT_WD);
-+	aspeed_video_update(video, VE_SEQ_CTRL, 0,
-+			    VE_SEQ_CTRL_AUTO_COMP | VE_SEQ_CTRL_EN_WATCHDOG);
-+
-+	dev_dbg(video->dev, "Got resolution: %dx%d\n", det->width,
-+		det->height);
-+}
-+
-+static void aspeed_video_set_resolution(struct aspeed_video *video)
-+{
-+	struct v4l2_bt_timings *act = &video->active_timings;
-+	unsigned int size = act->width * act->height;
-+
-+	aspeed_video_calc_compressed_size(video, size);
-+
-+	/* Don't use direct mode below 1024 x 768 (irqs don't fire) */
-+	if (size < DIRECT_FETCH_THRESHOLD) {
-+		aspeed_video_write(video, VE_TGS_0,
-+				   FIELD_PREP(VE_TGS_FIRST,
-+					      video->frame_left - 1) |
-+				   FIELD_PREP(VE_TGS_LAST,
-+					      video->frame_right));
-+		aspeed_video_write(video, VE_TGS_1,
-+				   FIELD_PREP(VE_TGS_FIRST, video->frame_top) |
-+				   FIELD_PREP(VE_TGS_LAST,
-+					      video->frame_bottom + 1));
-+		aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_INT_DE);
-+	} else {
-+		aspeed_video_update(video, VE_CTRL, 0, VE_CTRL_DIRECT_FETCH);
-+	}
-+
-+	/* Set capture/compression frame sizes */
-+	aspeed_video_write(video, VE_CAP_WINDOW,
-+			   act->width << 16 | act->height);
-+	aspeed_video_write(video, VE_COMP_WINDOW,
-+			   act->width << 16 | act->height);
-+	aspeed_video_write(video, VE_SRC_SCANLINE_OFFSET, act->width * 4);
-+
-+	size *= 4;
-+
-+	if (size == video->srcs[0].size / 2) {
-+		aspeed_video_write(video, VE_SRC1_ADDR,
-+				   video->srcs[0].dma + size);
-+	} else if (size == video->srcs[0].size) {
-+		if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
-+			goto err_mem;
-+
-+		aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
-+	} else {
-+		aspeed_video_free_buf(video, &video->srcs[0]);
-+
-+		if (!aspeed_video_alloc_buf(video, &video->srcs[0], size))
-+			goto err_mem;
-+
-+		if (!aspeed_video_alloc_buf(video, &video->srcs[1], size))
-+			goto err_mem;
-+
-+		aspeed_video_write(video, VE_SRC0_ADDR, video->srcs[0].dma);
-+		aspeed_video_write(video, VE_SRC1_ADDR, video->srcs[1].dma);
-+	}
-+
-+	return;
-+
-+err_mem:
-+	dev_err(video->dev, "Failed to allocate source buffers\n");
-+
-+	if (video->srcs[0].size)
-+		aspeed_video_free_buf(video, &video->srcs[0]);
-+}
-+
-+static void aspeed_video_init_regs(struct aspeed_video *video)
-+{
-+	u32 comp_ctrl = VE_COMP_CTRL_RSVD |
-+		FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
-+		FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
-+	u32 ctrl = VE_CTRL_AUTO_OR_CURSOR;
-+	u32 seq_ctrl = VE_SEQ_CTRL_JPEG_MODE;
-+
-+	if (video->frame_rate)
-+		ctrl |= FIELD_PREP(VE_CTRL_FRC, video->frame_rate);
-+
-+	if (video->yuv420)
-+		seq_ctrl |= VE_SEQ_CTRL_YUV420;
-+
-+	/* Unlock VE registers */
-+	aspeed_video_write(video, VE_PROTECTION_KEY, VE_PROTECTION_KEY_UNLOCK);
-+
-+	/* Disable interrupts */
-+	aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
-+	aspeed_video_write(video, VE_INTERRUPT_STATUS, 0xffffffff);
-+
-+	/* Clear the offset */
-+	aspeed_video_write(video, VE_COMP_PROC_OFFSET, 0);
-+	aspeed_video_write(video, VE_COMP_OFFSET, 0);
-+
-+	aspeed_video_write(video, VE_JPEG_ADDR, video->jpeg.dma);
-+
-+	/* Set control registers */
-+	aspeed_video_write(video, VE_SEQ_CTRL, seq_ctrl);
-+	aspeed_video_write(video, VE_CTRL, ctrl);
-+	aspeed_video_write(video, VE_COMP_CTRL, comp_ctrl);
-+
-+	/* Don't downscale */
-+	aspeed_video_write(video, VE_SCALING_FACTOR, 0x10001000);
-+	aspeed_video_write(video, VE_SCALING_FILTER0, 0x00200000);
-+	aspeed_video_write(video, VE_SCALING_FILTER1, 0x00200000);
-+	aspeed_video_write(video, VE_SCALING_FILTER2, 0x00200000);
-+	aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
-+
-+	/* Set mode detection defaults */
-+	aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
-+}
-+
-+static void aspeed_video_start(struct aspeed_video *video)
-+{
-+	aspeed_video_on(video);
-+
-+	aspeed_video_init_regs(video);
-+
-+	/* Resolution set to 640x480 if no signal found */
-+	aspeed_video_get_resolution(video);
-+
-+	/* Set timings since the device is being opened for the first time */
-+	video->active_timings = video->detected_timings;
-+	aspeed_video_set_resolution(video);
-+
-+	video->pix_fmt.width = video->active_timings.width;
-+	video->pix_fmt.height = video->active_timings.height;
-+	video->pix_fmt.sizeimage = video->max_compressed_size;
-+}
-+
-+static void aspeed_video_stop(struct aspeed_video *video)
-+{
-+	set_bit(VIDEO_STOPPED, &video->flags);
-+	cancel_delayed_work_sync(&video->res_work);
-+
-+	aspeed_video_off(video);
-+
-+	if (video->srcs[0].size)
-+		aspeed_video_free_buf(video, &video->srcs[0]);
-+
-+	if (video->srcs[1].size)
-+		aspeed_video_free_buf(video, &video->srcs[1]);
-+
-+	video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
-+	video->flags = 0;
-+}
-+
-+static int aspeed_video_querycap(struct file *file, void *fh,
-+				 struct v4l2_capability *cap)
-+{
-+	strscpy(cap->driver, DEVICE_NAME, sizeof(cap->driver));
-+	strscpy(cap->card, "Aspeed Video Engine", sizeof(cap->card));
-+	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
-+		 DEVICE_NAME);
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_enum_format(struct file *file, void *fh,
-+				    struct v4l2_fmtdesc *f)
-+{
-+	if (f->index)
-+		return -EINVAL;
-+
-+	f->pixelformat = V4L2_PIX_FMT_JPEG;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_get_format(struct file *file, void *fh,
-+				   struct v4l2_format *f)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	f->fmt.pix = video->pix_fmt;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_enum_input(struct file *file, void *fh,
-+				   struct v4l2_input *inp)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	if (inp->index)
-+		return -EINVAL;
-+
-+	strscpy(inp->name, "Host VGA capture", sizeof(inp->name));
-+	inp->type = V4L2_INPUT_TYPE_CAMERA;
-+	inp->capabilities = V4L2_IN_CAP_DV_TIMINGS;
-+	inp->status = video->v4l2_input_status;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_get_input(struct file *file, void *fh, unsigned int *i)
-+{
-+	*i = 0;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_set_input(struct file *file, void *fh, unsigned int i)
-+{
-+	if (i)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_get_parm(struct file *file, void *fh,
-+				 struct v4l2_streamparm *a)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
-+	a->parm.capture.readbuffers = 3;
-+	a->parm.capture.timeperframe.numerator = 1;
-+	if (!video->frame_rate)
-+		a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
-+	else
-+		a->parm.capture.timeperframe.denominator = video->frame_rate;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_set_parm(struct file *file, void *fh,
-+				 struct v4l2_streamparm *a)
-+{
-+	unsigned int frame_rate = 0;
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	a->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
-+	a->parm.capture.readbuffers = 3;
-+
-+	if (a->parm.capture.timeperframe.numerator)
-+		frame_rate = a->parm.capture.timeperframe.denominator /
-+			a->parm.capture.timeperframe.numerator;
-+
-+	if (!frame_rate || frame_rate > MAX_FRAME_RATE) {
-+		frame_rate = 0;
-+		a->parm.capture.timeperframe.denominator = MAX_FRAME_RATE;
-+		a->parm.capture.timeperframe.numerator = 1;
-+	}
-+
-+	if (video->frame_rate != frame_rate) {
-+		video->frame_rate = frame_rate;
-+		aspeed_video_update(video, VE_CTRL, VE_CTRL_FRC,
-+				    FIELD_PREP(VE_CTRL_FRC, frame_rate));
-+	}
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_enum_framesizes(struct file *file, void *fh,
-+					struct v4l2_frmsizeenum *fsize)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	if (fsize->index)
-+		return -EINVAL;
-+
-+	if (fsize->pixel_format != V4L2_PIX_FMT_JPEG)
-+		return -EINVAL;
-+
-+	fsize->discrete.width = video->pix_fmt.width;
-+	fsize->discrete.height = video->pix_fmt.height;
-+	fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_enum_frameintervals(struct file *file, void *fh,
-+					    struct v4l2_frmivalenum *fival)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	if (fival->index)
-+		return -EINVAL;
-+
-+	if (fival->width != video->detected_timings.width ||
-+	    fival->height != video->detected_timings.height)
-+		return -EINVAL;
-+
-+	if (fival->pixel_format != V4L2_PIX_FMT_JPEG)
-+		return -EINVAL;
-+
-+	fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
-+
-+	fival->stepwise.min.denominator = MAX_FRAME_RATE;
-+	fival->stepwise.min.numerator = 1;
-+	fival->stepwise.max.denominator = 1;
-+	fival->stepwise.max.numerator = 1;
-+	fival->stepwise.step = fival->stepwise.max;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_set_dv_timings(struct file *file, void *fh,
-+				       struct v4l2_dv_timings *timings)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	if (timings->bt.width == video->active_timings.width &&
-+	    timings->bt.height == video->active_timings.height)
-+		return 0;
-+
-+	if (vb2_is_busy(&video->queue))
-+		return -EBUSY;
-+
-+	video->active_timings = timings->bt;
-+
-+	aspeed_video_set_resolution(video);
-+
-+	video->pix_fmt.width = timings->bt.width;
-+	video->pix_fmt.height = timings->bt.height;
-+	video->pix_fmt.sizeimage = video->max_compressed_size;
-+
-+	timings->type = V4L2_DV_BT_656_1120;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_get_dv_timings(struct file *file, void *fh,
-+				       struct v4l2_dv_timings *timings)
-+{
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	timings->type = V4L2_DV_BT_656_1120;
-+	timings->bt = video->active_timings;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_query_dv_timings(struct file *file, void *fh,
-+					 struct v4l2_dv_timings *timings)
-+{
-+	int rc;
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	/*
-+	 * This blocks only if the driver is currently in the process of
-+	 * detecting a new resolution; in the event of no signal or timeout
-+	 * this function is woken up.
-+	 */
-+	if (file->f_flags & O_NONBLOCK) {
-+		if (test_bit(VIDEO_RES_CHANGE, &video->flags))
-+			return -EAGAIN;
-+	} else {
-+		rc = wait_event_interruptible(video->wait,
-+					      !test_bit(VIDEO_RES_CHANGE,
-+							&video->flags));
-+		if (rc)
-+			return -EINTR;
-+	}
-+
-+	timings->type = V4L2_DV_BT_656_1120;
-+	timings->bt = video->detected_timings;
-+
-+	return video->v4l2_input_status ? -ENOLINK : 0;
-+}
-+
-+static int aspeed_video_enum_dv_timings(struct file *file, void *fh,
-+					struct v4l2_enum_dv_timings *timings)
-+{
-+	return v4l2_enum_dv_timings_cap(timings, &aspeed_video_timings_cap,
-+					NULL, NULL);
-+}
-+
-+static int aspeed_video_dv_timings_cap(struct file *file, void *fh,
-+				       struct v4l2_dv_timings_cap *cap)
-+{
-+	*cap = aspeed_video_timings_cap;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_sub_event(struct v4l2_fh *fh,
-+				  const struct v4l2_event_subscription *sub)
-+{
-+	switch (sub->type) {
-+	case V4L2_EVENT_SOURCE_CHANGE:
-+		return v4l2_src_change_event_subscribe(fh, sub);
-+	}
-+
-+	return v4l2_ctrl_subscribe_event(fh, sub);
-+}
-+
-+static const struct v4l2_ioctl_ops aspeed_video_ioctl_ops = {
-+	.vidioc_querycap = aspeed_video_querycap,
-+
-+	.vidioc_enum_fmt_vid_cap = aspeed_video_enum_format,
-+	.vidioc_g_fmt_vid_cap = aspeed_video_get_format,
-+	.vidioc_s_fmt_vid_cap = aspeed_video_get_format,
-+	.vidioc_try_fmt_vid_cap = aspeed_video_get_format,
-+
-+	.vidioc_reqbufs = vb2_ioctl_reqbufs,
-+	.vidioc_querybuf = vb2_ioctl_querybuf,
-+	.vidioc_qbuf = vb2_ioctl_qbuf,
-+	.vidioc_expbuf = vb2_ioctl_expbuf,
-+	.vidioc_dqbuf = vb2_ioctl_dqbuf,
-+	.vidioc_create_bufs = vb2_ioctl_create_bufs,
-+	.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
-+	.vidioc_streamon = vb2_ioctl_streamon,
-+	.vidioc_streamoff = vb2_ioctl_streamoff,
-+
-+	.vidioc_enum_input = aspeed_video_enum_input,
-+	.vidioc_g_input = aspeed_video_get_input,
-+	.vidioc_s_input = aspeed_video_set_input,
-+
-+	.vidioc_g_parm = aspeed_video_get_parm,
-+	.vidioc_s_parm = aspeed_video_set_parm,
-+	.vidioc_enum_framesizes = aspeed_video_enum_framesizes,
-+	.vidioc_enum_frameintervals = aspeed_video_enum_frameintervals,
-+
-+	.vidioc_s_dv_timings = aspeed_video_set_dv_timings,
-+	.vidioc_g_dv_timings = aspeed_video_get_dv_timings,
-+	.vidioc_query_dv_timings = aspeed_video_query_dv_timings,
-+	.vidioc_enum_dv_timings = aspeed_video_enum_dv_timings,
-+	.vidioc_dv_timings_cap = aspeed_video_dv_timings_cap,
-+
-+	.vidioc_subscribe_event = aspeed_video_sub_event,
-+	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
-+};
-+
-+static void aspeed_video_update_jpeg_quality(struct aspeed_video *video)
-+{
-+	u32 comp_ctrl = FIELD_PREP(VE_COMP_CTRL_DCT_LUM, video->jpeg_quality) |
-+		FIELD_PREP(VE_COMP_CTRL_DCT_CHR, video->jpeg_quality | 0x10);
-+
-+	aspeed_video_update(video, VE_COMP_CTRL,
-+			    VE_COMP_CTRL_DCT_LUM | VE_COMP_CTRL_DCT_CHR,
-+			    comp_ctrl);
-+}
-+
-+static void aspeed_video_update_subsampling(struct aspeed_video *video)
-+{
-+	if (video->jpeg.virt)
-+		aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
-+
-+	if (video->yuv420)
-+		aspeed_video_update(video, VE_SEQ_CTRL, 0, VE_SEQ_CTRL_YUV420);
-+	else
-+		aspeed_video_update(video, VE_SEQ_CTRL, VE_SEQ_CTRL_YUV420, 0);
-+}
-+
-+static int aspeed_video_set_ctrl(struct v4l2_ctrl *ctrl)
-+{
-+	struct aspeed_video *video = container_of(ctrl->handler,
-+						  struct aspeed_video,
-+						  ctrl_handler);
-+
-+	switch (ctrl->id) {
-+	case V4L2_CID_JPEG_COMPRESSION_QUALITY:
-+		video->jpeg_quality = ctrl->val;
-+		aspeed_video_update_jpeg_quality(video);
-+		break;
-+	case V4L2_CID_JPEG_CHROMA_SUBSAMPLING:
-+		if (ctrl->val == V4L2_JPEG_CHROMA_SUBSAMPLING_420) {
-+			video->yuv420 = true;
-+			aspeed_video_update_subsampling(video);
-+		} else {
-+			video->yuv420 = false;
-+			aspeed_video_update_subsampling(video);
-+		}
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct v4l2_ctrl_ops aspeed_video_ctrl_ops = {
-+	.s_ctrl = aspeed_video_set_ctrl,
-+};
-+
-+static void aspeed_video_resolution_work(struct work_struct *work)
-+{
-+	struct delayed_work *dwork = to_delayed_work(work);
-+	struct aspeed_video *video = container_of(dwork, struct aspeed_video,
-+						  res_work);
-+	u32 input_status = video->v4l2_input_status;
-+
-+	aspeed_video_on(video);
-+
-+	/* Exit early in case no clients remain */
-+	if (test_bit(VIDEO_STOPPED, &video->flags))
-+		goto done;
-+
-+	aspeed_video_init_regs(video);
-+
-+	aspeed_video_get_resolution(video);
-+
-+	if (video->detected_timings.width != video->active_timings.width ||
-+	    video->detected_timings.height != video->active_timings.height ||
-+	    input_status != video->v4l2_input_status) {
-+		static const struct v4l2_event ev = {
-+			.type = V4L2_EVENT_SOURCE_CHANGE,
-+			.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
-+		};
-+
-+		v4l2_event_queue(&video->vdev, &ev);
-+	} else if (test_bit(VIDEO_STREAMING, &video->flags)) {
-+		/* No resolution change so just restart streaming */
-+		aspeed_video_start_frame(video);
-+	}
-+
-+done:
-+	clear_bit(VIDEO_RES_CHANGE, &video->flags);
-+	wake_up_interruptible_all(&video->wait);
-+}
-+
-+static int aspeed_video_open(struct file *file)
-+{
-+	int rc;
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	mutex_lock(&video->video_lock);
-+
-+	rc = v4l2_fh_open(file);
-+	if (rc) {
-+		mutex_unlock(&video->video_lock);
-+		return rc;
-+	}
-+
-+	if (v4l2_fh_is_singular_file(file))
-+		aspeed_video_start(video);
-+
-+	mutex_unlock(&video->video_lock);
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_release(struct file *file)
-+{
-+	int rc;
-+	struct aspeed_video *video = video_drvdata(file);
-+
-+	mutex_lock(&video->video_lock);
-+
-+	if (v4l2_fh_is_singular_file(file))
-+		aspeed_video_stop(video);
-+
-+	rc = _vb2_fop_release(file, NULL);
-+
-+	mutex_unlock(&video->video_lock);
-+
-+	return rc;
-+}
-+
-+static const struct v4l2_file_operations aspeed_video_v4l2_fops = {
-+	.owner = THIS_MODULE,
-+	.read = vb2_fop_read,
-+	.poll = vb2_fop_poll,
-+	.unlocked_ioctl = video_ioctl2,
-+	.mmap = vb2_fop_mmap,
-+	.open = aspeed_video_open,
-+	.release = aspeed_video_release,
-+};
-+
-+static int aspeed_video_queue_setup(struct vb2_queue *q,
-+				    unsigned int *num_buffers,
-+				    unsigned int *num_planes,
-+				    unsigned int sizes[],
-+				    struct device *alloc_devs[])
-+{
-+	struct aspeed_video *video = vb2_get_drv_priv(q);
-+
-+	if (*num_planes) {
-+		if (sizes[0] < video->max_compressed_size)
-+			return -EINVAL;
-+
-+		return 0;
-+	}
-+
-+	*num_planes = 1;
-+	sizes[0] = video->max_compressed_size;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_buf_prepare(struct vb2_buffer *vb)
-+{
-+	struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
-+
-+	if (vb2_plane_size(vb, 0) < video->max_compressed_size)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_start_streaming(struct vb2_queue *q,
-+					unsigned int count)
-+{
-+	int rc;
-+	struct aspeed_video *video = vb2_get_drv_priv(q);
-+
-+	video->sequence = 0;
-+
-+	rc = aspeed_video_start_frame(video);
-+	if (rc) {
-+		aspeed_video_bufs_done(video, VB2_BUF_STATE_QUEUED);
-+		return rc;
-+	}
-+
-+	set_bit(VIDEO_STREAMING, &video->flags);
-+	return 0;
-+}
-+
-+static void aspeed_video_stop_streaming(struct vb2_queue *q)
-+{
-+	int rc;
-+	struct aspeed_video *video = vb2_get_drv_priv(q);
-+
-+	clear_bit(VIDEO_STREAMING, &video->flags);
-+
-+	rc = wait_event_timeout(video->wait,
-+				!test_bit(VIDEO_FRAME_INPRG, &video->flags),
-+				STOP_TIMEOUT);
-+	if (!rc) {
-+		dev_err(video->dev, "Timed out when stopping streaming\n");
-+
-+		/*
-+		 * Need to force stop any DMA and try and get HW into a good
-+		 * state for future calls to start streaming again.
-+		 */
-+		aspeed_video_reset(video);
-+		aspeed_video_init_regs(video);
-+
-+		aspeed_video_get_resolution(video);
-+	}
-+
-+	aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
-+}
-+
-+static void aspeed_video_buf_queue(struct vb2_buffer *vb)
-+{
-+	bool empty;
-+	struct aspeed_video *video = vb2_get_drv_priv(vb->vb2_queue);
-+	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
-+	struct aspeed_video_buffer *avb = to_aspeed_video_buffer(vbuf);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&video->lock, flags);
-+	empty = list_empty(&video->buffers);
-+	list_add_tail(&avb->link, &video->buffers);
-+	spin_unlock_irqrestore(&video->lock, flags);
-+
-+	if (test_bit(VIDEO_STREAMING, &video->flags) &&
-+	    !test_bit(VIDEO_FRAME_INPRG, &video->flags) && empty)
-+		aspeed_video_start_frame(video);
-+}
-+
-+static const struct vb2_ops aspeed_video_vb2_ops = {
-+	.queue_setup = aspeed_video_queue_setup,
-+	.wait_prepare = vb2_ops_wait_prepare,
-+	.wait_finish = vb2_ops_wait_finish,
-+	.buf_prepare = aspeed_video_buf_prepare,
-+	.start_streaming = aspeed_video_start_streaming,
-+	.stop_streaming = aspeed_video_stop_streaming,
-+	.buf_queue =  aspeed_video_buf_queue,
-+};
-+
-+static int aspeed_video_setup_video(struct aspeed_video *video)
-+{
-+	const u64 mask = ~(BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_444) |
-+			   BIT(V4L2_JPEG_CHROMA_SUBSAMPLING_420));
-+	struct v4l2_device *v4l2_dev = &video->v4l2_dev;
-+	struct vb2_queue *vbq = &video->queue;
-+	struct video_device *vdev = &video->vdev;
-+	int rc;
-+
-+	video->pix_fmt.pixelformat = V4L2_PIX_FMT_JPEG;
-+	video->pix_fmt.field = V4L2_FIELD_NONE;
-+	video->pix_fmt.colorspace = V4L2_COLORSPACE_SRGB;
-+	video->pix_fmt.quantization = V4L2_QUANTIZATION_FULL_RANGE;
-+	video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
-+
-+	rc = v4l2_device_register(video->dev, v4l2_dev);
-+	if (rc) {
-+		dev_err(video->dev, "Failed to register v4l2 device\n");
-+		return rc;
-+	}
-+
-+	v4l2_ctrl_handler_init(&video->ctrl_handler, 2);
-+	v4l2_ctrl_new_std(&video->ctrl_handler, &aspeed_video_ctrl_ops,
-+			  V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
-+			  ASPEED_VIDEO_JPEG_NUM_QUALITIES - 1, 1, 0);
-+	v4l2_ctrl_new_std_menu(&video->ctrl_handler, &aspeed_video_ctrl_ops,
-+			       V4L2_CID_JPEG_CHROMA_SUBSAMPLING,
-+			       V4L2_JPEG_CHROMA_SUBSAMPLING_420, mask,
-+			       V4L2_JPEG_CHROMA_SUBSAMPLING_444);
-+
-+	if (video->ctrl_handler.error) {
-+		v4l2_ctrl_handler_free(&video->ctrl_handler);
-+		v4l2_device_unregister(v4l2_dev);
-+
-+		dev_err(video->dev, "Failed to init controls: %d\n",
-+			video->ctrl_handler.error);
-+		return rc;
-+	}
-+
-+	v4l2_dev->ctrl_handler = &video->ctrl_handler;
-+
-+	vbq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+	vbq->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
-+	vbq->dev = v4l2_dev->dev;
-+	vbq->lock = &video->video_lock;
-+	vbq->ops = &aspeed_video_vb2_ops;
-+	vbq->mem_ops = &vb2_dma_contig_memops;
-+	vbq->drv_priv = video;
-+	vbq->buf_struct_size = sizeof(struct aspeed_video_buffer);
-+	vbq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
-+	vbq->min_buffers_needed = 3;
-+
-+	rc = vb2_queue_init(vbq);
-+	if (rc) {
-+		v4l2_ctrl_handler_free(&video->ctrl_handler);
-+		v4l2_device_unregister(v4l2_dev);
-+
-+		dev_err(video->dev, "Failed to init vb2 queue\n");
-+		return rc;
-+	}
-+
-+	vdev->queue = vbq;
-+	vdev->fops = &aspeed_video_v4l2_fops;
-+	vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
-+		V4L2_CAP_STREAMING;
-+	vdev->v4l2_dev = v4l2_dev;
-+	strscpy(vdev->name, DEVICE_NAME, sizeof(vdev->name));
-+	vdev->vfl_type = VFL_TYPE_GRABBER;
-+	vdev->vfl_dir = VFL_DIR_RX;
-+	vdev->release = video_device_release_empty;
-+	vdev->ioctl_ops = &aspeed_video_ioctl_ops;
-+	vdev->lock = &video->video_lock;
-+
-+	video_set_drvdata(vdev, video);
-+	rc = video_register_device(vdev, VFL_TYPE_GRABBER, 0);
-+	if (rc) {
-+		vb2_queue_release(vbq);
-+		v4l2_ctrl_handler_free(&video->ctrl_handler);
-+		v4l2_device_unregister(v4l2_dev);
-+
-+		dev_err(video->dev, "Failed to register video device\n");
-+		return rc;
-+	}
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_init(struct aspeed_video *video)
-+{
-+	int irq;
-+	int rc;
-+	struct device *dev = video->dev;
-+
-+	irq = irq_of_parse_and_map(dev->of_node, 0);
-+	if (!irq) {
-+		dev_err(dev, "Unable to find IRQ\n");
-+		return -ENODEV;
-+	}
-+
-+	rc = devm_request_irq(dev, irq, aspeed_video_irq, IRQF_SHARED,
-+			      DEVICE_NAME, video);
-+	if (rc < 0) {
-+		dev_err(dev, "Unable to request IRQ %d\n", irq);
-+		return rc;
-+	}
-+
-+	video->eclk = devm_clk_get(dev, "eclk");
-+	if (IS_ERR(video->eclk)) {
-+		dev_err(dev, "Unable to get ECLK\n");
-+		return PTR_ERR(video->eclk);
-+	}
-+
-+	video->vclk = devm_clk_get(dev, "vclk");
-+	if (IS_ERR(video->vclk)) {
-+		dev_err(dev, "Unable to get VCLK\n");
-+		return PTR_ERR(video->vclk);
-+	}
-+
-+	video->rst = devm_reset_control_get_exclusive(dev, NULL);
-+	if (IS_ERR(video->rst)) {
-+		dev_err(dev, "Unable to get VE reset\n");
-+		return PTR_ERR(video->rst);
-+	}
-+
-+	rc = of_reserved_mem_device_init(dev);
-+	if (rc) {
-+		dev_err(dev, "Unable to reserve memory\n");
-+		return rc;
-+	}
-+
-+	rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
-+	if (rc) {
-+		dev_err(dev, "Failed to set DMA mask\n");
-+		of_reserved_mem_device_release(dev);
-+		return rc;
-+	}
-+
-+	if (!aspeed_video_alloc_buf(video, &video->jpeg,
-+				    VE_JPEG_HEADER_SIZE)) {
-+		dev_err(dev, "Failed to allocate DMA for JPEG header\n");
-+		of_reserved_mem_device_release(dev);
-+		return rc;
-+	}
-+
-+	aspeed_video_init_jpeg_table(video->jpeg.virt, video->yuv420);
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_probe(struct platform_device *pdev)
-+{
-+	int rc;
-+	struct resource *res;
-+	struct aspeed_video *video = kzalloc(sizeof(*video), GFP_KERNEL);
-+
-+	if (!video)
-+		return -ENOMEM;
-+
-+	video->frame_rate = 30;
-+	video->dev = &pdev->dev;
+@@ -1661,6 +1661,7 @@ static int aspeed_video_probe(struct platform_device *pdev)
+ 
+ 	video->frame_rate = 30;
+ 	video->dev = &pdev->dev;
 +	spin_lock_init(&video->lock);
-+	mutex_init(&video->video_lock);
-+	init_waitqueue_head(&video->wait);
-+	INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
-+	INIT_LIST_HEAD(&video->buffers);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+
-+	video->base = devm_ioremap_resource(video->dev, res);
-+
-+	if (IS_ERR(video->base))
-+		return PTR_ERR(video->base);
-+
-+	rc = aspeed_video_init(video);
-+	if (rc)
-+		return rc;
-+
-+	rc = aspeed_video_setup_video(video);
-+	if (rc)
-+		return rc;
-+
-+	return 0;
-+}
-+
-+static int aspeed_video_remove(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
-+	struct aspeed_video *video = to_aspeed_video(v4l2_dev);
-+
-+	video_unregister_device(&video->vdev);
-+
-+	vb2_queue_release(&video->queue);
-+
-+	v4l2_ctrl_handler_free(&video->ctrl_handler);
-+
-+	v4l2_device_unregister(v4l2_dev);
-+
-+	dma_free_coherent(video->dev, VE_JPEG_HEADER_SIZE, video->jpeg.virt,
-+			  video->jpeg.dma);
-+
-+	of_reserved_mem_device_release(dev);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id aspeed_video_of_match[] = {
-+	{ .compatible = "aspeed,ast2400-video-engine" },
-+	{ .compatible = "aspeed,ast2500-video-engine" },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, aspeed_video_of_match);
-+
-+static struct platform_driver aspeed_video_driver = {
-+	.driver = {
-+		.name = DEVICE_NAME,
-+		.of_match_table = aspeed_video_of_match,
-+	},
-+	.probe = aspeed_video_probe,
-+	.remove = aspeed_video_remove,
-+};
-+
-+module_platform_driver(aspeed_video_driver);
-+
-+MODULE_DESCRIPTION("ASPEED Video Engine Driver");
-+MODULE_AUTHOR("Eddie James");
-+MODULE_LICENSE("GPL v2");
+ 	mutex_init(&video->video_lock);
+ 	init_waitqueue_head(&video->wait);
+ 	INIT_DELAYED_WORK(&video->res_work, aspeed_video_resolution_work);
 diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
 index 335879505a72..0b0f3a0ebe9b 100644
 --- a/include/dt-bindings/clock/aspeed-clock.h
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch
index 7400e2848..02ca65e9f 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch
@@ -1,4 +1,4 @@
-From a771e5448ed259f768434d498daf8d8b292713de Mon Sep 17 00:00:00 2001
+From 95bae3d3051ee13627e5ef92bb9d60cfb5731118 Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Mon, 11 Feb 2019 17:02:35 -0800
 Subject: [PATCH] Add Aspeed PWM driver which uses FTTMR010 timer IP
@@ -12,17 +12,16 @@ Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 ---
  arch/arm/boot/dts/aspeed-g5.dtsi     |   2 +-
  drivers/clocksource/timer-fttmr010.c |  25 ++
- drivers/input/misc/pwm-beeper.c      |   8 +-
  drivers/pwm/Kconfig                  |   9 +
  drivers/pwm/Makefile                 |   1 +
  drivers/pwm/pwm-fttmr010.c           | 465 +++++++++++++++++++++++++++++++++++
  include/clocksource/timer-fttmr010.h |  17 ++
- 7 files changed, 522 insertions(+), 5 deletions(-)
+ 6 files changed, 514 insertions(+), 5 deletions(-)
  create mode 100644 drivers/pwm/pwm-fttmr010.c
  create mode 100644 include/clocksource/timer-fttmr010.h
 
 diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
-index 6686a13a5354..ccf2845cd788 100644
+index d5783eaf30ae..992de63d7a19 100644
 --- a/arch/arm/boot/dts/aspeed-g5.dtsi
 +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
 @@ -301,7 +301,7 @@
@@ -35,7 +34,7 @@ index 6686a13a5354..ccf2845cd788 100644
  				interrupts = <16 17 18 35 36 37 38 39>;
  				clocks = <&syscon ASPEED_CLK_APB>;
 diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c
-index cf93f6419b51..8226ccf5cc2c 100644
+index fadff7915dd9..49a790924360 100644
 --- a/drivers/clocksource/timer-fttmr010.c
 +++ b/drivers/clocksource/timer-fttmr010.c
 @@ -20,6 +20,8 @@
@@ -45,9 +44,9 @@ index cf93f6419b51..8226ccf5cc2c 100644
 +#include <clocksource/timer-fttmr010.h>
 +
  /*
-  * Register definitions for the timers
+  * Register definitions common for all the timer variants.
   */
-@@ -77,6 +79,9 @@
+@@ -91,6 +93,9 @@
  #define TIMER_3_INT_OVERFLOW	BIT(8)
  #define TIMER_INT_ALL_MASK	0x1ff
  
@@ -57,7 +56,7 @@ index cf93f6419b51..8226ccf5cc2c 100644
  struct fttmr010 {
  	void __iomem *base;
  	unsigned int tick_rate;
-@@ -123,8 +128,11 @@ static int fttmr010_timer_set_next_event(unsigned long cycles,
+@@ -137,8 +142,11 @@ static int fttmr010_timer_set_next_event(unsigned long cycles,
  				       struct clock_event_device *evt)
  {
  	struct fttmr010 *fttmr010 = to_fttmr010(evt);
@@ -69,7 +68,7 @@ index cf93f6419b51..8226ccf5cc2c 100644
  	/* Stop */
  	cr = readl(fttmr010->base + TIMER_CR);
  	cr &= ~fttmr010->t1_enable_val;
-@@ -147,27 +155,37 @@ static int fttmr010_timer_set_next_event(unsigned long cycles,
+@@ -161,27 +169,37 @@ static int fttmr010_timer_set_next_event(unsigned long cycles,
  	cr |= fttmr010->t1_enable_val;
  	writel(cr, fttmr010->base + TIMER_CR);
  
@@ -107,16 +106,16 @@ index cf93f6419b51..8226ccf5cc2c 100644
  	/* Stop */
  	cr = readl(fttmr010->base + TIMER_CR);
  	cr &= ~fttmr010->t1_enable_val;
-@@ -186,6 +204,8 @@ static int fttmr010_timer_set_oneshot(struct clock_event_device *evt)
- 	cr |= TIMER_1_INT_MATCH1;
- 	writel(cr, fttmr010->base + TIMER_INTR_MASK);
+@@ -201,6 +219,8 @@ static int fttmr010_timer_set_oneshot(struct clock_event_device *evt)
+ 		writel(cr, fttmr010->base + TIMER_INTR_MASK);
+ 	}
  
 +	spin_unlock_irqrestore(&timer_fttmr010_lock, flags);
 +
  	return 0;
  }
  
-@@ -193,8 +213,11 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt)
+@@ -208,8 +228,11 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt)
  {
  	struct fttmr010 *fttmr010 = to_fttmr010(evt);
  	u32 period = DIV_ROUND_CLOSEST(fttmr010->tick_rate, HZ);
@@ -128,7 +127,7 @@ index cf93f6419b51..8226ccf5cc2c 100644
  	/* Stop */
  	cr = readl(fttmr010->base + TIMER_CR);
  	cr &= ~fttmr010->t1_enable_val;
-@@ -221,6 +244,8 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt)
+@@ -235,6 +258,8 @@ static int fttmr010_timer_set_periodic(struct clock_event_device *evt)
  	cr |= fttmr010->t1_enable_val;
  	writel(cr, fttmr010->base + TIMER_CR);
  
@@ -137,45 +136,11 @@ index cf93f6419b51..8226ccf5cc2c 100644
  	return 0;
  }
  
-diff --git a/drivers/input/misc/pwm-beeper.c b/drivers/input/misc/pwm-beeper.c
-index edca0d737750..a3baa52f187f 100644
---- a/drivers/input/misc/pwm-beeper.c
-+++ b/drivers/input/misc/pwm-beeper.c
-@@ -52,7 +52,7 @@ static int pwm_beeper_on(struct pwm_beeper *beeper, unsigned long period)
- 	if (error)
- 		return error;
- 
--	if (!beeper->amplifier_on) {
-+	if (beeper->amplifier && !beeper->amplifier_on) {
- 		error = regulator_enable(beeper->amplifier);
- 		if (error) {
- 			pwm_disable(beeper->pwm);
-@@ -67,7 +67,7 @@ static int pwm_beeper_on(struct pwm_beeper *beeper, unsigned long period)
- 
- static void pwm_beeper_off(struct pwm_beeper *beeper)
- {
--	if (beeper->amplifier_on) {
-+	if (beeper->amplifier && beeper->amplifier_on) {
- 		regulator_disable(beeper->amplifier);
- 		beeper->amplifier_on = false;
- 	}
-@@ -163,9 +163,9 @@ static int pwm_beeper_probe(struct platform_device *pdev)
- 	if (IS_ERR(beeper->amplifier)) {
- 		error = PTR_ERR(beeper->amplifier);
- 		if (error != -EPROBE_DEFER)
--			dev_err(dev, "Failed to get 'amp' regulator: %d\n",
-+			dev_dbg(dev, "Failed to get 'amp' regulator: %d\n",
- 				error);
--		return error;
-+		beeper->amplifier = NULL;
- 	}
- 
- 	INIT_WORK(&beeper->work, pwm_beeper_work);
 diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
-index 504d252716f2..9d4642c668c9 100644
+index a8f47df0655a..92a8fbebe2d9 100644
 --- a/drivers/pwm/Kconfig
 +++ b/drivers/pwm/Kconfig
-@@ -168,6 +168,15 @@ config PWM_FSL_FTM
+@@ -170,6 +170,15 @@ config PWM_FSL_FTM
  	  To compile this driver as a module, choose M here: the module
  	  will be called pwm-fsl-ftm.
  
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0040-i2c-Add-mux-hold-unhold-msg-types.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0040-i2c-Add-mux-hold-unhold-msg-types.patch
index 85b2f45a1..1b86e9c04 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0040-i2c-Add-mux-hold-unhold-msg-types.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0040-i2c-Add-mux-hold-unhold-msg-types.patch
@@ -1,4 +1,4 @@
-From 38ba0a960fcd17f7b3480fe3025c261fd60fe979 Mon Sep 17 00:00:00 2001
+From 80ea6461d77e5b415d9f83fa2f4708fc21eab09b Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Fri, 15 Feb 2019 16:05:09 -0800
 Subject: [PATCH] i2c: Add mux hold/unhold msg types
@@ -39,19 +39,19 @@ in downstream only.
 
 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 ---
- drivers/i2c/i2c-core-base.c  |  79 +++++++++++++++++++++++++++----
+ drivers/i2c/i2c-core-base.c  |  99 ++++++++++++++++++++++++++++++++++-----
  drivers/i2c/i2c-core-smbus.c |  17 ++++++-
  drivers/i2c/i2c-mux.c        | 109 +++++++++++++++++++++++++++++++++++++++----
  include/linux/i2c-mux.h      |   3 ++
  include/linux/i2c.h          |  25 ++++++++++
  include/uapi/linux/i2c.h     |   1 +
- 6 files changed, 215 insertions(+), 19 deletions(-)
+ 6 files changed, 233 insertions(+), 21 deletions(-)
 
 diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
-index 9200e349f29e..728b818501b1 100644
+index 28460f6a60cc..009b0507768e 100644
 --- a/drivers/i2c/i2c-core-base.c
 +++ b/drivers/i2c/i2c-core-base.c
-@@ -1211,6 +1211,25 @@ int i2c_handle_smbus_host_notify(struct i2c_adapter *adap, unsigned short addr)
+@@ -1210,6 +1210,25 @@ int i2c_handle_smbus_host_notify(struct i2c_adapter *adap, unsigned short addr)
  }
  EXPORT_SYMBOL_GPL(i2c_handle_smbus_host_notify);
  
@@ -77,7 +77,7 @@ index 9200e349f29e..728b818501b1 100644
  static int i2c_register_adapter(struct i2c_adapter *adap)
  {
  	int res = -EINVAL;
-@@ -1292,6 +1311,9 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
+@@ -1291,6 +1310,9 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
  	bus_for_each_drv(&i2c_bus_type, NULL, adap, __process_new_adapter);
  	mutex_unlock(&core_lock);
  
@@ -87,7 +87,7 @@ index 9200e349f29e..728b818501b1 100644
  	return 0;
  
  out_reg:
-@@ -1512,6 +1534,8 @@ void i2c_del_adapter(struct i2c_adapter *adap)
+@@ -1511,6 +1533,8 @@ void i2c_del_adapter(struct i2c_adapter *adap)
  	idr_remove(&i2c_adapter_idr, adap->nr);
  	mutex_unlock(&core_lock);
  
@@ -96,7 +96,7 @@ index 9200e349f29e..728b818501b1 100644
  	/* Clear the device structure in case this adapter is ever going to be
  	   added again */
  	memset(&adap->dev, 0, sizeof(adap->dev));
-@@ -1861,7 +1885,9 @@ static int i2c_check_for_quirks(struct i2c_adapter *adap, struct i2c_msg *msgs,
+@@ -1860,7 +1884,9 @@ static int i2c_check_for_quirks(struct i2c_adapter *adap, struct i2c_msg *msgs,
   */
  int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  {
@@ -106,7 +106,7 @@ index 9200e349f29e..728b818501b1 100644
  	int ret, try;
  
  	if (WARN_ON(!msgs || num < 1))
-@@ -1870,6 +1896,25 @@ int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+@@ -1869,6 +1895,25 @@ int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  	if (adap->quirks && i2c_check_for_quirks(adap, msgs, num))
  		return -EOPNOTSUPP;
  
@@ -132,7 +132,7 @@ index 9200e349f29e..728b818501b1 100644
  	/*
  	 * i2c_trace_msg_key gets enabled when tracepoint i2c_transfer gets
  	 * enabled.  This is an efficient way of keeping the for-loop from
-@@ -1902,6 +1947,9 @@ int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+@@ -1901,6 +1946,9 @@ int __i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  		trace_i2c_result(adap, num, ret);
  	}
  
@@ -142,26 +142,39 @@ index 9200e349f29e..728b818501b1 100644
  	return ret;
  }
  EXPORT_SYMBOL(__i2c_transfer);
-@@ -1920,6 +1968,7 @@ EXPORT_SYMBOL(__i2c_transfer);
+@@ -1919,6 +1967,7 @@ EXPORT_SYMBOL(__i2c_transfer);
   */
  int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  {
 +	bool do_bus_lock = true;
  	int ret;
  
- 	/* REVISIT the fault reporting model here is weak:
-@@ -1949,18 +1998,30 @@ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
- 				(msgs[ret].flags & I2C_M_RECV_LEN) ? "+" : "");
- 		}
- #endif
--
--		if (in_atomic() || irqs_disabled()) {
--			ret = i2c_trylock_bus(adap, I2C_LOCK_SEGMENT);
--			if (!ret)
--				/* I2C activity is ongoing. */
--				return -EAGAIN;
--		} else {
--			i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
+ 	if (!adap->algo->master_xfer) {
+@@ -1942,19 +1991,47 @@ int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+ 	 *    one (discarding status on the second message) or errno
+ 	 *    (discarding status on the first one).
+ 	 */
+-	if (in_atomic() || irqs_disabled()) {
+-		ret = i2c_trylock_bus(adap, I2C_LOCK_SEGMENT);
+-		if (!ret)
+-			/* I2C activity is ongoing. */
+-			return -EAGAIN;
+-	} else {
+-		i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
+-	}
+ 
+-	ret = __i2c_transfer(adap, msgs, num);
+-	i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
++	if (adap->algo->master_xfer) {
++#ifdef DEBUG
++		for (ret = 0; ret < num; ret++) {
++			dev_dbg(&adap->dev,
++				"master_xfer[%d] %c, addr=0x%02x, len=%d%s\n",
++				ret, (msgs[ret].flags & I2C_M_RD) ? 'R' : 'W',
++				msgs[ret].addr, msgs[ret].len,
++				(msgs[ret].flags & I2C_M_RECV_LEN) ? "+" : "");
++		}
++#endif
 +		/*
 +		 * Do not lock a bus for delivering an unhold msg to a mux
 +		 * adpater. This is just for a single length unhold msg case.
@@ -181,15 +194,21 @@ index 9200e349f29e..728b818501b1 100644
 +			} else {
 +				i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
 +			}
- 		}
++		}
  
- 		ret = __i2c_transfer(adap, msgs, num);
--		i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
+-	return ret;
++		ret = __i2c_transfer(adap, msgs, num);
 +		if (do_bus_lock)
 +			i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
++
++		return ret;
++	} else {
++		dev_dbg(&adap->dev, "I2C level transfers not supported\n");
++		return -EOPNOTSUPP;
++	}
+ }
+ EXPORT_SYMBOL(i2c_transfer);
  
- 		return ret;
- 	} else {
 diff --git a/drivers/i2c/i2c-core-smbus.c b/drivers/i2c/i2c-core-smbus.c
 index 9cd66cabb84f..64c58911bf21 100644
 --- a/drivers/i2c/i2c-core-smbus.c
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch
index 9e7757011..9aee6f0c0 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0041-Enable-passthrough-based-gpio-character-device.patch
@@ -1,20 +1,20 @@
-From d34efc982a9206db87da49be3d9b1e20f59be56f Mon Sep 17 00:00:00 2001
+From 554bc7a7c7aa6e0c0ec49a24063102e17954d06c Mon Sep 17 00:00:00 2001
 From: Kuiying Wang <kuiying.wang@intel.com>
 Date: Thu, 31 Jan 2019 17:47:39 +0800
 Subject: [PATCH] Enable passthrough based gpio character device.
 
 Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
 ---
- drivers/gpio/gpio-aspeed.c              | 47 ++++++++++++++++++++++-
- drivers/gpio/gpiolib.c                  | 51 +++++++++++++++++++++++--
+ drivers/gpio/gpio-aspeed.c              | 47 ++++++++++++++++++++++++++++--
+ drivers/gpio/gpiolib.c                  | 51 +++++++++++++++++++++++++++++++--
  drivers/gpio/gpiolib.h                  |  1 +
- include/linux/gpio/consumer.h           |  9 +++++
- include/linux/pinctrl/pinconf-generic.h |  2 +
+ include/linux/gpio/consumer.h           |  9 ++++++
+ include/linux/pinctrl/pinconf-generic.h |  2 ++
  include/uapi/linux/gpio.h               |  1 +
  6 files changed, 106 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
-index 2342e154029b..06fd95197684 100644
+index 854bce4fb9e7..5f1bce3a9274 100644
 --- a/drivers/gpio/gpio-aspeed.c
 +++ b/drivers/gpio/gpio-aspeed.c
 @@ -17,9 +17,11 @@
@@ -115,10 +115,10 @@ index 2342e154029b..06fd95197684 100644
  
  	gpio_id = of_match_node(aspeed_gpio_of_table, pdev->dev.of_node);
 diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
-index a8e01d99919c..21eeca17583d 100644
+index d1adfdf50fb3..4f9fdd25c6d7 100644
 --- a/drivers/gpio/gpiolib.c
 +++ b/drivers/gpio/gpiolib.c
-@@ -419,6 +419,7 @@ struct linehandle_state {
+@@ -428,6 +428,7 @@ struct linehandle_state {
  	GPIOHANDLE_REQUEST_OUTPUT | \
  	GPIOHANDLE_REQUEST_ACTIVE_LOW | \
  	GPIOHANDLE_REQUEST_OPEN_DRAIN | \
@@ -126,7 +126,7 @@ index a8e01d99919c..21eeca17583d 100644
  	GPIOHANDLE_REQUEST_OPEN_SOURCE)
  
  static long linehandle_ioctl(struct file *filep, unsigned int cmd,
-@@ -519,7 +520,6 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
+@@ -530,7 +531,6 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
  		return -EINVAL;
  
  	lflags = handlereq.flags;
@@ -134,7 +134,7 @@ index a8e01d99919c..21eeca17583d 100644
  	/* Return an error if an unknown flag is set */
  	if (lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
  		return -EINVAL;
-@@ -579,6 +579,8 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
+@@ -590,6 +590,8 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
  			set_bit(FLAG_OPEN_DRAIN, &desc->flags);
  		if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
  			set_bit(FLAG_OPEN_SOURCE, &desc->flags);
@@ -143,7 +143,7 @@ index a8e01d99919c..21eeca17583d 100644
  
  		ret = gpiod_set_transitory(desc, false);
  		if (ret < 0)
-@@ -598,6 +600,11 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
+@@ -609,6 +611,11 @@ static int linehandle_create(struct gpio_device *gdev, void __user *ip)
  			ret = gpiod_direction_input(desc);
  			if (ret)
  				goto out_free_descs;
@@ -155,7 +155,7 @@ index a8e01d99919c..21eeca17583d 100644
  		}
  		dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
  			offset);
-@@ -1010,7 +1017,6 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+@@ -1027,7 +1034,6 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  	struct gpio_device *gdev = filp->private_data;
  	struct gpio_chip *chip = gdev->chip;
  	void __user *ip = (void __user *)arg;
@@ -163,7 +163,7 @@ index a8e01d99919c..21eeca17583d 100644
  	/* We fail any subsequent ioctl():s when the chip is gone */
  	if (!chip)
  		return -ENODEV;
-@@ -1018,7 +1024,6 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+@@ -1035,7 +1041,6 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
  	/* Fill in the struct and pass to userspace */
  	if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
  		struct gpiochip_info chipinfo;
@@ -171,11 +171,10 @@ index a8e01d99919c..21eeca17583d 100644
  		memset(&chipinfo, 0, sizeof(chipinfo));
  
  		strncpy(chipinfo.name, dev_name(&gdev->dev),
-@@ -2643,6 +2648,46 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
- }
+@@ -2709,6 +2714,46 @@ int gpiod_direction_output(struct gpio_desc *desc, int value)
  EXPORT_SYMBOL_GPL(gpiod_direction_output);
  
-+/**
+ /**
 + * gpiod_direction_pass_through - set the GPIO direction to pass-through
 + * @desc:	GPIO to set to pass-through
 + *
@@ -215,14 +214,15 @@ index a8e01d99919c..21eeca17583d 100644
 +}
 +EXPORT_SYMBOL_GPL(gpiod_direction_pass_through);
 +
- /**
++/**
   * gpiod_set_debounce - sets @debounce time for a GPIO
   * @desc: descriptor of the GPIO for which to set debounce time
+  * @debounce: debounce time in microseconds
 diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
-index a7e49fef73d4..b143ee47870a 100644
+index bc57f0dc5953..a821a04fc04b 100644
 --- a/drivers/gpio/gpiolib.h
 +++ b/drivers/gpio/gpiolib.h
-@@ -210,6 +210,7 @@ struct gpio_desc {
+@@ -212,6 +212,7 @@ struct gpio_desc {
  #define FLAG_IS_OUT	1
  #define FLAG_EXPORT	2	/* protected by sysfs_lock */
  #define FLAG_SYSFS	3	/* exported via /sys/class/gpio/control */
@@ -231,10 +231,10 @@ index a7e49fef73d4..b143ee47870a 100644
  #define FLAG_OPEN_DRAIN	7	/* Gpio is open drain type */
  #define FLAG_OPEN_SOURCE 8	/* Gpio is open source type */
 diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
-index 21ddbe440030..96551839c191 100644
+index 9ddcf50a3c59..f9775be5a46a 100644
 --- a/include/linux/gpio/consumer.h
 +++ b/include/linux/gpio/consumer.h
-@@ -99,6 +99,7 @@ void devm_gpiod_put_array(struct device *dev, struct gpio_descs *descs);
+@@ -110,6 +110,7 @@ void devm_gpiod_put_array(struct device *dev, struct gpio_descs *descs);
  int gpiod_get_direction(struct gpio_desc *desc);
  int gpiod_direction_input(struct gpio_desc *desc);
  int gpiod_direction_output(struct gpio_desc *desc, int value);
@@ -242,7 +242,7 @@ index 21ddbe440030..96551839c191 100644
  int gpiod_direction_output_raw(struct gpio_desc *desc, int value);
  
  /* Value get/set from non-sleeping context */
-@@ -314,6 +315,14 @@ static inline int gpiod_direction_output(struct gpio_desc *desc, int value)
+@@ -348,6 +349,14 @@ static inline int gpiod_direction_output(struct gpio_desc *desc, int value)
  	WARN_ON(1);
  	return -ENOSYS;
  }
@@ -271,7 +271,7 @@ index 6c0680641108..59f0cbabb685 100644
  	PIN_CONFIG_MAX = 0xFF,
  };
 diff --git a/include/uapi/linux/gpio.h b/include/uapi/linux/gpio.h
-index 1bf6e6df084b..384ced158412 100644
+index 4ebfe0ac6c5b..99864572b7d9 100644
 --- a/include/uapi/linux/gpio.h
 +++ b/include/uapi/linux/gpio.h
 @@ -62,6 +62,7 @@ struct gpioline_info {
@@ -283,5 +283,5 @@ index 1bf6e6df084b..384ced158412 100644
  /**
   * struct gpiohandle_request - Information about a GPIO handle request
 -- 
-2.19.1
+2.7.4
 
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0042-Add-bus-timeout-ms-and-retries-device-tree-propertie.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0042-Add-bus-timeout-ms-and-retries-device-tree-propertie.patch
index 901d63645..3588d62d9 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0042-Add-bus-timeout-ms-and-retries-device-tree-propertie.patch
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0042-Add-bus-timeout-ms-and-retries-device-tree-propertie.patch
@@ -1,4 +1,4 @@
-From ca4f6555620212ffccd943ea4c58e7ee7b1b0571 Mon Sep 17 00:00:00 2001
+From 6515a2134f90f33dbbea8ede5de598d17bb00c12 Mon Sep 17 00:00:00 2001
 From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 Date: Thu, 7 Mar 2019 15:17:40 -0800
 Subject: [PATCH] Add bus-timeout-ms and #retries device tree properties
@@ -42,7 +42,7 @@ index 8fbd8633a387..7da7e813b2b0 100644
  Example:
  
 diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt
-index 11263982470e..bdead91f82a4 100644
+index 44efafdfd7f5..e382931cf3d6 100644
 --- a/Documentation/devicetree/bindings/i2c/i2c.txt
 +++ b/Documentation/devicetree/bindings/i2c/i2c.txt
 @@ -80,6 +80,12 @@ wants to support one of the below features, it should adapt the bindings below.
@@ -71,10 +71,10 @@ index 506d867b43d9..84237c5d0aca 100644
  	bus->adap.dev.parent = &pdev->dev;
  	bus->adap.dev.of_node = pdev->dev.of_node;
 diff --git a/drivers/i2c/i2c-core-base.c b/drivers/i2c/i2c-core-base.c
-index 728b818501b1..17cf0fb037ac 100644
+index 009b0507768e..386aa2dad908 100644
 --- a/drivers/i2c/i2c-core-base.c
 +++ b/drivers/i2c/i2c-core-base.c
-@@ -1232,6 +1232,7 @@ static void i2c_adapter_hold_timer_callback(struct timer_list *t)
+@@ -1231,6 +1231,7 @@ static void i2c_adapter_hold_timer_callback(struct timer_list *t)
  
  static int i2c_register_adapter(struct i2c_adapter *adap)
  {
@@ -82,7 +82,7 @@ index 728b818501b1..17cf0fb037ac 100644
  	int res = -EINVAL;
  
  	/* Can't register until after driver model init */
-@@ -1258,8 +1259,15 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
+@@ -1257,8 +1258,15 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
  	INIT_LIST_HEAD(&adap->userspace_clients);
  
  	/* Set default timeout to 1 second if not already set */
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0049-Suppress-excessive-HID-gadget-error-logs.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0049-Suppress-excessive-HID-gadget-error-logs.patch
new file mode 100644
index 000000000..d0f98b9c1
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0049-Suppress-excessive-HID-gadget-error-logs.patch
@@ -0,0 +1,43 @@
+From 7dd0a7c62e5885bb726ef2bd5007e79a50932c38 Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Mon, 18 Mar 2019 14:06:36 -0700
+Subject: [PATCH] Suppress excessive HID gadget error logs
+
+HID events can be sent even when the host disconnects the HID
+device according to the current graphic mode. For an example, if
+KVM mouse events are sent when the host is in text mode, queueing
+of end point messages will be dropped with this message:
+
+configfs-gadget gadget: usb_ep_queue error on int endpoint -108
+
+This case is very usual case in BMC since BMC can control power
+status of the host, so this commit suppress the error printing outs
+with making HID gadget driver drop events quietly in the case.
+
+This should be a downstream only customization. Do not upstream it.
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ drivers/usb/gadget/function/f_hid.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
+index f3816a5c861e..3a94584a9dbc 100644
+--- a/drivers/usb/gadget/function/f_hid.c
++++ b/drivers/usb/gadget/function/f_hid.c
+@@ -395,8 +395,10 @@ static ssize_t f_hidg_write(struct file *file, const char __user *buffer,
+ 
+ 	status = usb_ep_queue(hidg->in_ep, req, GFP_ATOMIC);
+ 	if (status < 0) {
+-		ERROR(hidg->func.config->cdev,
+-			"usb_ep_queue error on int endpoint %zd\n", status);
++		if (status != -ESHUTDOWN)
++			ERROR(hidg->func.config->cdev,
++			      "usb_ep_queue error on int endpoint %zd\n",
++			      status);
+ 		goto release_write_pending;
+ 	} else {
+ 		status = count;
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch
new file mode 100644
index 000000000..a0168c889
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch
@@ -0,0 +1,177 @@
+From 1775e41d085b24a672dc271d08bfc83401288f0b Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Fri, 22 Mar 2019 16:34:54 -0700
+Subject: [PATCH] media: platform: Fix a kernel warning on clk control
+
+Video engine clock control functions in the Aspeed video engine driver are
+being called from multiple context without any protection so video clocks
+can be disabled twice and eventually it causes a kernel warning with stack
+dump printing out like below:
+
+[  120.034729] WARNING: CPU: 0 PID: 1334 at drivers/clk/clk.c:684 clk_core_unprepare+0x13c/0x170
+[  120.043252] eclk-gate already unprepared
+[  120.047283] CPU: 0 PID: 1334 Comm: obmc-ikvm Tainted: G        W         5.0.3-b94b74e8b52db91fe4e99e0bb481ec8bf2b5b47c #1
+[  120.058417] Hardware name: Generic DT based system
+[  120.063219] Backtrace:
+[  120.065787] [<80107cdc>] (dump_backtrace) from [<80107f10>] (show_stack+0x20/0x24)
+[  120.073371]  r7:803a4ff0 r6:00000009 r5:00000000 r4:96197e1c
+[  120.079152] [<80107ef0>] (show_stack) from [<8068f7d8>] (dump_stack+0x20/0x28)
+[  120.086479] [<8068f7b8>] (dump_stack) from [<8011604c>] (__warn.part.3+0xb4/0xdc)
+[  120.094068] [<80115f98>] (__warn.part.3) from [<801160e0>] (warn_slowpath_fmt+0x6c/0x90)
+[  120.102164]  r6:000002ac r5:8080c0b8 r4:80a07008
+[  120.106893] [<80116078>] (warn_slowpath_fmt) from [<803a4ff0>] (clk_core_unprepare+0x13c/0x170)
+[  120.115686]  r3:8080cf8c r2:8080c17c
+[  120.119276]  r7:97d68e58 r6:9df23200 r5:9668c260 r4:96459260
+[  120.125046] [<803a4eb4>] (clk_core_unprepare) from [<803a707c>] (clk_unprepare+0x34/0x3c)
+[  120.133226]  r5:9668c260 r4:96459260
+[  120.136932] [<803a7048>] (clk_unprepare) from [<804f34bc>] (aspeed_video_off+0x44/0x48)
+[  120.145031]  r5:9668c260 r4:9668cbc0
+[  120.148647] [<804f3478>] (aspeed_video_off) from [<804f3fd0>] (aspeed_video_release+0x94/0x118)
+[  120.157435]  r5:966a0cb8 r4:966a0800
+[  120.161049] [<804f3f3c>] (aspeed_video_release) from [<804d2c58>] (v4l2_release+0xd4/0xe8)
+[  120.169404]  r7:97d68e58 r6:9d087810 r5:9df23200 r4:966a0b20
+[  120.175168] [<804d2b84>] (v4l2_release) from [<80236224>] (__fput+0x98/0x1c4)
+[  120.182316]  r5:96698e78 r4:9df23200
+[  120.185994] [<8023618c>] (__fput) from [<802363b8>] (____fput+0x18/0x1c)
+[  120.192712]  r9:80a0700c r8:801011e4 r7:00000000 r6:80a64bbc r5:961dd560 r4:961dd89c
+[  120.200562] [<802363a0>] (____fput) from [<80131c08>] (task_work_run+0x7c/0xa4)
+[  120.207994] [<80131b8c>] (task_work_run) from [<80106884>] (do_work_pending+0x4a8/0x578)
+[  120.216163]  r7:801011e4 r6:80a07008 r5:96197fb0 r4:ffffe000
+[  120.221856] [<801063dc>] (do_work_pending) from [<8010106c>] (slow_work_pending+0xc/0x20)
+[  120.230116] Exception stack(0x96197fb0 to 0x96197ff8)
+[  120.235254] 7fa0:                                     00000000 76ccf094 00000000 00000000
+[  120.243438] 7fc0: 00000008 00a11978 7eab3c30 00000006 00000000 00000000 475b0fa4 00000000
+[  120.251692] 7fe0: 00000002 7eab3a40 00000000 47720e38 80000010 00000008
+[  120.258396]  r10:00000000 r9:96196000 r8:801011e4 r7:00000006 r6:7eab3c30 r5:00a11978
+[  120.266291]  r4:00000008
+
+To prevent this issue, this commit adds spinlock protection and clock
+status checking logic into the Aspeed video engine driver.
+
+Fixes: d2b4387f3bdf ("media: platform: Add Aspeed Video Engine driver")
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Cc: Eddie James <eajames@linux.ibm.com>
+Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
+Cc: Joel Stanley <joel@jms.id.au>
+Cc: Andrew Jeffery <andrew@aj.id.au>
+---
+ drivers/media/platform/aspeed-video.c | 32 +++++++++++++++++++++++++++++---
+ 1 file changed, 29 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/media/platform/aspeed-video.c b/drivers/media/platform/aspeed-video.c
+index 8144fe36ad48..e70be8fdbde5 100644
+--- a/drivers/media/platform/aspeed-video.c
++++ b/drivers/media/platform/aspeed-video.c
+@@ -187,6 +187,7 @@ enum {
+ 	VIDEO_STREAMING,
+ 	VIDEO_FRAME_INPRG,
+ 	VIDEO_STOPPED,
++	VIDEO_CLOCKS_ON,
+ };
+ 
+ struct aspeed_video_addr {
+@@ -483,19 +484,29 @@ static void aspeed_video_enable_mode_detect(struct aspeed_video *video)
+ 
+ static void aspeed_video_off(struct aspeed_video *video)
+ {
++	if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
++		return;
++
+ 	/* Disable interrupts */
+ 	aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
+ 
+ 	/* Turn off the relevant clocks */
+ 	clk_disable_unprepare(video->vclk);
+ 	clk_disable_unprepare(video->eclk);
++
++	clear_bit(VIDEO_CLOCKS_ON, &video->flags);
+ }
+ 
+ static void aspeed_video_on(struct aspeed_video *video)
+ {
++	if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
++		return;
++
+ 	/* Turn on the relevant clocks */
+ 	clk_prepare_enable(video->eclk);
+ 	clk_prepare_enable(video->vclk);
++
++	set_bit(VIDEO_CLOCKS_ON, &video->flags);
+ }
+ 
+ static void aspeed_video_bufs_done(struct aspeed_video *video,
+@@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct aspeed_video *video,
+ 
+ static void aspeed_video_irq_res_change(struct aspeed_video *video)
+ {
++	spin_lock(&video->lock);
+ 	dev_dbg(video->dev, "Resolution changed; resetting\n");
+ 
+ 	set_bit(VIDEO_RES_CHANGE, &video->flags);
+ 	clear_bit(VIDEO_FRAME_INPRG, &video->flags);
+ 
+ 	aspeed_video_off(video);
++	spin_unlock(&video->lock);
+ 	aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
+ 
+ 	schedule_delayed_work(&video->res_work, RESOLUTION_CHANGE_DELAY);
+@@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct aspeed_video *video)
+ 
+ static void aspeed_video_start(struct aspeed_video *video)
+ {
++	unsigned long flags;
++
++	spin_lock_irqsave(&video->lock, flags);
+ 	aspeed_video_on(video);
+ 
+ 	aspeed_video_init_regs(video);
++	spin_unlock_irqrestore(&video->lock, flags);
+ 
+ 	/* Resolution set to 640x480 if no signal found */
+ 	aspeed_video_get_resolution(video);
+@@ -956,6 +973,9 @@ static void aspeed_video_start(struct aspeed_video *video)
+ 
+ static void aspeed_video_stop(struct aspeed_video *video)
+ {
++	unsigned long flags;
++
++	spin_lock_irqsave(&video->lock, flags);
+ 	set_bit(VIDEO_STOPPED, &video->flags);
+ 	cancel_delayed_work_sync(&video->res_work);
+ 
+@@ -969,6 +989,7 @@ static void aspeed_video_stop(struct aspeed_video *video)
+ 
+ 	video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
+ 	video->flags = 0;
++	spin_unlock_irqrestore(&video->lock, flags);
+ }
+ 
+ static int aspeed_video_querycap(struct file *file, void *fh,
+@@ -1306,16 +1327,21 @@ static void aspeed_video_resolution_work(struct work_struct *work)
+ 	struct delayed_work *dwork = to_delayed_work(work);
+ 	struct aspeed_video *video = container_of(dwork, struct aspeed_video,
+ 						  res_work);
+-	u32 input_status = video->v4l2_input_status;
++	unsigned long flags;
++	u32 input_status;
+ 
++	spin_lock_irqsave(&video->lock, flags);
++	input_status = video->v4l2_input_status;
+ 	aspeed_video_on(video);
+ 
+ 	/* Exit early in case no clients remain */
+-	if (test_bit(VIDEO_STOPPED, &video->flags))
++	if (test_bit(VIDEO_STOPPED, &video->flags)) {
++		spin_unlock_irqrestore(&video->lock, flags);
+ 		goto done;
++	}
+ 
+ 	aspeed_video_init_regs(video);
+-
++	spin_unlock_irqrestore(&video->lock, flags);
+ 	aspeed_video_get_resolution(video);
+ 
+ 	if (video->detected_timings.width != video->active_timings.width ||
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
index 1e25709a9..2a9984661 100644
--- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed_%.bbappend
@@ -21,10 +21,8 @@ SRC_URI += " \
         file://0030-Add-dump-debug-code-into-I2C-drivers.patch \
         file://0031-Add-high-speed-baud-rate-support-for-UART.patch \
         file://0032-misc-aspeed-Add-Aspeed-UART-routing-control-driver.patch \
-        file://0034-arm-dts-adpeed-Swap-the-mac-nodes-numbering.patch \
+        file://0034-arm-dts-aspeed-Swap-the-mac-nodes-numbering.patch \
         file://0035-Implement-a-memory-driver-share-memory.patch \
-        file://0036-net-ncsi-backport-ncsi-patches.patch \
-        file://0038-media-aspeed-backport-ikvm-patches.patch \
         file://0039-Add-Aspeed-PWM-driver-which-uses-FTTMR010-timer-IP.patch \
         file://0040-i2c-Add-mux-hold-unhold-msg-types.patch \
         file://0041-Enable-passthrough-based-gpio-character-device.patch \
@@ -35,4 +33,6 @@ SRC_URI += " \
         file://0046-misc-Add-clock-control-logic-into-Aspeed-LPC-MBOX-dr.patch \
         file://0047-misc-Block-error-printing-on-probe-defer-case-in-Asp.patch \
         file://0048-ARM-dts-aspeed-Set-default-status-of-LPC-BT-as-disab.patch \
+        file://0049-Suppress-excessive-HID-gadget-error-logs.patch \
+        file://0050-media-platform-Fix-a-kernel-warning-on-clk-control.patch \
         "
diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch
index 03460302d..03460302d 100644
--- a/meta-openbmc-mods/meta-common/recipes-network/network/network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch
+++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0001-Patch-to-keep-consistent-MAC-and-IP-address-inbetwee.patch
diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/network/0002-IPv6-Network-changes-to-configuration-file.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch
index 251f68319..251f68319 100644
--- a/meta-openbmc-mods/meta-common/recipes-network/network/network/0002-IPv6-Network-changes-to-configuration-file.patch
+++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0002-IPv6-Network-changes-to-configuration-file.patch
diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/network/0003-Adding-channel-specific-privilege-to-network.patch b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch
index 4610b8b32..4610b8b32 100755
--- a/meta-openbmc-mods/meta-common/recipes-network/network/network/0003-Adding-channel-specific-privilege-to-network.patch
+++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network/0003-Adding-channel-specific-privilege-to-network.patch
diff --git a/meta-openbmc-mods/meta-common/recipes-network/network/network_%.bbappend b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend
index 275051e19..275051e19 100644
--- a/meta-openbmc-mods/meta-common/recipes-network/network/network_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-network/network/phosphor-network_%.bbappend
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
index b059a35d7..2a6b5abb0 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/configuration/entity-manager_%.bbappend
@@ -1,6 +1,6 @@
 # this is here just to bump faster than upstream
 SRC_URI = "git://github.com/openbmc/entity-manager.git"
-SRCREV = "4133426a04bf46e275416362205bc29c1b3c0935"
+SRCREV = "a218ddb84c5cb6f6d07c3febd14bb0395ce38e5f"
 
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0003-Chassis-Power-Control-are-implemented.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0003-Chassis-Power-Control-are-implemented.patch
index 79d02ca9b..0e25856ac 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0003-Chassis-Power-Control-are-implemented.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0003-Chassis-Power-Control-are-implemented.patch
@@ -1,4 +1,4 @@
-From 35271230690c5d85dc7a6502031b38d93ddd683f Mon Sep 17 00:00:00 2001
+From a20f9fa9941533b591b6bbfe6b22a74b7c0dfe64 Mon Sep 17 00:00:00 2001
 From: Ed Tanous <ed.tanous@intel.com>
 Date: Thu, 24 Jan 2019 09:29:01 -0800
 Subject: [PATCH] Chassis Power Control are implemented.
@@ -38,9 +38,9 @@ Power on/off: curl --noproxy <ip_addr> -q1c cjar -b cjar -k -H "Content-Type: ap
 Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
 Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
 ---
- .../Chassis/Control/Chassis.interface.yaml    | 94 +++++++++++++++++++
- .../Chassis/Control/Power.interface.yaml      | 85 ++++++++++++++---
- 2 files changed, 166 insertions(+), 13 deletions(-)
+ .../Chassis/Control/Chassis.interface.yaml         | 94 ++++++++++++++++++++++
+ .../Chassis/Control/Power.interface.yaml           | 92 ++++++++++++++++++---
+ 2 files changed, 173 insertions(+), 13 deletions(-)
  create mode 100644 xyz/openbmc_project/Chassis/Control/Chassis.interface.yaml
 
 diff --git a/xyz/openbmc_project/Chassis/Control/Chassis.interface.yaml b/xyz/openbmc_project/Chassis/Control/Chassis.interface.yaml
@@ -144,10 +144,10 @@ index 0000000..c28492a
 +       - xyz.openbmc_project.Chassis.Common.Error.IOError
 +
 diff --git a/xyz/openbmc_project/Chassis/Control/Power.interface.yaml b/xyz/openbmc_project/Chassis/Control/Power.interface.yaml
-index 082586f..e77598b 100644
+index 082586f..368beca 100644
 --- a/xyz/openbmc_project/Chassis/Control/Power.interface.yaml
 +++ b/xyz/openbmc_project/Chassis/Control/Power.interface.yaml
-@@ -1,31 +1,90 @@
+@@ -1,31 +1,97 @@
  description: >
 -    Power control service
 +    Chassis control service
@@ -207,12 +207,22 @@ index 082586f..e77598b 100644
 +    - name: vrd_good
 +      type: int32
 +      default: 0
++      description: >
++       ACPI status
++    - name: s4s5_state
++      type: int32
++      default: 0
++      description: >
++       ACPI status
++    - name: pgood
++      type: int32
++      default: 0
        description: >
 -       PSU Power good property
 -       It is a read-only property.
 -    - name: State
-+       ACPI status
-+    - name: s4s5_state
++       pgood property
++    - name: state
        type: int32
        default: 0
        description: >
@@ -222,16 +232,6 @@ index 082586f..e77598b 100644
 -       Setting its value to change the system state
 -       Read its value to get the system state.
 \ No newline at end of file
-+       ACPI status
-+    - name: pgood
-+      type: int32
-+      default: 0
-+      description: >
-+       pgood property
-+    - name: state
-+      type: int32
-+      default: 0
-+      description: >
 +       state property
 +    - name: pgood_timeout
 +      type: int32
@@ -245,6 +245,13 @@ index 082586f..e77598b 100644
 +        The current BIOS POST state,
 +        false means not completed or system reset,
 +        true means BIOS POST completed.
++    - name: PFail
++      type: boolean
++      default: true
++      description: >
++        The current booting status,
++        true means booting from AC loss,
++        false means not booting from AC loss.
 +signals:
 +    - name: PowerGood
 +      description: >
@@ -253,5 +260,5 @@ index 082586f..e77598b 100644
 +      description: >
 +        Signal for powerlost
 -- 
-2.17.1
+2.7.4
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0019-Creating-the-Session-interface-for-Host-and-LAN.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0019-Creating-the-Session-interface-for-Host-and-LAN.patch
index e1208cf5b..47fab819b 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0019-Creating-the-Session-interface-for-Host-and-LAN.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0019-Creating-the-Session-interface-for-Host-and-LAN.patch
@@ -1,4 +1,4 @@
-From f805522921d69eb4ea70248fe7e54557363aacea Mon Sep 17 00:00:00 2001
+From 28fac58dc6ef975e1e9283163d9f1e4c7764c3cc Mon Sep 17 00:00:00 2001
 From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
 Date: Sat, 2 Mar 2019 03:31:09 +0530
 Subject: [PATCH] Creating the Session interface- for Host and LAN
@@ -8,23 +8,56 @@ host and also in LAN
 
 Change-Id: Ic7cccfc3333a602ee07fcd60077ec58fd8f06304
 Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
+
+%% original patch: 0019-Creating-the-Session-interface-for-Host-and-LAN.patch
 ---
- xyz/openbmc_project/Session/Info.interface.yaml | 56 +++++++++++++++++++++++++
- xyz/openbmc_project/Session/README.md           | 38 +++++++++++++++++
- 2 files changed, 94 insertions(+)
- create mode 100644 xyz/openbmc_project/Session/Info.interface.yaml
- create mode 100644 xyz/openbmc_project/Session/README.md
+ xyz/openbmc_project/Ipmi/SESSION_README.md         | 25 ++++++++++
+ .../Ipmi/SessionInfo.interface.yaml                | 57 ++++++++++++++++++++++
+ 2 files changed, 82 insertions(+)
+ create mode 100644 xyz/openbmc_project/Ipmi/SESSION_README.md
+ create mode 100644 xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml
 
-diff --git a/xyz/openbmc_project/Session/Info.interface.yaml b/xyz/openbmc_project/Session/Info.interface.yaml
+diff --git a/xyz/openbmc_project/Ipmi/SESSION_README.md b/xyz/openbmc_project/Ipmi/SESSION_README.md
+new file mode 100644
+index 0000000..c59b251
+--- /dev/null
++++ b/xyz/openbmc_project/Ipmi/SESSION_README.md
+@@ -0,0 +1,25 @@
++# Session Management
++
++## Overview
++IPMI RMCP+ sessions are created and maintained by phosphor-ipmi-net daemon,
++whereas we need to provide details about the same using phosphor-ipmi-host.
++Hence IPMI RMCP+ session details has to be exposed through D-Bus interface,
++so that both phosphor-ipmi-host & phosphr-ipmi-net will be in sync.
++
++
++#### xyz.openbmc_project.Ipmi.SessionInfo interface
++##### properties
++* SessionHandle - SessionHandle,unique one-byte number to locate the session.
++* Channel   -  Session created channel.
++* SessionPrivilege - Privilege of the session.
++* RemoteIPAddr  – Remote IP address.
++* RemotePort   - Remote port address.
++* RemoteMACAddress -Remote MAC Address.
++* UserID  - Session created by given user id.
++
++
++
++#### xyz.openbmc_project.Object.Delete
++#### methods
++* Delete - To delete the session object in the system.
++
+diff --git a/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml b/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml
 new file mode 100644
-index 0000000..fbb5a45
+index 0000000..d461628
 --- /dev/null
-+++ b/xyz/openbmc_project/Session/Info.interface.yaml
-@@ -0,0 +1,56 @@
++++ b/xyz/openbmc_project/Ipmi/SessionInfo.interface.yaml
+@@ -0,0 +1,57 @@
 +description: >
-+    Provides properties for session objects.
-+    As communication to this service is done through authenticated
-+    & authorized session, there won't be any validation for the both.
++    Provides properties for IPMI RMCP+ session objects.
++    Provides RMCP+ session information as session objects
++    with Session ID (unique identifier) as path suffix.
 +
 +properties:
 +    - name: SessionHandle
@@ -71,56 +104,13 @@ index 0000000..fbb5a45
 +          - xyz.openbmc_project.Common.Error.InternalFailure
 +    - name: State
 +      type: byte
++      default: 0
 +      description: >
 +          Session state.
 +      errors:
 +          - xyz.openbmc_project.Common.Error.InternalFailure
 +
 +# vim: tabstop=8 expandtab shiftwidth=4 softtabstop=4
-diff --git a/xyz/openbmc_project/Session/README.md b/xyz/openbmc_project/Session/README.md
-new file mode 100644
-index 0000000..f220885
---- /dev/null
-+++ b/xyz/openbmc_project/Session/README.md
-@@ -0,0 +1,38 @@
-+# Session Management
-+
-+## Overview
-+Session Manager service exposes D-Bus methods for session management operations.
-+
-+### Session Manager Interface
-+Session manager interface `xyz.openbmc_project.Session.Manager` provides following
-+methods, properties and signals.
-+
-+#### xyz.openbmc_project.Session.Manager interface
-+##### methods
-+* CreateSession - To create new session object to the system.
-+
-+##### properties
-+* MaxSessionSupported - To list all the groups supported in the system.
-+* ActiveSessionCount - To hold the no of active sessions.
-+
-+Session manager service will create session objects for every session
-+in the system under object path `/xyz/openbmc_project/session/<SessionIndex>`.
-+Each session object can be handled through 'org.freedesktop.DBus.ObjectManager'.
-+session  object will expose following properties and methods.
-+
-+#### xyz.openbmc_project.Session.Info interface
-+##### properties
-+* SessionID - Session ID,random unique number to locate the session.
-+* Channel   -  Session created Channel.
-+* SessionPrivilege - Privilege of the session.
-+* RemoteIPAddr  – Remote IP address.
-+* RemotePort   - Remote Port address.
-+* RemoteMACAddress -Remote MAC Address.
-+* UserID  - Session created by given user id.
-+
-+
-+
-+#### xyz.openbmc_project.Object.Delete
-+#### methods
-+* Delete - To delete the session object in the system.
-+
 -- 
 2.7.4
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch
new file mode 100644
index 000000000..9fe383fda
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0020-Change-some-properties-name-in-SOL-Dbus.patch
@@ -0,0 +1,73 @@
+From 2e265e85777345a318084c2f1f3b684f7e7ff4a4 Mon Sep 17 00:00:00 2001
+From: Cheng C Yang <cheng.c.yang@intel.com>
+Date: Thu, 28 Mar 2019 18:06:54 +0800
+Subject: [PATCH] Change some properties name in SOL Dbus
+
+Change some properties name in SOL D-Bus interface to make the meaning
+of the properties more clearly.
+
+Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
+---
+ xyz/openbmc_project/Ipmi/SOL.interface.yaml | 25 +++++++++++++++++--------
+ 1 file changed, 17 insertions(+), 8 deletions(-)
+
+diff --git a/xyz/openbmc_project/Ipmi/SOL.interface.yaml b/xyz/openbmc_project/Ipmi/SOL.interface.yaml
+index 94db59f..96c8c87 100644
+--- a/xyz/openbmc_project/Ipmi/SOL.interface.yaml
++++ b/xyz/openbmc_project/Ipmi/SOL.interface.yaml
+@@ -2,8 +2,8 @@ description: >
+     SOL properties use for Get/Set SOL config parameter command in host-ipmid
+     sending config to SOL process in net-ipmid.
+     Since some platforms need to access Get/Set SOL config parameter command
+-    through KCS, and current sol manager is implemented in net-ipmid and
+-    cannot be accessed by host-ipmid, add a dbus interface for host-ipmid
++    through KCS, and current SOL manager is implemented in net-ipmid and
++    cannot be accessed by host-ipmid, add a D-Bus interface for host-ipmid
+     command to transfer properties to net-ipmid.
+     This interface will be implemented in phosphor-settings.
+ properties:
+@@ -17,12 +17,20 @@ properties:
+       description: >
+         SOL Enable property, this controls whether the SOL payload type
+         can be activated.
+-    - name: Authentication
++    - name: ForceEncryption
++      type: boolean
++      description: >
++        If SOL enable Force Payload Encryption.
++    - name: ForceAuthentication
++      type: boolean
++      description: >
++        If SOL enable Force Payload Authentication
++    - name: Privilege
+       type: byte
+       description: >
+-        If SOL enable Force Payload Encryption and Authenticaton.
+-        And the minimun operating privilege level SOL required.
+-    - name: Accumulate
++        Sets the minimum operating privilege level that is required to
++        be able to activate SOL by Activate Payload command.
++    - name: AccumulateIntervalMS
+       type: byte
+       description: >
+         Character Accumulate Interval in 5ms increments.
+@@ -31,13 +39,14 @@ properties:
+       type: byte
+       description: >
+         BMC will automatically send an SOL character data packet containing
+-        this number of characters.
++        this number of characters as soon as this number of characters
++        (or greater) has been accepted from the baseboard serial controller.
+     - name: RetryCount
+       type: byte
+       description: >
+         Packet will be dropped if no ACK/NACK received by time retries
+         expire.
+-    - name: RetryInterval
++    - name: RetryIntervalMS
+       type: byte
+       description: >
+         Retry Interval in 10ms increments.
+-- 
+2.16.2
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0021-Add-interface-suppot-for-provisioning-modes.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0021-Add-interface-suppot-for-provisioning-modes.patch
new file mode 100644
index 000000000..f6e200cab
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces/0021-Add-interface-suppot-for-provisioning-modes.patch
@@ -0,0 +1,52 @@
+From 94fb1ac5dd4d54ea5a6d49597e1f15c384be7fd6 Mon Sep 17 00:00:00 2001
+From: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
+Date: Mon, 8 Apr 2019 11:48:22 +0530
+Subject: [PATCH] Add interface suppot for provisioning modes
+
+Support for provisioning modes are added in
+RestrictionMode.interface.yaml
+
+Tested:
+1. Verified build, and verified specified modes are available
+and able to set / get the same using busctl command
+
+Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
+---
+ .../Security/RestrictionMode.interface.yaml        | 24 ++++++++++++++++++++++
+ 1 file changed, 24 insertions(+)
+
+diff --git a/xyz/openbmc_project/Control/Security/RestrictionMode.interface.yaml b/xyz/openbmc_project/Control/Security/RestrictionMode.interface.yaml
+index 8e4fd8d..d328dac 100644
+--- a/xyz/openbmc_project/Control/Security/RestrictionMode.interface.yaml
++++ b/xyz/openbmc_project/Control/Security/RestrictionMode.interface.yaml
+@@ -21,3 +21,27 @@ enumerations:
+         - name: Blacklist
+           description: >
+             Prevent, if in the blacklist.
++        - name: Provisioning
++          description: >
++            Indicate that system is in provisioning mode
++            and all commands are allowed in KCS inteface
++            in both pre and post BIOS boot.
++        - name: ProvisionedKCSWhiteList
++          description: >
++            Commands in the whitelist will only be executed
++            through KCS interface after BIOS POST complete.
++            All KCS commands are supported before POST complete.
++        - name: ProvisionedKCSDisabled
++          description: >
++            Commands through KCS interface are executed only
++            till BIOS POST complete notification, after
++            which no KCS commands will be executed(other
++            than BIOS SMI based ones).
++        - name: ValidationUnsecure
++          description: >
++            To indicate that BMC is in unsecure mode, and many
++            operations which are not meant for end-user will be
++            allowed in this mode. Interface which sets this
++            property has to make sure due diligence is made
++            as in this mode, many security intrinsic commands
++            can be executed.
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
index a2eb6649c..e46c06bcd 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/dbus/phosphor-dbus-interfaces_%.bbappend
@@ -1,5 +1,5 @@
 SRC_URI =  "git://github.com/openbmc/phosphor-dbus-interfaces.git"
-SRCREV = "5515c34fded4c217e3cc07f551d59d34cd3329c5"
+SRCREV = "4623908c8c0e82d5831fca562c6f5a8430d494c8"
 
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
@@ -17,4 +17,6 @@ SRC_URI += "file://0002-Modify-Dbus-for-IPv6.patch \
             file://0017-Add-shutdown-policy-interface-for-get-set-shutdown-p.patch \
             file://0018-Define-post-code-interfaces-for-post-code-manager.patch \
             file://0019-Creating-the-Session-interface-for-Host-and-LAN.patch \
+            file://0020-Change-some-properties-name-in-SOL-Dbus.patch \
+            file://0021-Add-interface-suppot-for-provisioning-modes.patch \
             "
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service
index f4ffa17a0..99494717f 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control/phosphor-pid-control.service
@@ -3,7 +3,7 @@ Description=Phosphor-Pid-Control Margin-based Fan Control Daemon
 
 [Service]
 Restart=always
-ExecStart={sbindir}/swampd
+ExecStart={bindir}/swampd
 RestartSec=5
 StartLimitInterval=0
 Type=simple
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend
index 0c56a8fe5..efaccb590 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/fans/phosphor-pid-control_%.bbappend
@@ -5,4 +5,6 @@ SYSTEMD_SERVICE_${PN} = "phosphor-pid-control.service"
 EXTRA_OECONF = "--enable-configure-dbus=yes"
 
 SRC_URI = "git://github.com/openbmc/phosphor-pid-control.git"
-SRCREV = "90e9dbcae6c1df3127dd3de41f9d1e1b5a438828"
+SRCREV = "5782ab81367e22e87d719c9fef6e85ecdc6cf95e"
+
+FILES_${PN} = "${bindir}/swampd ${bindir}/setsensor"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb
index c04069fb9..7347fe483 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/gpiodaemon/gpiodaemon.bb
@@ -10,7 +10,7 @@ LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e"
 
 SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh"
 
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 inherit cmake systemd
 SYSTEMD_SERVICE_${PN} = "gpiodaemon.service"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
index fe09e6da2..3ff46cdc9 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/interfaces/bmcweb_%.bbappend
@@ -1,5 +1,5 @@
 SRC_URI = "git://github.com/openbmc/bmcweb.git"
-SRCREV = "b01bf2991955ef267ce2be8e7a18eac984990de8"
+SRCREV = "0e7de46f9b6365bad4e79a3933112750c5bf7853"
 
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0009-IPv6-Network-changes.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0009-IPv6-Network-changes.patch
index 3d9179ce5..b54b22213 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0009-IPv6-Network-changes.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0009-IPv6-Network-changes.patch
@@ -1,6 +1,6 @@
-From cd4bc9e4291771f638f66efa205bf8fbec518546 Mon Sep 17 00:00:00 2001
+From c20bc8eb6a08d177d951012eb91b37398b15d81d Mon Sep 17 00:00:00 2001
 From: Vernon Mauery <vernon.mauery@linux.intel.com>
-Date: Mon, 4 Feb 2019 10:30:12 -0800
+Date: Tue, 27 Nov 2018 11:01:15 -0800
 Subject: [PATCH] IPv6 Network changes
 
 Allow IPv6 IPMI set/get commands
@@ -11,17 +11,62 @@ Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
 
 Change-Id: If5528d3b7294c5f8c17db5919439235d0fad0446
 ---
- transporthandler.cpp | 667 ++++++++++++++++++++++++++++++++++++++++++-
- transporthandler.hpp |  68 +++++
- types.hpp            |   9 +
- utils.hpp            |   1 +
- 4 files changed, 744 insertions(+), 1 deletion(-)
+ include/ipmid/types.hpp |   9 +
+ include/ipmid/utils.hpp |   1 +
+ transporthandler.cpp    | 654 +++++++++++++++++++++++++++++++++++++++-
+ transporthandler.hpp    |  50 +++
+ 4 files changed, 713 insertions(+), 1 deletion(-)
 
-Index: phosphor-host-ipmid.clean/transporthandler.cpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/transporthandler.cpp
-+++ phosphor-host-ipmid.clean/transporthandler.cpp
-@@ -41,6 +41,12 @@ extern std::unique_ptr<phosphor::Timer>
+diff --git a/include/ipmid/types.hpp b/include/ipmid/types.hpp
+index 57c5873..c06fd8c 100644
+--- a/include/ipmid/types.hpp
++++ b/include/ipmid/types.hpp
+@@ -224,6 +224,7 @@ constexpr auto ADDR_TYPE_FORMAT = "%hhx";
+ 
+ constexpr auto IPV4_ADDRESS_SIZE_BYTE = 4;
+ constexpr auto IPV6_ADDRESS_SIZE_BYTE = 16;
++constexpr auto IPV6_ADDRESS_STATUS_SIZE = 22;
+ 
+ constexpr auto DEFAULT_MAC_ADDRESS = "00:00:00:00:00:00";
+ constexpr auto DEFAULT_ADDRESS = "0.0.0.0";
+@@ -235,6 +236,7 @@ constexpr auto BITS_32 = 32;
+ constexpr auto MASK_32_BIT = 0xFFFFFFFF;
+ constexpr auto VLAN_ID_MASK = 0x00000FFF;
+ constexpr auto VLAN_ENABLE_MASK = 0x8000;
++constexpr auto IPV6_DUID_SIZE = 18;
+ 
+ enum class IPOrigin : uint8_t
+ {
+@@ -243,5 +245,12 @@ enum class IPOrigin : uint8_t
+     DHCP = 2,
+ };
+ 
++enum class AddressingEnables : uint8_t
++{
++    IPv4Only = 0,
++    IPv6Only = 1,
++    IPv4AndIPv6 = 2,
++};
++
+ } // namespace network
+ } // namespace ipmi
+diff --git a/include/ipmid/utils.hpp b/include/ipmid/utils.hpp
+index 9ef1488..8b91b12 100644
+--- a/include/ipmid/utils.hpp
++++ b/include/ipmid/utils.hpp
+@@ -256,6 +256,7 @@ namespace network
+ constexpr auto ROOT = "/xyz/openbmc_project/network";
+ constexpr auto SERVICE = "xyz.openbmc_project.Network";
+ constexpr auto IP_TYPE = "ipv4";
++constexpr auto IPV6_TYPE = "ipv6";
+ constexpr auto IPV4_PREFIX = "169.254";
+ constexpr auto IPV6_PREFIX = "fe80";
+ constexpr auto IP_INTERFACE = "xyz.openbmc_project.Network.IP";
+diff --git a/transporthandler.cpp b/transporthandler.cpp
+index 8172cc4..12d224a 100644
+--- a/transporthandler.cpp
++++ b/transporthandler.cpp
+@@ -30,6 +30,12 @@ std::unique_ptr<phosphor::Timer> networkTimer = nullptr;
  
  const int SIZE_MAC = 18; // xx:xx:xx:xx:xx:xx
  constexpr auto ipv4Protocol = "xyz.openbmc_project.Network.IP.Protocol.IPv4";
@@ -34,7 +79,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
  
  std::map<int, std::unique_ptr<struct ChannelConfig_t>> channelConfig;
  
-@@ -400,7 +406,6 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -389,7 +395,6 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
                                    ipmi_context_t context)
  {
      ipmi_ret_t rc = IPMI_CC_OK;
@@ -42,7 +87,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
  
      using namespace std::chrono_literals;
  
-@@ -414,6 +419,9 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -403,6 +408,9 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
      auto reqptr = reinterpret_cast<const set_lan_t*>(request);
      sdbusplus::bus::bus bus(ipmid_get_sd_bus_connection());
  
@@ -51,8 +96,8 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +
      // channel number is the lower nibble
      int channel = reqptr->channel & CHANNEL_MASK;
-     auto ethdevice = ipmi::network::ChanneltoEthernet(channel);
-@@ -437,6 +445,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+     auto ethdevice = ipmi::getChannelName(channel);
+@@ -426,6 +434,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::IPSRC:
          {
@@ -64,7 +109,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              uint8_t ipsrc{};
              std::memcpy(&ipsrc, reqptr->data, ipmi::network::IPSRC_SIZE_BYTE);
              channelConf->ipsrc = static_cast<ipmi::network::IPOrigin>(ipsrc);
-@@ -445,6 +458,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -434,6 +447,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::MAC:
          {
@@ -76,7 +121,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              char mac[SIZE_MAC];
  
              std::snprintf(mac, SIZE_MAC, ipmi::network::MAC_ADDRESS_FORMAT,
-@@ -465,6 +483,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -454,6 +472,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::SUBNET:
          {
@@ -88,7 +133,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              std::snprintf(netmask, INET_ADDRSTRLEN,
                            ipmi::network::IP_ADDRESS_FORMAT, reqptr->data[0],
                            reqptr->data[1], reqptr->data[2], reqptr->data[3]);
-@@ -474,6 +497,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -463,6 +486,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::GATEWAY:
          {
@@ -100,7 +145,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              std::snprintf(gateway, INET_ADDRSTRLEN,
                            ipmi::network::IP_ADDRESS_FORMAT, reqptr->data[0],
                            reqptr->data[1], reqptr->data[2], reqptr->data[3]);
-@@ -483,6 +511,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -472,6 +500,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::VLAN:
          {
@@ -112,7 +157,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              uint16_t vlan{};
              std::memcpy(&vlan, reqptr->data, ipmi::network::VLAN_SIZE_BYTE);
              // We are not storing the enable bit
-@@ -495,6 +528,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -484,6 +517,11 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
  
          case LanParam::INPROGRESS:
          {
@@ -124,7 +169,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              if (reqptr->data[0] == SET_COMPLETE)
              {
                  channelConf->lan_set_in_progress = SET_COMPLETE;
-@@ -523,6 +561,122 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
+@@ -512,6 +550,122 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
          }
          break;
  
@@ -247,7 +292,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
          default:
          {
              rc = IPMI_CC_PARM_NOT_SUPPORTED;
-@@ -549,6 +703,7 @@ ipmi_ret_t ipmi_transport_get_lan(ipmi_n
+@@ -538,6 +692,7 @@ ipmi_ret_t ipmi_transport_get_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
      ipmi_ret_t rc = IPMI_CC_OK;
      *data_len = 0;
      const uint8_t current_revision = 0x11; // Current rev per IPMI Spec 2.0
@@ -255,7 +300,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
  
      get_lan_t* reqptr = (get_lan_t*)request;
      // channel number is the lower nibble
-@@ -687,6 +842,489 @@ ipmi_ret_t ipmi_transport_get_lan(ipmi_n
+@@ -676,6 +831,476 @@ ipmi_ret_t ipmi_transport_get_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
                          static_cast<uint8_t>(cipherList.size());
              break;
          }
@@ -327,12 +372,10 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                    networkInterfacePath = networkInterfaceObject.first;
 +                }
 +
-+                std::string ipEnables =
-+                    sdbusplus::message::variant_ns::get<std::string>(
-+                        ipmi::getDbusProperty(bus, ipmi::network::SERVICE,
-+                                              networkInterfacePath,
-+                                              ipmi::network::ETHERNET_INTERFACE,
-+                                              "IPAddressEnables"));
++                ipmi::Value ipEnablesProp = ipmi::getDbusProperty(
++                    bus, ipmi::network::SERVICE, networkInterfacePath,
++                    ipmi::network::ETHERNET_INTERFACE, "IPAddressEnables");
++                std::string ipEnables = std::get<std::string>(ipEnablesProp);
 +
 +                // check if on off ipv4 ipv6, etc.
 +                bool found = false;
@@ -392,20 +435,14 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                        bus, ipObjectInfo.second, ipObjectInfo.first,
 +                        ipmi::network::IP_INTERFACE);
 +
-+                    std::string origin =
-+                        sdbusplus::message::variant_ns::get<std::string>(
-+                            properties["Origin"]);
-+                    if (sdbusplus::message::variant_ns::get<std::string>(
-+                            properties["Origin"]) ==
++                    if (std::get<std::string>(properties["Origin"]) ==
 +                        "xyz.openbmc_project.Network.IP.AddressOrigin.Static")
 +                    {
 +                        ipaddress =
-+                            sdbusplus::message::variant_ns::get<std::string>(
-+                                properties["Address"]);
++                            std::get<std::string>(properties["Address"]);
 +                        ipv6AddressSource = 0x81; // Looking at bit 0 and bit 7
 +                        prefixLength =
-+                            sdbusplus::message::variant_ns::get<uint8_t>(
-+                                properties["PrefixLength"]);
++                            std::get<uint8_t>(properties["PrefixLength"]);
 +                        status = 0;
 +                    }
 +                }
@@ -458,8 +495,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                    bus, macObjectInfo.second, macObjectInfo.first,
 +                    ipmi::network::MAC_INTERFACE, "MACAddress");
 +
-+                macAddress =
-+                    sdbusplus::message::variant_ns::get<std::string>(variant);
++                macAddress = std::get<std::string>(variant);
 +            }
 +            else if (channelConf->lan_set_in_progress == SET_IN_PROGRESS)
 +            {
@@ -505,17 +541,14 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                        bus, ipObjectInfo.second, ipObjectInfo.first,
 +                        ipmi::network::IP_INTERFACE);
 +
-+                    if (sdbusplus::message::variant_ns::get<std::string>(
-+                            properties["Origin"]) ==
++                    if (std::get<std::string>(properties["Origin"]) ==
 +                        "xyz.openbmc_project.Network.IP.AddressOrigin.DHCP")
 +                    {
 +                        ipaddress =
-+                            sdbusplus::message::variant_ns::get<std::string>(
-+                                properties["Address"]);
++                            std::get<std::string>(properties["Address"]);
 +                        ipv6AddressSource = 0x81; // Looking at bit 0 and bit 7
 +                        prefixLength =
-+                            sdbusplus::message::variant_ns::get<uint8_t>(
-+                                properties["PrefixLength"]);
++                            std::get<uint8_t>(properties["PrefixLength"]);
 +                        status = 0;
 +                    }
 +                    else
@@ -574,8 +607,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                    bus, macObjectInfo.second, macObjectInfo.first,
 +                    ipmi::network::MAC_INTERFACE, "MACAddress");
 +
-+                macAddress =
-+                    sdbusplus::message::variant_ns::get<std::string>(variant);
++                macAddress = std::get<std::string>(variant);
 +            }
 +            else if (channelConf->lan_set_in_progress == SET_IN_PROGRESS)
 +            {
@@ -661,7 +693,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
 +                auto variant = ipmi::getDbusProperty(
 +                    bus, ipmi::network::SERVICE, networkInterfacePath,
 +                    ipmi::network::ETHERNET_INTERFACE, "IPv6AcceptRA");
-+                dynamicRA = sdbusplus::message::variant_ns::get<bool>(variant);
++                dynamicRA = std::get<bool>(variant);
 +            }
 +            else
 +            {
@@ -745,7 +777,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
          default:
              log<level::ERR>("Unsupported parameter",
                              entry("PARAMETER=0x%x", reqptr->parameter));
-@@ -932,6 +1570,16 @@ void applyChanges(int channel)
+@@ -921,6 +1546,16 @@ void applyChanges(int channel)
                                          ipaddress, prefix);
              }
  
@@ -762,7 +794,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
              if (!gateway.empty())
              {
                  ipmi::setDbusProperty(bus, systemObject.second,
-@@ -939,7 +1587,24 @@ void applyChanges(int channel)
+@@ -928,7 +1563,24 @@ void applyChanges(int channel)
                                        ipmi::network::SYSTEMCONFIG_INTERFACE,
                                        "DefaultGateway", std::string(gateway));
              }
@@ -787,11 +819,11 @@ Index: phosphor-host-ipmid.clean/transporthandler.cpp
      }
      catch (InternalFailure& e)
      {
-Index: phosphor-host-ipmid.clean/transporthandler.hpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/transporthandler.hpp
-+++ phosphor-host-ipmid.clean/transporthandler.hpp
-@@ -80,6 +80,28 @@ enum class LanParam : uint8_t
+diff --git a/transporthandler.hpp b/transporthandler.hpp
+index 04d4673..bd23391 100644
+--- a/transporthandler.hpp
++++ b/transporthandler.hpp
+@@ -79,6 +79,28 @@ enum class LanParam : uint8_t
      IPV6_NEIGHBOR_TIMING_CONFIGURATION = 80,
  };
  
@@ -820,7 +852,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.hpp
  constexpr uint8_t SET_COMPLETE = 0;
  constexpr uint8_t SET_IN_PROGRESS = 1;
  constexpr uint8_t SET_COMMIT_WRITE = 2;         // Optional
-@@ -102,6 +124,20 @@ struct ChannelConfig_t
+@@ -101,6 +123,20 @@ struct ChannelConfig_t
      uint8_t lan_set_in_progress = SET_COMPLETE;
      bool flush = false;
  
@@ -841,7 +873,7 @@ Index: phosphor-host-ipmid.clean/transporthandler.hpp
      void clear()
      {
          ipaddr.clear();
-@@ -112,6 +148,20 @@ struct ChannelConfig_t
+@@ -111,6 +147,20 @@ struct ChannelConfig_t
          ipsrc = ipmi::network::IPOrigin::UNSPECIFIED;
          lan_set_in_progress = SET_COMPLETE;
          flush = false;
@@ -862,48 +894,6 @@ Index: phosphor-host-ipmid.clean/transporthandler.hpp
      }
  };
  
-Index: phosphor-host-ipmid.clean/types.hpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/types.hpp
-+++ phosphor-host-ipmid.clean/types.hpp
-@@ -209,6 +209,7 @@ constexpr auto ADDR_TYPE_FORMAT = "%hhx"
- 
- constexpr auto IPV4_ADDRESS_SIZE_BYTE = 4;
- constexpr auto IPV6_ADDRESS_SIZE_BYTE = 16;
-+constexpr auto IPV6_ADDRESS_STATUS_SIZE = 22;
- 
- constexpr auto DEFAULT_MAC_ADDRESS = "00:00:00:00:00:00";
- constexpr auto DEFAULT_ADDRESS = "0.0.0.0";
-@@ -220,6 +221,7 @@ constexpr auto BITS_32 = 32;
- constexpr auto MASK_32_BIT = 0xFFFFFFFF;
- constexpr auto VLAN_ID_MASK = 0x00000FFF;
- constexpr auto VLAN_ENABLE_MASK = 0x8000;
-+constexpr auto IPV6_DUID_SIZE = 18;
- 
- enum class IPOrigin : uint8_t
- {
-@@ -228,5 +230,12 @@ enum class IPOrigin : uint8_t
-     DHCP = 2,
- };
- 
-+enum class AddressingEnables : uint8_t
-+{
-+    IPv4Only = 0,
-+    IPv6Only = 1,
-+    IPv4AndIPv6 = 2,
-+};
-+
- } // namespace network
- } // namespace ipmi
-Index: phosphor-host-ipmid.clean/utils.hpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/utils.hpp
-+++ phosphor-host-ipmid.clean/utils.hpp
-@@ -246,6 +246,7 @@ namespace network
- constexpr auto ROOT = "/xyz/openbmc_project/network";
- constexpr auto SERVICE = "xyz.openbmc_project.Network";
- constexpr auto IP_TYPE = "ipv4";
-+constexpr auto IPV6_TYPE = "ipv6";
- constexpr auto IPV4_PREFIX = "169.254";
- constexpr auto IPV6_PREFIX = "fe80";
- constexpr auto IP_INTERFACE = "xyz.openbmc_project.Network.IP";
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0016-add-better-sdbusplus-exception-handling.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0016-add-better-sdbusplus-exception-handling.patch
deleted file mode 100644
index 873eb6b16..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0016-add-better-sdbusplus-exception-handling.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From a445f287d4aebca68dc0321e292933311caf59ba Mon Sep 17 00:00:00 2001
-From: Yong Li <yong.b.li@linux.intel.com>
-Date: Sun, 16 Sep 2018 20:14:55 +0800
-Subject: [PATCH] add better sdbusplus exception handling
-
-Now that sdbusplus throws, we need to catch more stuff. To compound the
-problem, even though sdbusplus::exception::exception inherits from
-std::exception, there is a problem that prevents the code from simply
-catching std::exception.
-
-Change-Id: I2a330e542f5d87722a4c04e6d47de2cfb2f7d7c9
-Signed-off-by: Vernon Mauery <vernon.mauery@intel.com>
-Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
-
----
- apphandler.cpp | 14 +++++++--
- ipmid.cpp      | 77 +++++++++++++++++++++++++++++++++++---------------
- 2 files changed, 66 insertions(+), 25 deletions(-)
-
-diff --git a/apphandler.cpp b/apphandler.cpp
-index 126de33..3cae6d5 100644
---- a/apphandler.cpp
-+++ b/apphandler.cpp
-@@ -312,9 +312,19 @@ ipmi_ret_t ipmi_app_get_device_id(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
-             auto version = getActiveSoftwareVersionInfo();
-             r = convert_version(version.c_str(), &rev);
-         }
--        catch (const std::exception& e)
-+        catch (sdbusplus::exception::exception& e)
-         {
--            log<level::ERR>(e.what());
-+            log<level::ERR>("sdbusplus::exception",
-+                            entry("ERROR=%s", e.what()));
-+        }
-+        catch (std::exception& e)
-+        {
-+            log<level::ERR>("unexpected exception",
-+                            entry("ERROR=%s", e.what()));
-+        }
-+        catch (...)
-+        {
-+            log<level::ERR>("unknown exception");
-         }
- 
-         if (r >= 0)
-diff --git a/ipmid.cpp b/ipmid.cpp
-index 2d48bfe..8d2fb37 100644
---- a/ipmid.cpp
-+++ b/ipmid.cpp
-@@ -273,6 +273,10 @@ ipmi_ret_t ipmi_netfn_router(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
-     }
-     // IPMI command handlers can throw unhandled exceptions, catch those
-     // and return sane error code.
-+    catch (sdbusplus::exception::exception& e)
-+    {
-+        log<level::ERR>("sdbusplus exception", entry("EXCEPTION=%s", e.what()));
-+    }
-     catch (const std::exception& e)
-     {
-         log<level::ERR>(e.what(), entry("NET_FUN=0x%X", netfn),
-@@ -281,6 +285,23 @@ ipmi_ret_t ipmi_netfn_router(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
-         *data_len = 0;
-         // fall through
-     }
-+    catch (...)
-+    {
-+        std::exception_ptr eptr = std::current_exception();
-+        try
-+        {
-+            std::rethrow_exception(eptr);
-+        }
-+        catch (std::exception& e)
-+        {
-+            log<level::ERR>("unexpected uncaught exception",
-+                            entry("EXCEPTION=%s", e.what()),
-+                            entry("NET_FUN=0x%X", netfn),
-+                            entry("CMD=0x%X", cmd));
-+            rc = IPMI_CC_UNSPECIFIED_ERROR;
-+            *data_len = 0;
-+        }
-+    }
-     // Now copy the return code that we got from handler and pack it in first
-     // byte.
-     std::memcpy(response, &rc, IPMI_CC_LEN);
-@@ -361,32 +382,42 @@ final:
- void cache_restricted_mode()
- {
-     restricted_mode = false;
--    using namespace sdbusplus::xyz::openbmc_project::Control::Security::server;
--    using namespace internal;
--    using namespace internal::cache;
--    sdbusplus::bus::bus dbus(ipmid_get_sd_bus_connection());
--    const auto& restrictionModeSetting =
--        objects->map.at(restrictionModeIntf).front();
--    auto method = dbus.new_method_call(
--        objects->service(restrictionModeSetting, restrictionModeIntf).c_str(),
--        restrictionModeSetting.c_str(), "org.freedesktop.DBus.Properties",
--        "Get");
--    method.append(restrictionModeIntf, "RestrictionMode");
--    auto resp = dbus.call(method);
--    if (resp.is_method_error())
-+    try
-     {
--        log<level::ERR>("Error in RestrictionMode Get");
--        // Fail-safe to true.
--        restricted_mode = true;
--        return;
-+        using namespace sdbusplus::xyz::openbmc_project::Control::Security::
-+            server;
-+        using namespace internal;
-+        using namespace internal::cache;
-+        sdbusplus::bus::bus dbus(ipmid_get_sd_bus_connection());
-+        const auto& restrictionModeSetting =
-+            objects->map.at(restrictionModeIntf).front();
-+        auto method = dbus.new_method_call(
-+            objects->service(restrictionModeSetting, restrictionModeIntf)
-+                .c_str(),
-+            restrictionModeSetting.c_str(), "org.freedesktop.DBus.Properties",
-+            "Get");
-+        method.append(restrictionModeIntf, "RestrictionMode");
-+        auto resp = dbus.call(method);
-+        if (resp.is_method_error())
-+        {
-+            log<level::ERR>("Error in RestrictionMode Get");
-+            // Fail-safe to true.
-+            restricted_mode = true;
-+            return;
-+        }
-+        sdbusplus::message::variant<std::string> result;
-+        resp.read(result);
-+        auto restrictionMode = RestrictionMode::convertModesFromString(
-+            sdbusplus::message::variant_ns::get<std::string>(result));
-+        if (RestrictionMode::Modes::Whitelist == restrictionMode)
-+        {
-+            restricted_mode = true;
-+        }
-     }
--    sdbusplus::message::variant<std::string> result;
--    resp.read(result);
--    auto restrictionMode = RestrictionMode::convertModesFromString(
--        variant_ns::get<std::string>(result));
--    if (RestrictionMode::Modes::Whitelist == restrictionMode)
-+    catch (sdbusplus::exception::exception& e)
-     {
--        restricted_mode = true;
-+        // restrictionModeIntf does not exist; default to not enforcing
-+        log<level::ERR>("sdbusplus exception", entry("EXCEPTION=%s", e.what()));
-     }
- }
- 
--- 
-2.17.1
-
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0018-Catch-sdbusplus-exceptions-in-IPMI-net.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0018-Catch-sdbusplus-exceptions-in-IPMI-net.patch
deleted file mode 100644
index 6fa69b602..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0018-Catch-sdbusplus-exceptions-in-IPMI-net.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 4490ee7a9fd054640af7a9da3400f76195dc2880 Mon Sep 17 00:00:00 2001
-From: Yong Li <yong.b.li@linux.intel.com>
-Date: Sun, 16 Sep 2018 21:03:58 +0800
-Subject: [PATCH] Catch sdbusplus exceptions in IPMI net
-
-Missing the correct exception was causing issues with setting the IPV4
-address
-
-Change-Id: Ieaaacfcbaec82a0c3b110889817a7ceb9cda8d3c
-Signed-off-by: Dave Cobbley <david.j.cobbley@linux.intel.com>
-Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
----
- transporthandler.cpp | 2 +-
- utils.cpp            | 5 +++--
- 2 files changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/transporthandler.cpp b/transporthandler.cpp
-index 6f4ec3f..6cb3feb 100644
---- a/transporthandler.cpp
-+++ b/transporthandler.cpp
-@@ -1559,7 +1559,7 @@ void applyChanges(int channel)
-             ipmi::network::ETHERNET_INTERFACE, "IPv6AcceptRA",
-             (bool)channelConf->ipv6RouterAddressConfigControl);
-     }
--    catch (InternalFailure& e)
-+    catch (sdbusplus::exception::exception& e)
-     {
-         log<level::ERR>(
-             "Failed to set network data", entry("PREFIX=%d", prefix),
-diff --git a/utils.cpp b/utils.cpp
-index 225b1cc..d10b5de 100644
---- a/utils.cpp
-+++ b/utils.cpp
-@@ -358,9 +358,10 @@ void deleteAllDbusObjects(sdbusplus::bus::bus& bus,
-                                            "Delete");
-         }
-     }
--    catch (InternalFailure& e)
-+    catch (sdbusplus::exception::exception& e)
-     {
--        log<level::INFO>("Unable to delete the objects having",
-+        log<level::INFO>("sdbusplus exception - Unable to delete the objects",
-+                         entry("ERROR=%s", e.what()),
-                          entry("INTERFACE=%s", interface.c_str()),
-                          entry("SERVICE=%s", serviceRoot.c_str()));
-     }
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch
index 4018dbffe..542c4f667 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0048-Implement-IPMI-Master-Write-Read-command.patch
@@ -1,4 +1,4 @@
-From cd25f43461b41b74d19cd1f93ce301df9c3bd4f2 Mon Sep 17 00:00:00 2001
+From a8d7429b7bd9dea33d59c6e83f17372e77fe6145 Mon Sep 17 00:00:00 2001
 From: Yong Li <yong.b.li@linux.intel.com>
 Date: Fri, 21 Sep 2018 09:21:14 +0800
 Subject: [PATCH] Implement IPMI Master Write-Read command
@@ -11,31 +11,36 @@ that provide an SMBus slave interface.
 
 Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
 ---
- apphandler.cpp            | 236 ++++++++++++++++++++++++++++++++++++++++++++++
+ apphandler.cpp            | 276 +++++++++++++++++++++++++++++++++++++-
  apphandler.hpp            |   1 +
  host-ipmid-whitelist.conf |   1 +
- 3 files changed, 238 insertions(+)
+ 3 files changed, 274 insertions(+), 4 deletions(-)
 
 diff --git a/apphandler.cpp b/apphandler.cpp
-index 17aff2a..2fe79f6 100644
+index 15965ca..d8fb23d 100644
 --- a/apphandler.cpp
 +++ b/apphandler.cpp
-@@ -8,6 +8,14 @@
- #include "types.hpp"
- #include "utils.hpp"
- 
+@@ -1,6 +1,19 @@
++#include "apphandler.hpp"
++
++#include "app/watchdog.hpp"
++#include "sys_info_param.hpp"
++#include "transporthandler.hpp"
++
+ #include <arpa/inet.h>
 +#include <fcntl.h>
++#include <ipmid/api.h>
+ #include <limits.h>
 +#include <linux/i2c-dev.h>
 +#include <linux/i2c.h>
+ #include <mapper.h>
 +#include <sys/ioctl.h>
 +#include <sys/stat.h>
 +#include <sys/types.h>
-+#include <unistd.h>
-+
- #include <arpa/inet.h>
- #include <host-ipmid/ipmid-api.h>
- #include <limits.h>
-@@ -55,6 +63,8 @@ constexpr auto bmc_guid_interface = "xyz.openbmc_project.Common.UUID";
+ #include <systemd/sd-bus.h>
+ #include <unistd.h>
+ 
+@@ -41,6 +54,8 @@ constexpr auto bmc_guid_interface = "xyz.openbmc_project.Common.UUID";
  constexpr auto bmc_guid_property = "UUID";
  constexpr auto bmc_guid_len = 16;
  
@@ -44,10 +49,23 @@ index 17aff2a..2fe79f6 100644
  static constexpr auto redundancyIntf =
      "xyz.openbmc_project.Software.RedundancyPriority";
  static constexpr auto versionIntf = "xyz.openbmc_project.Software.Version";
-@@ -86,6 +96,34 @@ typedef struct
-     uint8_t aux[4];
- } __attribute__((packed)) ipmi_device_id_t;
+@@ -59,6 +74,47 @@ using BMC = sdbusplus::xyz::openbmc_project::State::server::BMC;
+ namespace fs = std::filesystem;
+ namespace variant_ns = sdbusplus::message::variant_ns;
  
++// Offset in get device id command.
++typedef struct
++{
++    uint8_t id;
++    uint8_t revision;
++    uint8_t fw[2];
++    uint8_t ipmi_ver;
++    uint8_t addn_dev_support;
++    uint8_t manuf_id[3];
++    uint8_t prod_id[2];
++    uint8_t aux[4];
++} __attribute__((packed)) ipmi_device_id_t;
++
 +typedef struct
 +{
 +    uint8_t busId;
@@ -79,7 +97,7 @@ index 17aff2a..2fe79f6 100644
  /**
   * @brief Returns the Version info from primary s/w object
   *
-@@ -1089,8 +1127,195 @@ writeResponse:
+@@ -1022,6 +1078,192 @@ writeResponse:
      return IPMI_CC_OK;
  }
  
@@ -199,7 +217,8 @@ index 17aff2a..2fe79f6 100644
 +    reqptr += sizeof(ipmiI2cRwReq);
 +    std::copy(reqptr, reqptr + writeCount, outBuf.begin());
 +
-+    log<level::DEBUG>("checking list ", entry("SIZE=%d", getWhiteList().size()));
++    log<level::DEBUG>("checking list ",
++                      entry("SIZE=%d", getWhiteList().size()));
 +    // command whitelist checking
 +    for (unsigned int i = 0; i < getWhiteList().size(); i++)
 +    {
@@ -270,16 +289,26 @@ index 17aff2a..2fe79f6 100644
 +
  void register_netfn_app_functions()
  {
-+    int ret = -1;
-+
-     // <Get BT Interface Capabilities>
-     ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_CAP_BIT, NULL,
-                            ipmi_app_get_bt_capabilities, PRIVILEGE_USER);
-@@ -1145,6 +1370,17 @@ void register_netfn_app_functions()
-                            ipmi_app_channel_info, PRIVILEGE_USER);
- #endif
+     // <Get Device ID>
+@@ -1063,6 +1306,31 @@ void register_netfn_app_functions()
+     ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_ACPI, NULL,
+                            ipmi_app_get_acpi_power_state, PRIVILEGE_ADMIN);
  
-+    ret = loadI2CWhiteList();
++// TODO: Below code and associated api's need to be removed later.
++// Its commented for now to avoid merge conflicts with upstream
++// changes and smooth upstream upgrades.
++#if 0
++>>>>>>> IPMI Channel commands implementation
++    // <Get Channel Access>
++    ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_CHANNEL_ACCESS, NULL,
++                           ipmi_get_channel_access, PRIVILEGE_USER);
++
++    // <Get Channel Info Command>
++    ipmi_register_callback(NETFUN_APP, IPMI_CMD_GET_CHAN_INFO, NULL,
++                           ipmi_app_channel_info, PRIVILEGE_USER);
++#endif
++
++    int ret = loadI2CWhiteList();
 +    log<level::DEBUG>("i2c white list is loaded", entry("RET=%d", ret),
 +                      entry("SIZE=%d", getWhiteList().size()));
 +    if (ret == 0)
@@ -306,17 +335,17 @@ index d4dd8e8..f9e5c59 100644
      IPMI_CMD_SET_SYSTEM_INFO = 0x58,
      IPMI_CMD_GET_SYSTEM_INFO = 0x59,
 diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf
-index c7eb2d8..22a2a3c 100644
+index 49ff7b0..1ae79fd 100644
 --- a/host-ipmid-whitelist.conf
 +++ b/host-ipmid-whitelist.conf
-@@ -25,6 +25,7 @@
- 0x06:0x36    //<App>:<Get BT Interface Capabilities>
+@@ -27,6 +27,7 @@
  0x06:0x37    //<App>:<Get System GUID>
  0x06:0x42    //<App>:<Get Channel Info Command>
+ 0x06:0x4E    //<App>:<Get Channel Payload Support>
 +0x06:0x52    //<App>:<Master Write Read Command>
  0x06:0x54    //<App>:<Get Channel Cipher Suites>
  0x0A:0x10    //<Storage>:<Get FRU Inventory Area Info>
  0x0A:0x11    //<Storage>:<Read FRU Data>
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0051-Fix-Set-LAN-Config-to-work-without-SetInProgress.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0051-Fix-Set-LAN-Config-to-work-without-SetInProgress.patch
deleted file mode 100644
index 3990c6b5c..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0051-Fix-Set-LAN-Config-to-work-without-SetInProgress.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From cae9e21f88e6f12c80c89402473a17a10258c843 Mon Sep 17 00:00:00 2001
-From: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
-Date: Thu, 17 Jan 2019 21:22:30 +0530
-Subject: [PATCH] Fix: Set LAN Config to work without SetInProgress
-
-Set LAN Configuration parameters in up-stream code works
-with SetInProgress (parameter selector 0), to be marked
-as SET_IN_PROGRESS before fields update, and SET_COMPLETE to
-make the changes effective. This is not mandatory as per
-IPMI Spec, and we must support individual fields update.
-Fix:
-1. After SET_COMPLETE for parameter selector, changes has
-to be applied immediately, and doesn't require to rely on
-network timer, as purpose of this logic itself is to stage
-and commit.
-2. Allow individual parameter changes to take effect based
-on timer. For the time being reduced the timer to 5 sec
-to have quicker turn-around and group things together.
-
-TODO:
-Still need to introduce lock between ChannelConfig variable
-between Timer & Get / Set LAN Configuration command to avoid
-race condition
-
-Unit-Test:
-1. Verified the BIOS Setup page, able to set the IPV4 to static
-IP, afte disabling IPV6, and configuring IPV4 to static, after
-save and reset, the changes of IPV4 static is preserved.
-
-Change-Id: I7c2edad2861b5dba5ad1ca97cc5e39ac02871746
-Signed-off-by: Richard Marian Thomaiyar <richard.marian.thomaiyar@linux.intel.com>
----
- transporthandler.cpp | 54 ++++++++++++++++++++++++++++++++++++----------------
- transporthandler.hpp |  2 ++
- 2 files changed, 40 insertions(+), 16 deletions(-)
-
-Index: phosphor-host-ipmid.clean/transporthandler.cpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/transporthandler.cpp
-+++ phosphor-host-ipmid.clean/transporthandler.cpp
-@@ -399,6 +399,41 @@ struct set_lan_t
-     uint8_t data[8]; // Per IPMI spec, not expecting more than this size
- } __attribute__((packed));
- 
-+ipmi_ret_t checkAndUpdateNetwork(int channel)
-+{
-+    auto channelConf = getChannelConfig(channel);
-+    using namespace std::chrono_literals;
-+    // time to wait before applying the network changes.
-+    constexpr auto networkTimeout = 5000000us; // 5 sec
-+
-+    if (channelConf->lan_set_in_progress == SET_COMPLETE &&
-+        ((channelConf->flush == false) ||
-+         (channelConf->updateInProgress == true)))
-+    {
-+        channelConf->flush = true;
-+        // used to indicate that network timer update is in progress.
-+        channelConf->updateInProgress = true;
-+        if (!networkTimer)
-+        {
-+            log<level::ERR>("Network timer is not instantiated");
-+            return IPMI_CC_UNSPECIFIED_ERROR;
-+        }
-+        // start/restart the timer
-+        // TODO: Need to implement locking mechansim between networkTimer &
-+        // get/set to avoid race condition.
-+        networkTimer->start(networkTimeout);
-+    }
-+    else if (channelConf->lan_set_in_progress == SET_COMPLETE &&
-+             channelConf->flush == true &&
-+             channelConf->updateInProgress == false)
-+    {
-+        // Apply the network changes immediately, if proper SET_IN_PROGRESS,
-+        // followed by SET_COMPLETE is issued.
-+        applyChanges(channel);
-+    }
-+    return IPMI_CC_OK;
-+}
-+
- ipmi_ret_t ipmi_transport_set_lan(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
-                                   ipmi_request_t request,
-                                   ipmi_response_t response,
-@@ -406,12 +441,6 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
-                                   ipmi_context_t context)
- {
-     ipmi_ret_t rc = IPMI_CC_OK;
--
--    using namespace std::chrono_literals;
--
--    // time to wait before applying the network changes.
--    constexpr auto networkTimeout = 10000000us; // 10 sec
--
-     char ipaddr[INET_ADDRSTRLEN];
-     char netmask[INET_ADDRSTRLEN];
-     char gateway[INET_ADDRSTRLEN];
-@@ -543,15 +572,6 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
-                     entry("ADDRESS=%s", channelConf->ipaddr.c_str()),
-                     entry("GATEWAY=%s", channelConf->gateway.c_str()),
-                     entry("VLAN=%d", channelConf->vlanID));
--
--                if (!networkTimer)
--                {
--                    log<level::ERR>("Network timer is not instantiated");
--                    return IPMI_CC_UNSPECIFIED_ERROR;
--                }
--
--                // start/restart the timer
--                networkTimer->start(networkTimeout);
-             }
-             else if (reqptr->data[0] == SET_IN_PROGRESS) // Set In Progress
-             {
-@@ -680,8 +700,10 @@ ipmi_ret_t ipmi_transport_set_lan(ipmi_n
-         default:
-         {
-             rc = IPMI_CC_PARM_NOT_SUPPORTED;
-+            return rc;
-         }
-     }
-+    rc = checkAndUpdateNetwork(channel);
- 
-     return rc;
- }
-Index: phosphor-host-ipmid.clean/transporthandler.hpp
-===================================================================
---- phosphor-host-ipmid.clean.orig/transporthandler.hpp
-+++ phosphor-host-ipmid.clean/transporthandler.hpp
-@@ -140,6 +140,7 @@ struct ChannelConfig_t
-     // vlan id is in 12 bits and the 16th bit is for enable mask.
-     uint32_t vlanID = ipmi::network::VLAN_ID_MASK;
-     uint8_t lan_set_in_progress = SET_COMPLETE;
-+    uint8_t updateInProgress = false;
-     bool flush = false;
- 
-     // IPV6 parameters
-@@ -165,6 +166,7 @@ struct ChannelConfig_t
-         vlanID = ipmi::network::VLAN_ID_MASK;
-         ipsrc = ipmi::network::IPOrigin::UNSPECIFIED;
-         lan_set_in_progress = SET_COMPLETE;
-+        updateInProgress = false;
-         flush = false;
- 
-         // IPv6
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0058-Add-AC-failed-bit-support-for-get-chassis-status-com.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0058-Add-AC-failed-bit-support-for-get-chassis-status-com.patch
new file mode 100644
index 000000000..42bb682c4
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0058-Add-AC-failed-bit-support-for-get-chassis-status-com.patch
@@ -0,0 +1,76 @@
+From f51bef8f7c5785405ee5c83a921efb1bc05e4947 Mon Sep 17 00:00:00 2001
+From: Yong Li <yong.b.li@linux.intel.com>
+Date: Wed, 27 Mar 2019 16:11:25 +0800
+Subject: [PATCH] =?UTF-8?q?Add=20=E2=80=9CAC=20failed=E2=80=9D=20bit=20sup?=
+ =?UTF-8?q?port=20for=20get=20chassis=20status=20command?=
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+PFail property is provided by power control service,
+ture means the booting is from AC loss.
+
+Tested:
+Remove the AC cable and reconnect it
+Ipmitool chassis status to check the status:
+Last Power Event     : ac-failed
+
+Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
+---
+ chassishandler.cpp | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/chassishandler.cpp b/chassishandler.cpp
+index 7a522ad..40d2018 100644
+--- a/chassishandler.cpp
++++ b/chassishandler.cpp
+@@ -844,6 +844,7 @@ ipmi_ret_t ipmi_get_chassis_status(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+     sd_bus_message* reply = NULL;
+     int r = 0;
+     int pgood = 0;
++    bool pFail = true;
+     char* busname = NULL;
+     ipmi_ret_t rc = IPMI_CC_OK;
+     ipmi_get_chassis_status_t chassis_status{};
+@@ -904,6 +905,26 @@ ipmi_ret_t ipmi_get_chassis_status(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+         goto finish;
+     }
+ 
++    r = sd_bus_get_property(bus, busname, objname, intf, "PFail", NULL, &reply,
++                            "b");
++    if (r < 0)
++    {
++        log<level::ERR>("Failed to call sd_bus_get_property",
++                        entry("PROPERTY=%s", "PFail"), entry("ERRNO=0x%X", -r),
++                        entry("BUS=%s", busname), entry("PATH=%s", objname),
++                        entry("INTERFACE=%s", intf));
++        rc = IPMI_CC_UNSPECIFIED_ERROR;
++        goto finish;
++    }
++
++    r = sd_bus_message_read(reply, "b", &pFail);
++    if (r < 0)
++    {
++        log<level::ERR>("Failed to read PFail:", entry("ERRNO=0x%X", -r));
++        rc = IPMI_CC_UNSPECIFIED_ERROR;
++        goto finish;
++    }
++
+     s = dbusToIpmi.at(powerRestore);
+ 
+     // Current Power State
+@@ -952,6 +973,11 @@ ipmi_ret_t ipmi_get_chassis_status(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+ 
+     chassis_status.last_power_event = 0;
+ 
++    if (pFail)
++    {
++        chassis_status.last_power_event |= 1;
++    }
++
+     // Misc. Chassis State
+     // [7] – reserved
+     // [6] – 1b = Chassis Identify command and state info supported (Optional)
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch
new file mode 100644
index 000000000..1dc55e2f4
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch
@@ -0,0 +1,415 @@
+From 1c15df9d82254286d0773086836767f23711c5d9 Mon Sep 17 00:00:00 2001
+From: Cheng C Yang <cheng.c.yang@intel.com>
+Date: Tue, 2 Apr 2019 00:34:34 +0800
+Subject: [PATCH] Move Set SOL config parameter to host-ipmid
+
+Move Set SOL config parameter command from net-ipmid to host-ipmid,
+so that BIOS in Intel platform can enable or disable SOL through KCS.
+Get SOL config parameter command will be moved later.
+
+Tested by:
+With the related change in phospher-ipmi-net and phospher-dbus-interface,
+Run commands:
+ipmitool raw 0x0c 0x21 0x0e 0x00 0x01
+ipmitool raw 0x0c 0x21 0x0e 0x01 0x00
+ipmitool raw 0x0c 0x21 0x0e 0x02 0x03
+ipmitool raw 0x0c 0x21 0x0e 0x03 0x5 0x03
+ipmitool raw 0x0c 0x21 0x0e 0x04 0x5 0x03
+All these commands have correct response and all dbus interface for
+sol command change to same value in above commands.
+After reboot BMC, "Progress" property in dbus interface change back
+to 0 and other properties will not reset to default value.
+
+Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
+---
+ host-ipmid-whitelist.conf |   1 +
+ include/ipmid/api.h       |   1 +
+ transporthandler.cpp      | 222 ++++++++++++++++++++++++++++++++++++++
+ transporthandler.hpp      |  97 +++++++++++++++++
+ 4 files changed, 321 insertions(+)
+
+diff --git a/host-ipmid-whitelist.conf b/host-ipmid-whitelist.conf
+index 2a83347..544b766 100644
+--- a/host-ipmid-whitelist.conf
++++ b/host-ipmid-whitelist.conf
+@@ -41,6 +41,7 @@
+ 0x0A:0x48    //<Storage>:<Get SEL Time>
+ 0x0A:0x49    //<Storage>:<Set SEL Time>
+ 0x0C:0x02    //<Transport>:<Get LAN Configuration Parameters>
++0x0C:0x21    //<Transport>:<Set SOL Configuration Parameters>
+ 0x2C:0x00    //<Group Extension>:<Group Extension Command>
+ 0x2C:0x01    //<Group Extension>:<Get DCMI Capabilities>
+ 0x2C:0x02    //<Group Extension>:<Get Power Reading>
+diff --git a/include/ipmid/api.h b/include/ipmid/api.h
+index f08ee11..2f366b4 100644
+--- a/include/ipmid/api.h
++++ b/include/ipmid/api.h
+@@ -113,6 +113,7 @@ enum ipmi_return_codes
+     IPMI_DCMI_CC_NO_ACTIVE_POWER_LIMIT = 0x80,
+     IPMI_WDOG_CC_NOT_INIT = 0x80,
+     IPMI_CC_SYSTEM_INFO_PARAMETER_NOT_SUPPORTED = 0x80,
++    IPMI_CC_SET_IN_PROGRESS_ACTIVE = 0x81,
+     IPMI_CC_SYSTEM_INFO_PARAMETER_SET_READ_ONLY = 0x82,
+     IPMI_CC_BUSY = 0xC0,
+     IPMI_CC_INVALID = 0xC1,
+diff --git a/transporthandler.cpp b/transporthandler.cpp
+index 8f18b76..a693279 100644
+--- a/transporthandler.cpp
++++ b/transporthandler.cpp
+@@ -36,6 +36,9 @@ static const std::array<std::string, 3> ipAddressEnablesType = {
+     "xyz.openbmc_project.Network.EthernetInterface.IPAllowed.IPv6Only",
+     "xyz.openbmc_project.Network.EthernetInterface.IPAllowed.IPv4AndIPv6"};
+ 
++constexpr const char* solInterface = "xyz.openbmc_project.Ipmi.SOL";
++constexpr const char* solPath = "/xyz/openbmc_project/ipmi/sol";
++
+ std::map<int, std::unique_ptr<struct ChannelConfig_t>> channelConfig;
+ 
+ using namespace phosphor::logging;
+@@ -1633,6 +1636,219 @@ void createNetworkTimer()
+     }
+ }
+ 
++static int setSOLParameter(std::string property, const ipmi::Value& value)
++{
++    auto dbus = getSdBus();
++
++    static std::string solService{};
++    if (solService.empty())
++    {
++        try
++        {
++            solService = ipmi::getService(*dbus, solInterface, solPath);
++        }
++        catch (const sdbusplus::exception::SdBusError& e)
++        {
++            solService.clear();
++            phosphor::logging::log<phosphor::logging::level::ERR>(
++                "Error: get SOL service failed");
++            return -1;
++        }
++    }
++    try
++    {
++        ipmi::setDbusProperty(*dbus, solService, solPath, solInterface,
++                              property, value);
++    }
++    catch (sdbusplus::exception_t&)
++    {
++        phosphor::logging::log<phosphor::logging::level::ERR>(
++            "Error setting sol parameter");
++        return -1;
++    }
++
++    return 0;
++}
++
++static int getSOLParameter(std::string property, ipmi::Value& value)
++{
++    auto dbus = getSdBus();
++
++    static std::string solService{};
++    if (solService.empty())
++    {
++        try
++        {
++            solService = ipmi::getService(*dbus, solInterface, solPath);
++        }
++        catch (const sdbusplus::exception::SdBusError& e)
++        {
++            solService.clear();
++            phosphor::logging::log<phosphor::logging::level::ERR>(
++                "Error: get SOL service failed");
++            return -1;
++        }
++    }
++    try
++    {
++        value = ipmi::getDbusProperty(*dbus, solService, solPath, solInterface,
++                                      property);
++    }
++    catch (sdbusplus::exception_t&)
++    {
++        phosphor::logging::log<phosphor::logging::level::ERR>(
++            "Error getting sol parameter");
++        return -1;
++    }
++
++    return 0;
++}
++
++void initializeSOLInProgress()
++{
++    if (setSOLParameter("Progress", static_cast<uint8_t>(0)) < 0)
++    {
++        phosphor::logging::log<phosphor::logging::level::ERR>(
++            "Error initialize sol progress");
++    }
++}
++
++ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
++                         ipmi_request_t request, ipmi_response_t response,
++                         ipmi_data_len_t dataLen, ipmi_context_t context)
++{
++    auto reqData = reinterpret_cast<const SetConfParamsRequest*>(request);
++
++    // Check request length first
++    switch (static_cast<sol::Parameter>(reqData->paramSelector))
++    {
++        case sol::Parameter::progress:
++        case sol::Parameter::enable:
++        case sol::Parameter::authentication:
++        {
++            if (*dataLen != sizeof(SetConfParamsRequest) - 1)
++            {
++                *dataLen = 0;
++                return IPMI_CC_REQ_DATA_LEN_INVALID;
++            }
++            break;
++        }
++        case sol::Parameter::accumulate:
++        case sol::Parameter::retry:
++        {
++            if (*dataLen != sizeof(SetConfParamsRequest))
++            {
++                *dataLen = 0;
++                return IPMI_CC_REQ_DATA_LEN_INVALID;
++            }
++            break;
++        }
++        default:
++            break;
++    }
++
++    *dataLen = 0;
++
++    switch (static_cast<sol::Parameter>(reqData->paramSelector))
++    {
++        case sol::Parameter::progress:
++        {
++            uint8_t progress = reqData->value & progressMask;
++            ipmi::Value currentProgress = 0;
++            if (getSOLParameter("Progress", currentProgress) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++
++            if ((std::get<uint8_t>(currentProgress) == 1) && (progress == 1))
++            {
++                return IPMI_CC_SET_IN_PROGRESS_ACTIVE;
++            }
++
++            if (setSOLParameter("Progress", progress) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            break;
++        }
++        case sol::Parameter::enable:
++        {
++            bool enable = reqData->value & enableMask;
++            if (setSOLParameter("Enable", enable) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            break;
++        }
++        case sol::Parameter::authentication:
++        {
++            // if encryption is used authentication must also be used.
++            if (reqData->auth.encrypt && !reqData->auth.auth)
++            {
++                return IPMI_CC_SYSTEM_INFO_PARAMETER_SET_READ_ONLY;
++            }
++            else if (reqData->auth.privilege <
++                         static_cast<uint8_t>(sol::Privilege::userPriv) ||
++                     reqData->auth.privilege >
++                         static_cast<uint8_t>(sol::Privilege::oemPriv))
++            {
++                return IPMI_CC_INVALID_FIELD_REQUEST;
++            }
++
++            if ((setSOLParameter("Privilege", reqData->auth.privilege) < 0) ||
++                (setSOLParameter("ForceEncryption",
++                                 static_cast<bool>(reqData->auth.encrypt)) <
++                 0) ||
++                (setSOLParameter("ForceAuthentication",
++                                 static_cast<bool>(reqData->auth.auth)) < 0))
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++
++            break;
++        }
++        case sol::Parameter::accumulate:
++        {
++            if (reqData->acc.threshold == 0)
++            {
++                return IPMI_CC_INVALID_FIELD_REQUEST;
++            }
++            if (setSOLParameter("AccumulateIntervalMS", reqData->acc.interval) <
++                0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            if (setSOLParameter("Threshold", reqData->acc.threshold) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            break;
++        }
++        case sol::Parameter::retry:
++        {
++            if ((setSOLParameter("RetryCount", reqData->retry.count) < 0) ||
++                (setSOLParameter("RetryIntervalMS", reqData->retry.interval) <
++                 0))
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++
++            break;
++        }
++        case sol::Parameter::port:
++        {
++            return IPMI_CC_SYSTEM_INFO_PARAMETER_SET_READ_ONLY;
++        }
++        case sol::Parameter::nvbitrate:
++        case sol::Parameter::vbitrate:
++        case sol::Parameter::channel:
++        default:
++            return IPMI_CC_PARM_NOT_SUPPORTED;
++    }
++
++    return IPMI_CC_OK;
++}
++
+ void register_netfn_transport_functions()
+ {
+     // As this timer is only for transport handler
+@@ -1650,5 +1866,11 @@ void register_netfn_transport_functions()
+     ipmi_register_callback(NETFUN_TRANSPORT, IPMI_CMD_GET_LAN, NULL,
+                            ipmi_transport_get_lan, PRIVILEGE_OPERATOR);
+ 
++    ipmi_register_callback(NETFUN_TRANSPORT, IPMI_CMD_SET_SOL_CONF_PARAMS, NULL,
++                           setConfParams, PRIVILEGE_ADMIN);
++
++    // Initialize dbus property progress to 0 every time sol manager restart.
++    initializeSOLInProgress();
++
+     return;
+ }
+diff --git a/transporthandler.hpp b/transporthandler.hpp
+index bd23391..3b5e9e1 100644
+--- a/transporthandler.hpp
++++ b/transporthandler.hpp
+@@ -8,6 +8,8 @@ enum ipmi_netfn_storage_cmds
+     // Get capability bits
+     IPMI_CMD_SET_LAN = 0x01,
+     IPMI_CMD_GET_LAN = 0x02,
++    IPMI_CMD_SET_SOL_CONF_PARAMS = 0x21,
++    IPMI_CMD_GET_SOL_CONF_PARAMS = 0x22,
+ };
+ 
+ // Command specific completion codes
+@@ -186,3 +188,98 @@ void commitNetworkChanges();
+  * @param[in] channel: channel number.
+  */
+ void applyChanges(int channel);
++
++namespace sol
++{
++enum class Parameter
++{
++    progress,       //!< Set In Progress.
++    enable,         //!< SOL Enable.
++    authentication, //!< SOL Authentication.
++    accumulate,     //!< Character Accumulate Interval & Send Threshold.
++    retry,          //!< SOL Retry.
++    nvbitrate,      //!< SOL non-volatile bit rate.
++    vbitrate,       //!< SOL volatile bit rate.
++    channel,        //!< SOL payload channel.
++    port,           //!< SOL payload port.
++};
++
++enum class Privilege : uint8_t
++{
++    highestPriv,
++    callbackPriv,
++    userPriv,
++    operatorPriv,
++    adminPriv,
++    oemPriv,
++};
++
++} // namespace sol
++
++constexpr uint8_t progressMask = 0x03;
++constexpr uint8_t enableMask = 0x01;
++
++struct Auth
++{
++#if BYTE_ORDER == LITTLE_ENDIAN
++    uint8_t privilege : 4; //!< SOL privilege level.
++    uint8_t reserved : 2;  //!< Reserved.
++    uint8_t auth : 1;      //!< Force SOL payload Authentication.
++    uint8_t encrypt : 1;   //!< Force SOL payload encryption.
++#endif
++
++#if BYTE_ORDER == BIG_ENDIAN
++    uint8_t encrypt : 1;   //!< Force SOL payload encryption.
++    uint8_t auth : 1;      //!< Force SOL payload Authentication.
++    uint8_t reserved : 2;  //!< Reserved.
++    uint8_t privilege : 4; //!< SOL privilege level.
++#endif
++} __attribute__((packed));
++
++struct Accumulate
++{
++    uint8_t interval;  //!< Character accumulate interval.
++    uint8_t threshold; //!< Character send threshold.
++} __attribute__((packed));
++
++struct Retry
++{
++#if BYTE_ORDER == LITTLE_ENDIAN
++    uint8_t count : 3;    //!< SOL retry count.
++    uint8_t reserved : 5; //!< Reserved.
++#endif
++
++#if BYTE_ORDER == BIG_ENDIAN
++    uint8_t reserved : 5; //!< Reserved.
++    uint8_t count : 3;    //!< SOL retry count.
++#endif
++
++    uint8_t interval; //!< SOL retry interval.
++} __attribute__((packed));
++
++struct SetConfParamsRequest
++{
++#if BYTE_ORDER == LITTLE_ENDIAN
++    uint8_t channelNumber : 4; //!< Channel number.
++    uint8_t reserved : 4;      //!< Reserved.
++#endif
++
++#if BYTE_ORDER == BIG_ENDIAN
++    uint8_t reserved : 4;      //!< Reserved.
++    uint8_t channelNumber : 4; //!< Channel number.
++#endif
++
++    uint8_t paramSelector; //!< Parameter selector.
++    union
++    {
++        uint8_t value;         //!< Represents one byte SOL parameters.
++        struct Accumulate acc; //!< Character accumulate values.
++        struct Retry retry;    //!< Retry values.
++        struct Auth auth;      //!< Authentication parameters.
++    };
++} __attribute__((packed));
++
++struct SetConfParamsResponse
++{
++    uint8_t completionCode; //!< Completion code.
++} __attribute__((packed));
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch
new file mode 100644
index 000000000..49a2c01ba
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host/0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch
@@ -0,0 +1,248 @@
+From 973865687325c6563fd6b729a3a220661066f635 Mon Sep 17 00:00:00 2001
+From: Cheng C Yang <cheng.c.yang@intel.com>
+Date: Wed, 3 Apr 2019 15:55:04 +0800
+Subject: [PATCH] Move Get SOL config parameter to host-ipmid
+
+Move Get SOL config parameter command from net-ipmid to host-ipmid.
+
+Tested By:
+Run command ipmitool sol info
+Set in progress                 : set-complete
+Enabled                         : true
+Force Encryption                : false
+Force Authentication            : false
+Privilege Level                 : USER
+Character Accumulate Level (ms) : 100
+Character Send Threshold        : 1
+Retry Count                     : 3
+Retry Interval (ms)             : 100
+Volatile Bit Rate (kbps)        : IPMI-Over-Serial-Setting
+Non-Volatile Bit Rate (kbps)    : IPMI-Over-Serial-Setting
+Payload Channel                 : 14 (0x0e)
+Payload Port                    : 623
+
+Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
+---
+ transporthandler.cpp | 139 ++++++++++++++++++++++++++++++++++++++++++++++++---
+ transporthandler.hpp |  26 +++++++++-
+ 2 files changed, 156 insertions(+), 9 deletions(-)
+
+diff --git a/transporthandler.cpp b/transporthandler.cpp
+index 2111acf..b18f522 100644
+--- a/transporthandler.cpp
++++ b/transporthandler.cpp
+@@ -1715,11 +1715,133 @@ void initializeSOLInProgress()
+     }
+ }
+ 
+-ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+-                         ipmi_request_t request, ipmi_response_t response,
+-                         ipmi_data_len_t dataLen, ipmi_context_t context)
++//    For getsetSOLConfParams, there are still three tings TODO:
++//    1. session less channel number request has to return error.
++//    2. convert 0xE channel number.
++//    3. have unique object for every session based channel.
++ipmi_ret_t getSOLConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
++                            ipmi_request_t request, ipmi_response_t response,
++                            ipmi_data_len_t dataLen, ipmi_context_t context)
+ {
+-    auto reqData = reinterpret_cast<const SetConfParamsRequest*>(request);
++    auto reqData = reinterpret_cast<const GetSOLConfParamsRequest*>(request);
++    std::vector<uint8_t> outPayload;
++
++    if (*dataLen < sizeof(GetSOLConfParamsRequest) - 2)
++    {
++        *dataLen = 0;
++        return IPMI_CC_REQ_DATA_LEN_INVALID;
++    }
++
++    *dataLen = 0;
++
++    outPayload.push_back(solParameterRevision);
++    if (reqData->getParamRev)
++    {
++        std::copy(outPayload.begin(), outPayload.end(),
++                  static_cast<uint8_t*>(response));
++        *dataLen = outPayload.size();
++        return IPMI_CC_OK;
++    }
++
++    ipmi::Value value;
++    switch (static_cast<sol::Parameter>(reqData->paramSelector))
++    {
++        case sol::Parameter::progress:
++        {
++            if (getSOLParameter("Progress", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(std::get<uint8_t>(value));
++            break;
++        }
++        case sol::Parameter::enable:
++        {
++            if (getSOLParameter("Enable", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(static_cast<uint8_t>(std::get<bool>(value)));
++            break;
++        }
++        case sol::Parameter::authentication:
++        {
++            uint8_t authentication = 0;
++            if (getSOLParameter("Privilege", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            authentication = (std::get<uint8_t>(value) & 0x0f);
++
++            if (getSOLParameter("ForceAuthentication", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            authentication |=
++                (static_cast<uint8_t>(std::get<bool>(value)) << 6);
++
++            if (getSOLParameter("ForceEncryption", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            authentication |=
++                (static_cast<uint8_t>(std::get<bool>(value)) << 7);
++            outPayload.push_back(authentication);
++            break;
++        }
++        case sol::Parameter::accumulate:
++        {
++            if (getSOLParameter("AccumulateIntervalMS", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(std::get<uint8_t>(value));
++
++            if (getSOLParameter("Threshold", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(std::get<uint8_t>(value));
++            break;
++        }
++        case sol::Parameter::retry:
++        {
++            if (getSOLParameter("RetryCount", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(std::get<uint8_t>(value) & 0x03);
++
++            if (getSOLParameter("RetryIntervalMS", value) < 0)
++            {
++                return IPMI_CC_UNSPECIFIED_ERROR;
++            }
++            outPayload.push_back(std::get<uint8_t>(value));
++            break;
++        }
++        case sol::Parameter::port:
++        {
++            uint16_t port = htole16(ipmiStdPort);
++            auto buffer = reinterpret_cast<const uint8_t*>(&port);
++            std::copy(buffer, buffer + sizeof(port),
++                      std::back_inserter(outPayload));
++            break;
++        }
++        default:
++            return IPMI_CC_PARM_NOT_SUPPORTED;
++    }
++    std::copy(outPayload.begin(), outPayload.end(),
++              static_cast<uint8_t*>(response));
++    *dataLen = outPayload.size();
++
++    return IPMI_CC_OK;
++}
++
++ipmi_ret_t setSOLConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
++                            ipmi_request_t request, ipmi_response_t response,
++                            ipmi_data_len_t dataLen, ipmi_context_t context)
++{
++    auto reqData = reinterpret_cast<const SetSOLConfParamsRequest*>(request);
+ 
+     // Check request length first
+     switch (static_cast<sol::Parameter>(reqData->paramSelector))
+@@ -1728,7 +1850,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+         case sol::Parameter::enable:
+         case sol::Parameter::authentication:
+         {
+-            if (*dataLen != sizeof(SetConfParamsRequest) - 1)
++            if (*dataLen != sizeof(SetSOLConfParamsRequest) - 1)
+             {
+                 *dataLen = 0;
+                 return IPMI_CC_REQ_DATA_LEN_INVALID;
+@@ -1738,7 +1860,7 @@ ipmi_ret_t setConfParams(ipmi_netfn_t netfn, ipmi_cmd_t cmd,
+         case sol::Parameter::accumulate:
+         case sol::Parameter::retry:
+         {
+-            if (*dataLen != sizeof(SetConfParamsRequest))
++            if (*dataLen != sizeof(SetSOLConfParamsRequest))
+             {
+                 *dataLen = 0;
+                 return IPMI_CC_REQ_DATA_LEN_INVALID;
+@@ -1869,7 +1991,10 @@ void register_netfn_transport_functions()
+                            ipmi_transport_get_lan, PRIVILEGE_OPERATOR);
+ 
+     ipmi_register_callback(NETFUN_TRANSPORT, IPMI_CMD_SET_SOL_CONF_PARAMS, NULL,
+-                           setConfParams, PRIVILEGE_ADMIN);
++                           setSOLConfParams, PRIVILEGE_ADMIN);
++
++    ipmi_register_callback(NETFUN_TRANSPORT, IPMI_CMD_GET_SOL_CONF_PARAMS, NULL,
++                           getSOLConfParams, PRIVILEGE_ADMIN);
+ 
+     // Initialize dbus property progress to 0 every time sol manager restart.
+     initializeSOLInProgress();
+diff --git a/transporthandler.hpp b/transporthandler.hpp
+index 3b5e9e1..7132cff 100644
+--- a/transporthandler.hpp
++++ b/transporthandler.hpp
+@@ -257,7 +257,7 @@ struct Retry
+     uint8_t interval; //!< SOL retry interval.
+ } __attribute__((packed));
+ 
+-struct SetConfParamsRequest
++struct SetSOLConfParamsRequest
+ {
+ #if BYTE_ORDER == LITTLE_ENDIAN
+     uint8_t channelNumber : 4; //!< Channel number.
+@@ -279,7 +279,29 @@ struct SetConfParamsRequest
+     };
+ } __attribute__((packed));
+ 
+-struct SetConfParamsResponse
++struct SetSOLConfParamsResponse
+ {
+     uint8_t completionCode; //!< Completion code.
+ } __attribute__((packed));
++
++struct GetSOLConfParamsRequest
++{
++#if BYTE_ORDER == LITTLE_ENDIAN
++    uint8_t channelNum : 4;  //!< Channel number.
++    uint8_t reserved : 3;    //!< Reserved.
++    uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision
++#endif
++
++#if BYTE_ORDER == BIG_ENDIAN
++    uint8_t getParamRev : 1; //!< Get parameter or Get parameter revision
++    uint8_t reserved : 3;    //!< Reserved.
++    uint8_t channelNum : 4;  //!< Channel number.
++#endif
++
++    uint8_t paramSelector; //!< Parameter selector.
++    uint8_t setSelector;   //!< Set selector.
++    uint8_t blockSelector; //!< Block selector.
++} __attribute__((packed));
++
++static constexpr uint16_t ipmiStdPort = 623;
++static constexpr uint8_t solParameterRevision = 0x11;
+-- 
+2.16.2
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend
index 2d47fdfff..f454f7ce9 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-host_%.bbappend
@@ -3,7 +3,7 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 # TODO: This should be removed, once up-stream bump up
 # issue is resolved
 #SRC_URI = "git://github.com/openbmc/phosphor-host-ipmid"
-SRCREV = "55768e3548ef7476d4fdbe7be7a3ddb4d4896f14"
+SRCREV = "11df4f6906edc0dfb23089a6e297158549c19ebd"
 
 SRC_URI += "file://phosphor-ipmi-host.service \
             file://0002-Modify-dbus-interface-for-power-control.patch \
@@ -13,25 +13,17 @@ SRC_URI += "file://phosphor-ipmi-host.service \
             file://0012-ipmi-set-get-boot-options.patch \
             file://0013-ipmi-add-set-bios-id-to-whitelist.patch \
             file://0014-Enable-get-device-guid-ipmi-command.patch \
-            file://0016-add-better-sdbusplus-exception-handling.patch \
-            file://0018-Catch-sdbusplus-exceptions-in-IPMI-net.patch \
             file://0021-Implement-IPMI-Commmand-Get-Host-Restart-Cause.patch \
             file://0039-ipmi-add-oem-command-get-AIC-FRU-to-whitelist.patch \
             file://0048-Implement-IPMI-Master-Write-Read-command.patch \
             file://0049-Fix-Unspecified-error-on-ipmi-restart-cause-command.patch \
             file://0050-enable-6-oem-commands.patch \
-            file://0051-Fix-Set-LAN-Config-to-work-without-SetInProgress.patch \
             file://0053-Fix-keep-looping-issue-when-entering-OS.patch \
             file://0055-Implement-set-front-panel-button-enables-command.patch \
             file://0056-add-SetInProgress-to-get-set-boot-option-cmd.patch \
             file://0057-Add-timer-use-actions-support.patch \
+            file://0058-Add-AC-failed-bit-support-for-get-chassis-status-com.patch \
+            file://0059-Move-Set-SOL-config-parameter-to-host-ipmid.patch \
+            file://0060-Move-Get-SOL-config-parameter-to-host-ipmid.patch \
             "
 
-do_install_append(){
-  install -d ${D}${includedir}/phosphor-ipmi-host
-  install -d ${D}${libdir}/phosphor-ipmi-host
-  install -m 0644 -D ${S}/*.h ${D}${includedir}/phosphor-ipmi-host
-  install -m 0644 -D ${S}/*.hpp ${D}${includedir}/phosphor-ipmi-host
-  install -m 0644 -D ${S}/utils.cpp ${D}${libdir}/phosphor-ipmi-host
-
-}
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend
index d5d38a0ce..694bd1fcf 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-ipmb_%.bbappend
@@ -1,2 +1,2 @@
 SRC_URI = "git://github.com/openbmc/ipmbbridge.git"
-SRCREV = "25e85c79257723b1cb754c20299196685373ce24"
+SRCREV = "08deaa317c7ac0dd6e4202529ff17962c63df485"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch
new file mode 100644
index 000000000..867b3aba6
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/00010-Change-Authentication-Parameter.patch
@@ -0,0 +1,40 @@
+From 0fd38eb0a155cb11ff5a5452087f68c46d12111b Mon Sep 17 00:00:00 2001
+From: Cheng C Yang <cheng.c.yang@intel.com>
+Date: Thu, 28 Mar 2019 18:10:40 +0800
+Subject: [PATCH] Change Authentication Parameter
+
+Seprate D-bus interface Authentication to forceAuthentication,
+forceEncryption, Privilege according to the related change in
+sol-dbus-interface.
+
+Tested By:
+ipmitool -I lanplus -H x -U x -P x raw 0x0c 0x21 0x0e 0x02 0x03
+ipmitool -I lanplus -H x -U x -P x raw 0x0c 0x21 0x0e 0x02 0xc2
+The parameters has been changed to the request data in above command.
+
+Signed-off-by: Cheng C Yang <cheng.c.yang@intel.com>
+---
+ sol/sol_manager.cpp | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/sol/sol_manager.cpp b/sol/sol_manager.cpp
+index de36723..0bd837e 100644
+--- a/sol/sol_manager.cpp
++++ b/sol/sol_manager.cpp
+@@ -195,8 +195,12 @@ void Manager::updateSOLParameter()
+ 
+     enable = std::get<bool>(properties["Enable"]);
+ 
++    forceEncrypt = std::get<bool>(properties["ForceEncryption"]);
++
++    forceAuth = std::get<bool>(properties["ForceAuthentication"]);
++
+     solMinPrivilege = static_cast<session::Privilege>(
+-        std::get<uint8_t>(properties["Authentication"]));
++        std::get<uint8_t>(properties["Privilege"]));
+ 
+     accumulateInterval =
+         std::get<uint8_t>((properties["AccumulateIntervalMS"])) *
+-- 
+2.16.2
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch
index 7225c7529..0ad625a1f 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch
@@ -24,7 +24,7 @@ Index: phosphor-net-ipmid.clean/command/guid.cpp
  
 -static constexpr auto guidObjPath = "/org/openbmc/control/chassis0";
 +static constexpr auto guidObjPath =
-+                "/xyz/openbmc_project/Chassis/Control/Chassis0";
++    "/xyz/openbmc_project/Chassis/Control/Chassis0";
  static constexpr auto propInterface = "org.freedesktop.DBus.Properties";
  
  Guid getSystemGUID()
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0007-Adding-support-for-GetSessionInfo-command.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0007-Adding-support-for-GetSessionInfo-command.patch
index fda7ed2ca..bbbe6ae4f 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0007-Adding-support-for-GetSessionInfo-command.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0007-Adding-support-for-GetSessionInfo-command.patch
@@ -1,7 +1,7 @@
-From f5c7d30be4a097998d9390614c0faa2d77109ca5 Mon Sep 17 00:00:00 2001
+From b05fb3231810865ef1b6e627bb0452ae7a6c61f8 Mon Sep 17 00:00:00 2001
 From: ssekar <suryakanth.sekar@linux.intel.com>
 Date: Wed, 12 Dec 2018 16:04:15 +0530
-Subject: [PATCH] Adding support for GetSessionInfo command
+Subject: [PATCH 1/2] Adding support for GetSessionInfo command
 
 Description: user can get all session info (remote ip,port,
 session id, priv, etc) using this command.
@@ -20,14 +20,13 @@ Signed-off-by: ssekar <suryakanth.sekar@linux.intel.com>
  message_handler.cpp      |   1 +
  sessions_manager.cpp     |  55 +++++++++++++++
  sessions_manager.hpp     |   7 ++
- socket_channel.cpp       |  27 ++++++-
- socket_channel.hpp       |   3 +-
- 8 files changed, 301 insertions(+), 2 deletions(-)
+ socket_channel.hpp       |  17 +++++
+ 7 files changed, 290 insertions(+)
 
-Index: phosphor-net-ipmid.clean/comm_module.cpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/comm_module.cpp
-+++ phosphor-net-ipmid.clean/comm_module.cpp
+diff --git a/comm_module.cpp b/comm_module.cpp
+index acc9089..7a1a17d 100644
+--- a/comm_module.cpp
++++ b/comm_module.cpp
 @@ -53,6 +53,14 @@ void sessionSetupCommands()
           &closeSession,
           session::Privilege::CALLBACK,
@@ -43,20 +42,14 @@ Index: phosphor-net-ipmid.clean/comm_module.cpp
      };
  
      for (auto& iter : commands)
-Index: phosphor-net-ipmid.clean/command/session_cmds.cpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/command/session_cmds.cpp
-+++ phosphor-net-ipmid.clean/command/session_cmds.cpp
-@@ -5,11 +5,19 @@
- 
- #include <host-ipmid/ipmid-api.h>
- 
-+#include <iostream>
- #include <user_channel/channel_layer.hpp>
- #include <user_channel/user_layer.hpp>
- 
+diff --git a/command/session_cmds.cpp b/command/session_cmds.cpp
+index 8606ce5..4beeb6e 100644
+--- a/command/session_cmds.cpp
++++ b/command/session_cmds.cpp
+@@ -8,6 +8,14 @@
  namespace command
  {
+ 
 +// Defined as per IPMI sepcification
 +static constexpr uint8_t searchCurrentSession = 0x00;
 +static constexpr uint8_t searchSessionByHandle = 0xFE;
@@ -64,10 +57,11 @@ Index: phosphor-net-ipmid.clean/command/session_cmds.cpp
 +
 +static constexpr uint8_t ipmi15VerSession = 0x00;
 +static constexpr uint8_t ipmi20VerSession = 0x01;
- 
++
  std::vector<uint8_t>
      setSessionPrivilegeLevel(const std::vector<uint8_t>& inPayload,
-@@ -110,4 +118,143 @@ std::vector<uint8_t> closeSession(const
+                              const message::Handler& handler)
+@@ -92,4 +100,143 @@ std::vector<uint8_t> closeSession(const std::vector<uint8_t>& inPayload,
      return outPayload;
  }
  
@@ -211,10 +205,10 @@ Index: phosphor-net-ipmid.clean/command/session_cmds.cpp
 +}
 +
  } // namespace command
-Index: phosphor-net-ipmid.clean/command/session_cmds.hpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/command/session_cmds.hpp
-+++ phosphor-net-ipmid.clean/command/session_cmds.hpp
+diff --git a/command/session_cmds.hpp b/command/session_cmds.hpp
+index 9737fdb..741de23 100644
+--- a/command/session_cmds.hpp
++++ b/command/session_cmds.hpp
 @@ -116,4 +116,59 @@ struct CloseSessionResponse
  std::vector<uint8_t> closeSession(const std::vector<uint8_t>& inPayload,
                                    const message::Handler& handler);
@@ -275,22 +269,22 @@ Index: phosphor-net-ipmid.clean/command/session_cmds.hpp
 +                                    const message::Handler& handler);
 +
  } // namespace command
-Index: phosphor-net-ipmid.clean/message_handler.cpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/message_handler.cpp
-+++ phosphor-net-ipmid.clean/message_handler.cpp
-@@ -43,6 +43,7 @@ std::shared_ptr<Message> Handler::receiv
-     sessionID = message->bmcSessionID;
-     message->rcSessionID = session->getRCSessionID();
+diff --git a/message_handler.cpp b/message_handler.cpp
+index e2aafb3..b335236 100644
+--- a/message_handler.cpp
++++ b/message_handler.cpp
+@@ -43,6 +43,7 @@ bool Handler::receive()
+     sessionID = inMessage->bmcSessionID;
+     inMessage->rcSessionID = session->getRCSessionID();
      session->updateLastTransactionTime();
 +    session->channelPtr = channel;
  
-     return message;
+     return true;
  }
-Index: phosphor-net-ipmid.clean/sessions_manager.cpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/sessions_manager.cpp
-+++ phosphor-net-ipmid.clean/sessions_manager.cpp
+diff --git a/sessions_manager.cpp b/sessions_manager.cpp
+index 95a8a15..9f3210b 100644
+--- a/sessions_manager.cpp
++++ b/sessions_manager.cpp
 @@ -88,6 +88,9 @@ std::shared_ptr<Session>
          }
          sessionID = session->getBMCSessionID();
@@ -301,7 +295,7 @@ Index: phosphor-net-ipmid.clean/sessions_manager.cpp
          return session;
      }
  
-@@ -149,12 +152,15 @@ std::shared_ptr<Session> Manager::getSes
+@@ -149,12 +152,15 @@ std::shared_ptr<Session> Manager::getSession(SessionID sessionID,
  
  void Manager::cleanStaleEntries()
  {
@@ -371,10 +365,10 @@ Index: phosphor-net-ipmid.clean/sessions_manager.cpp
 +    return count;
 +}
  } // namespace session
-Index: phosphor-net-ipmid.clean/sessions_manager.hpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/sessions_manager.hpp
-+++ phosphor-net-ipmid.clean/sessions_manager.hpp
+diff --git a/sessions_manager.hpp b/sessions_manager.hpp
+index 9fd38b1..f6ed1c3 100644
+--- a/sessions_manager.hpp
++++ b/sessions_manager.hpp
 @@ -82,8 +82,15 @@ class Manager
      std::shared_ptr<Session>
          getSession(SessionID sessionID,
@@ -391,14 +385,15 @@ Index: phosphor-net-ipmid.clean/sessions_manager.hpp
      /**
       * @brief Session Manager keeps the session objects as a sorted
       *        associative container with Session ID as the unique key
-Index: phosphor-net-ipmid.clean/socket_channel.hpp
-===================================================================
---- phosphor-net-ipmid.clean.orig/socket_channel.hpp
-+++ phosphor-net-ipmid.clean/socket_channel.hpp
-@@ -65,6 +65,23 @@ class Channel
+diff --git a/socket_channel.hpp b/socket_channel.hpp
+index ebe0c8f..349701e 100644
+--- a/socket_channel.hpp
++++ b/socket_channel.hpp
+@@ -64,6 +64,23 @@ class Channel
+         return endpoint.port();
      }
  
-     /**
++    /**
 +     * @brief Return the binary representation of the remote IPv4 address
 +     *
 +     * getSessionInfo needs to return the remote IPv4 addresses of each session
@@ -415,7 +410,9 @@ Index: phosphor-net-ipmid.clean/socket_channel.hpp
 +        return 0;
 +    }
 +
-+    /**
+     /**
       * @brief Read the incoming packet
       *
-      * Reads the data available on the socket
+-- 
+2.17.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch
index 1a109a571..6212c0724 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch
@@ -1,16 +1,16 @@
-From 0ecc7c816ad4836f8f54922ba92cb527f5978d5a Mon Sep 17 00:00:00 2001
+From a413e390563205476656a9005ca447f5b626872f Mon Sep 17 00:00:00 2001
 From: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
 Date: Wed, 6 Mar 2019 10:35:56 +0530
-Subject: [PATCH] Sync GetSession Info cmd based on Upstream review
+Subject: [PATCH 2/2] Sync GetSession Info cmd based on Upstream review
 
 Signed-off-by: Suryakanth Sekar <suryakanth.sekar@linux.intel.com>
 ---
- comm_module.cpp          | 12 ++++----
- command/session_cmds.cpp | 72 +++++++++++++++++++++---------------------------
- sessions_manager.cpp     | 10 +++----
+ comm_module.cpp          | 12 +++----
+ command/session_cmds.cpp | 71 ++++++++++++++++++----------------------
+ sessions_manager.cpp     | 10 +++---
  sessions_manager.hpp     |  2 +-
- socket_channel.hpp       | 33 +++++++++++-----------
- 5 files changed, 59 insertions(+), 70 deletions(-)
+ socket_channel.hpp       | 33 ++++++++++---------
+ 5 files changed, 59 insertions(+), 69 deletions(-)
 
 diff --git a/comm_module.cpp b/comm_module.cpp
 index 7a1a17d..2546583 100644
@@ -36,25 +36,19 @@ index 7a1a17d..2546583 100644
  
      for (auto& iter : commands)
 diff --git a/command/session_cmds.cpp b/command/session_cmds.cpp
-index 7563b18..fc996a4 100644
+index 4beeb6e..0c3a4ed 100644
 --- a/command/session_cmds.cpp
 +++ b/command/session_cmds.cpp
-@@ -5,13 +5,12 @@
- 
- #include <ipmid/api.h>
- 
--#include <iostream>
- #include <user_channel/channel_layer.hpp>
- #include <user_channel/user_layer.hpp>
- 
+@@ -8,7 +8,7 @@
  namespace command
  {
+ 
 -// Defined as per IPMI sepcification
 +// Defined as per IPMI specification
  static constexpr uint8_t searchCurrentSession = 0x00;
  static constexpr uint8_t searchSessionByHandle = 0xFE;
  static constexpr uint8_t searchSessionByID = 0xFF;
-@@ -129,20 +128,6 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -111,20 +111,6 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
          reinterpret_cast<GetSessionInfoResponse*>(outPayload.data());
      uint32_t reqSessionID = handler.sessionID;
      response->completionCode = IPMI_CC_OK;
@@ -75,7 +69,7 @@ index 7563b18..fc996a4 100644
  
      // Here we look for session info according to session index parameter
      switch (request->sessionIndex)
-@@ -150,29 +135,22 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -132,29 +118,22 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
          // Look for current active session which this cmd is received over
          case searchCurrentSession:
              // Request data should only contain session index byte
@@ -110,7 +104,7 @@ index 7563b18..fc996a4 100644
              }
  
              // Retrieve session id based on session handle
-@@ -186,7 +164,7 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -168,7 +147,7 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
              {
                  response->completionCode = IPMI_CC_INVALID_FIELD_REQUEST;
                  outPayload.resize(sizeof(response->completionCode));
@@ -119,7 +113,7 @@ index 7563b18..fc996a4 100644
              }
              break;
          case searchSessionByID:
-@@ -196,23 +174,38 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -178,23 +157,38 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
              {
                  response->completionCode = IPMI_CC_REQ_DATA_LEN_INVALID;
                  outPayload.resize(sizeof(response->completionCode));
@@ -162,7 +156,7 @@ index 7563b18..fc996a4 100644
      response->sessionHandle = 0;
      if (reqSessionID != 0)
      {
-@@ -225,9 +218,9 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -207,9 +201,9 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
          }
          catch (std::exception& e)
          {
@@ -174,7 +168,7 @@ index 7563b18..fc996a4 100644
          }
          response->sessionHandle = std::get<session::Manager&>(singletonPool)
                                        .getSessionHandle(reqSessionID);
-@@ -236,25 +229,24 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
+@@ -218,25 +212,24 @@ std::vector<uint8_t> getSessionInfo(const std::vector<uint8_t>& inPayload,
          {
              response->completionCode = IPMI_CC_UNSPECIFIED_ERROR;
              outPayload.resize(sizeof(response->completionCode));
@@ -246,7 +240,7 @@ index 9f3210b..c6897c6 100644
      uint8_t count = 0;
      for (const auto& it : sessionsMap)
 diff --git a/sessions_manager.hpp b/sessions_manager.hpp
-index c4caad4..3a3825d 100644
+index f6ed1c3..3ff213e 100644
 --- a/sessions_manager.hpp
 +++ b/sessions_manager.hpp
 @@ -82,7 +82,7 @@ class Manager
@@ -314,5 +308,5 @@ index 349701e..8b64740 100644
  
      /**
 -- 
-2.7.4
+2.17.1
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0009-Add-dbus-interface-for-sol-commands.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0009-Add-dbus-interface-for-sol-commands.patch
index 771120120..c90cccf34 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0009-Add-dbus-interface-for-sol-commands.patch
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net/0009-Add-dbus-interface-for-sol-commands.patch
@@ -147,7 +147,7 @@ index 2046fe4..de36723 100644
  #include <boost/asio/write.hpp>
  #include <chrono>
  #include <cmath>
-+#include <phosphor-ipmi-host/utils.hpp>
++#include <ipmid/utils.hpp>
  #include <phosphor-logging/log.hpp>
 +#include <sdbusplus/message/types.hpp>
 +
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend
index 4b82cc21c..9dc21a3dd 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-ipmi-net_%.bbappend
@@ -3,7 +3,7 @@ inherit useradd
 # TODO: This should be removed, once up-stream bump up
 # issue is resolved
 #SRC_URI += "git://github.com/openbmc/phosphor-net-ipmid"
-SRCREV = "7e5d38d2fb51fc746624ff2f2b3701cea245a8fb"
+#SRCREV = "8af90ebcc552e243ae85aa9e9da1a00fbecab56c"
 
 USERADD_PACKAGES = "${PN}"
 # add a group called ipmi
@@ -15,5 +15,6 @@ SRC_URI += " file://0006-Modify-dbus-namespace-of-chassis-control-for-guid.patch
              file://0007-Adding-support-for-GetSessionInfo-command.patch \
              file://0008-Sync-GetSession-Info-cmd-based-on-Upstream-review.patch \
              file://0009-Add-dbus-interface-for-sol-commands.patch \
+             file://00010-Change-Authentication-Parameter.patch \
            "
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb
index 09d2f9c41..af83facf6 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/ipmi/phosphor-node-manager-proxy_git.bb
@@ -3,7 +3,7 @@ DESCRIPTION = "The Node Manager Proxy provides a simple interface for communicat
 with Management Engine via IPMB"
 
 SRC_URI = "git://git@github.com/Intel-BMC/node-manager;protocol=ssh"
-SRCREV = "81133dd32bd0337aec9e026d1c9c2788028c7bdd"
+SRCREV = "2ab90332828614c95e0ce22c0c95285734b55b65"
 PV = "0.1+git${SRCPV}"
 
 LICENSE = "Apache-2.0"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb
new file mode 100644
index 000000000..31b9e9338
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/multi-node-manager/multi-node-manager.bb
@@ -0,0 +1,15 @@
+SUMMARY = "Multi node manager"
+DESCRIPTION = "Daemon to handle chassis level shared resources on multi-node platform"
+
+SRC_URI = "git://git@github.com/Intel-BMC/multi-node-manager.git;protocol=ssh"
+SRCREV = "8a34c017e04dd8f327aff127f64855f6132bd318"
+
+PV = "0.1+git${SRCPV}"
+
+LICENSE = "Apache-2.0"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e"
+
+SYSTEMD_SERVICE_${PN} = "multi-node-manager.service"
+
+DEPENDS = "boost sdbusplus phosphor-logging i2c-tools"
+inherit cmake systemd
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend
new file mode 100644
index 000000000..f1be7d358
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/packagegroups/packagegroup-obmc-apps.bbappend
@@ -0,0 +1,4 @@
+${PN}-software-extras_remove = " \
+        obmc-flash-bmc \
+        obmc-mgr-download \
+"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend
index 809d05b94..ca38bf7fb 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sel-logger/phosphor-sel-logger_%.bbappend
@@ -1,6 +1,6 @@
 # Enable downstream autobump
 SRC_URI = "git://github.com/openbmc/phosphor-sel-logger.git"
-SRCREV = "2b9704d7eb666c945c73dd74a426a0af2292b0ea"
+SRCREV = "f2552a50fde35d665b5fc3ac6852f2f6bb229cae"
 
 # Enable threshold monitoring
 EXTRA_OECMAKE += "-DSEL_LOGGER_MONITOR_THRESHOLD_EVENTS=ON"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
index dff1647e8..fdd62e731 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/sensors/dbus-sensors_%.bbappend
@@ -1,4 +1,7 @@
-SRCREV = "209ec56cca898725213140fd0d1205a4d2f1c6a4"
+SRCREV = "93dc2c8e7c710fd65d269ef0bf684fb7a433a602"
 SRC_URI = "git://github.com/openbmc/dbus-sensors.git"
 
 DEPENDS_append = " i2c-tools"
+
+#todo(cheng) remove this when synced upstream
+SYSTEMD_SERVICE_${PN} += " xyz.openbmc_project.psusensor.service"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml
index 24816fb4c..d2624b606 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/settings/phosphor-settings-defaults-native/defaults.yaml
@@ -110,7 +110,7 @@
     - Interface: xyz.openbmc_project.Control.Security.RestrictionMode
       Properties:
           RestrictionMode:
-              Default: RestrictionMode::Modes::None
+              Default: RestrictionMode::Modes::Provisioning
 
 /xyz/openbmc_project/control/host0/TPMEnable:
     - Interface: xyz.openbmc_project.Control.TPM.Policy
@@ -179,3 +179,31 @@
               Default: '"Performance"'
           Supported:
               Default: '{"Acoustic", "Performance"}'
+
+/xyz/openbmc_project/control/cfm_limit:
+    - Interface: xyz.openbmc_project.Control.CFMLimit
+      Properties:
+          Limit:
+              Default: 0
+
+/xyz/openbmc_project/ipmi/sol:
+    - Interface:  xyz.openbmc_project.Ipmi.SOL
+      Properties:
+          Progress:
+              Default: 0
+          Enable:
+              Default: 'true'
+          ForceEncryption:
+              Default: 'true'
+          ForceAuthentication:
+              Default: 'true'
+          Privilege:
+              Default: 2
+          AccumulateIntervalMS:
+              Default: 20
+          Threshold:
+              Default: 1
+          RetryCount:
+              Default: 7
+          RetryIntervalMS:
+              Default: 10
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb
index 01c93490b..6737ed7a2 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/srvcfg-manager/srvcfg-manager_git.bb
@@ -9,7 +9,7 @@ LICENSE = "Apache-2.0"
 LIC_FILES_CHKSUM = "file://LICENSE;md5=e3fc50a88d0a364313df4b21ef20c29e"
 
 SRC_URI = "git://git@github.com/Intel-BMC/provingground.git;protocol=ssh"
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 inherit cmake systemd
 SYSTEMD_SERVICE_${PN} = "srvcfg-manager.service"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb
index 6d614590d..ace1969e5 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/system/callback-manager.bb
@@ -7,7 +7,7 @@ inherit cmake systemd
 DEPENDS = "boost sdbusplus"
 
 PV = "0.1+git${SRCPV}"
-SRCREV = "f4d4bfc3296cb27feb17aa5d1d93b3061b56ce10"
+SRCREV = "785f19b128794611574ea6c18805740fb851ecff"
 
 S = "${WORKDIR}/git/callback-manager"
 
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend
index 1939e5ad2..4c7d3ac2d 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/users/phosphor-user-manager_%.bbappend
@@ -1,7 +1,7 @@
 FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
 
 #SRC_URI = "git://github.com/openbmc/phosphor-user-manager"
-SRCREV = "736648e25eb250d1e200cea961fe75bf791f1355"
+SRCREV = "c3f56c50ffffe1076531eb4aad7c0a574a44841f"
 
 
 SRC_URI += " \
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-expiredTimerUse-property-support.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-expiredTimerUse-property-support.patch
deleted file mode 100644
index 54e459245..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-expiredTimerUse-property-support.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From efb3c226fc80243729901f675568b2b41142b1f9 Mon Sep 17 00:00:00 2001
-From: Yong Li <yong.b.li@linux.intel.com>
-Date: Mon, 18 Mar 2019 22:54:41 +0800
-Subject: [PATCH] Add expiredTimerUse property support
-
-When the timer expired, set expiredTimerUse property as the timer use
-
-Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
----
- watchdog.cpp | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/watchdog.cpp b/watchdog.cpp
-index aed0443..d529746 100644
---- a/watchdog.cpp
-+++ b/watchdog.cpp
-@@ -101,6 +101,8 @@ void Watchdog::timeOutHandler()
-         action = fallback->action;
-     }
- 
-+    WatchdogInherits::expiredTimerUse(WatchdogInherits::currentTimerUse());
-+
-     auto target = actionTargetMap.find(action);
-     if (target == actionTargetMap.end())
-     {
--- 
-2.7.4
-
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch
new file mode 100644
index 000000000..6e057f681
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog/0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch
@@ -0,0 +1,50 @@
+From 1c0e658833ea7595b2fb42261ce5e0ce781bac98 Mon Sep 17 00:00:00 2001
+From: Yong Li <yong.b.li@linux.intel.com>
+Date: Thu, 4 Apr 2019 18:24:54 +0800
+Subject: [PATCH] Add redfish log support for IPMI watchdog timeout actions
+
+The current plan is that only threshold sensor events
+will be logged to the IPMI SEL,
+and all other events will be logged to the Redfish Event Log.
+
+Tested:
+Config IPMI watchdog: OEM hard reset after 10 seconds:
+ipmitool raw 0x06 0x24 0x5 0x1 0x0 0x0 0x64 0x00
+Start watchdog:
+Ipmitool mc watchdog reset
+Check the redfish logs in 10 seconds:
+https://BMCIP/redfish/v1/Systems/system/LogServices/EventLog/Entries
+
+Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
+---
+ watchdog.cpp | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/watchdog.cpp b/watchdog.cpp
+index d529746..008cde5 100644
+--- a/watchdog.cpp
++++ b/watchdog.cpp
+@@ -1,5 +1,7 @@
+ #include "watchdog.hpp"
+ 
++#include <systemd/sd-journal.h>
++
+ #include <chrono>
+ #include <phosphor-logging/elog.hpp>
+ #include <phosphor-logging/log.hpp>
+@@ -115,6 +117,12 @@ void Watchdog::timeOutHandler()
+                          entry("ACTION=%s", convertForMessage(action).c_str()),
+                          entry("TARGET=%s", target->second.c_str()));
+ 
++        // Log into redfish event log
++        sd_journal_send("MESSAGE=IPMIWatchdog: Timed out ACTION=%s; TARGET=%s",
++                        convertForMessage(action).c_str(),
++                        target->second.c_str(), "PRIORITY=%i", LOG_INFO,
++                        "REDFISH_MESSAGE_ID=%s", "IPMIWatchdog", NULL);
++
+         try
+         {
+             auto method = bus.new_method_call(SYSTEMD_SERVICE, SYSTEMD_ROOT,
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend
index 5f8d53976..6411c209d 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/watchdog/phosphor-watchdog_%.bbappend
@@ -1,6 +1,6 @@
 FILESEXTRAPATHS_append := ":${THISDIR}/${PN}"
 
-SRC_URI += "file://0001-Add-expiredTimerUse-property-support.patch"
+SRC_URI += "file://0001-Add-redfish-log-support-for-IPMI-watchdog-timeout-ac.patch"
 
 # Remove the override to keep service running after DC cycle
 SYSTEMD_OVERRIDE_${PN}_remove = "poweron.conf:phosphor-watchdog@poweron.service.d/poweron.conf"
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0004-Implement-force-boot-to-bios-in-server-power-control.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0004-Implement-force-boot-to-bios-in-server-power-control.patch
new file mode 100644
index 000000000..0e2d400a3
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0004-Implement-force-boot-to-bios-in-server-power-control.patch
@@ -0,0 +1,199 @@
+From a4f948f98e9bfd8b019699b4e23281448f7b7313 Mon Sep 17 00:00:00 2001
+From: Kuiying Wang <kuiying.wang@intel.com>
+Date: Wed, 27 Mar 2019 19:35:12 +0800
+Subject: [PATCH] Implement force to BIOS
+
+UI page review use below link:
+https://projects.invisionapp.com/share/UER87D98GPM#/screens
+
+Tested:
+      Switch on "Boot To BIOS", could enter BIOS setup page directly
+      when power on system.
+
+Change-Id: Ib46dc5d84df51d31cc5ff8635fa0c0f52de0e194
+Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
+---
+ app/common/services/api-utils.js              | 49 +++++++++++++++++++
+ app/common/services/constants.js              |  4 ++
+ app/common/services/dataService.js            |  1 +
+ .../power-operations-controller.html          | 12 +++++
+ .../power-operations-controller.js            | 32 ++++++++++++
+ 5 files changed, 98 insertions(+)
+
+diff --git a/app/common/services/api-utils.js b/app/common/services/api-utils.js
+index 840db8e..193c172 100644
+--- a/app/common/services/api-utils.js
++++ b/app/common/services/api-utils.js
+@@ -31,6 +31,7 @@ window.angular && (function(angular) {
+         HOST_STATE: Constants.HOST_STATE,
+         LED_STATE: Constants.LED_STATE,
+         LED_STATE_TEXT: Constants.LED_STATE_TEXT,
++        FORCE_TO_BIOS_STATE_TEXT: Constants.FORCE_TO_BIOS_STATE_TEXT,
+         HOST_SESSION_STORAGE_KEY: Constants.API_CREDENTIALS.host_storage_key,
+         getChassisState: function() {
+           var deferred = $q.defer();
+@@ -451,6 +452,32 @@ window.angular && (function(angular) {
+                   });
+           return deferred.promise;
+         },
++        getForceToBIOSState: function() {
++          var deferred = $q.defer();
++
++          if (DataService.configJson.redfishSupportEnabled == true) {
++            $http({
++              method: 'GET',
++              url:
++                  DataService.getHost() + '/redfish/v1/Systems/system',
++              withCredentials: true
++            }).then(
++                    function(response) {
++                      var json = JSON.stringify(response.data);
++                      var content = JSON.parse(json);
++                      deferred.resolve(content.Boot.BootSourceOverrideTarget);
++                    },
++                    function(error) {
++                      console.log(error);
++                      deferred.reject(error);
++                    });
++          } else {
++            var err = "Redfish is not enabled!";
++            console.log(err);
++            deferred.reject(err);
++          }
++          return deferred.promise;
++        },
+         login: function(username, password, callback) {
+           $http({
+             method: 'POST',
+@@ -872,6 +899,28 @@ window.angular && (function(angular) {
+                     }
+                   });
+         },
++        setForceToBIOSState: function(state) {
++          if (DataService.configJson.redfishSupportEnabled == true) {
++            var data = JSON.stringify({'Boot':
++                                            {
++                                              'BootSourceOverrideTarget': state
++                                            }
++                                      });
++            return $http({
++              method: 'PATCH',
++              url:
++                  DataService.getHost() + '/redfish/v1/Systems/system',
++              withCredentials: true,
++              data: data
++            });
++          } else {
++            var deferred = $q.defer();
++            var err = "Redfish is not enabled!";
++            console.log(err);
++            deferred.reject(err);
++            return deferred.promise;
++          }
++        },
+         getLastRebootTime: function() {
+           return $http({
+                    method: 'GET',
+diff --git a/app/common/services/constants.js b/app/common/services/constants.js
+index 9931f01..8da0b12 100644
+--- a/app/common/services/constants.js
++++ b/app/common/services/constants.js
+@@ -38,6 +38,10 @@ window.angular && (function(angular) {
+       HOST_STATE: {on: 1, off: -1, error: 0, unreachable: -2},
+       LED_STATE: {on: true, off: false},
+       LED_STATE_TEXT: {on: 'on', off: 'off'},
++      FORCE_TO_BIOS_STATE_TEXT: {
++        on: 'BiosSetup',
++        off: 'None'
++      },
+       SEVERITY_TO_PRIORITY_MAP: {
+         Emergency: 'High',
+         Alert: 'High',
+diff --git a/app/common/services/dataService.js b/app/common/services/dataService.js
+index 76ab381..bcd7142 100644
+--- a/app/common/services/dataService.js
++++ b/app/common/services/dataService.js
+@@ -18,6 +18,7 @@ window.angular && (function(angular) {
+       this.server_status = -2;
+       this.chassis_state = 'On';
+       this.LED_state = Constants.LED_STATE_TEXT.off;
++      this.ForceToBIOS_state = Constants.FORCE_TO_BIOS_STATE_TEXT.off;
+       this.last_updated = new Date();
+ 
+       this.loading = false;
+diff --git a/app/server-control/controllers/power-operations-controller.html b/app/server-control/controllers/power-operations-controller.html
+index 3dc69d2..1f00f4a 100644
+--- a/app/server-control/controllers/power-operations-controller.html
++++ b/app/server-control/controllers/power-operations-controller.html
+@@ -10,6 +10,18 @@
+     <div class="row column">
+         <div id="power-indicator-bar" class="power__indicator-bar" ng-class="{'power__state-on': dataService.server_state == 'Running', 'power__state-off': dataService.server_state == 'Off', 'power__state-indet': dataService.server_state == 'Standby', 'power__state-error': dataService.server_state == 'Quiesced'}">
+             <p class="inline">{{dataService.hostname}} - {{dataService.server_id}}</p>
++              <div class="toggle float-right">
++                <input id="toggle__switch-round"
++                    class="toggle-switch toggle-switch__round-flat"
++                    type="checkbox"
++                    tabindex="0"
++                    ng-click="toggleForceToBIOS()"
++                    ng-checked="dataService.ForceToBIOS_state == 'BiosSetup'"
++                    ng-disabled="dataService.server_unreachable">
++                <label for="toggle__switch-round" tabindex="0"> </label>
++                <h3 class="inline">Boot to BIOS</h3>
++              </div>
++
+             <h3 class="power__state inline no-margin h3"><span>{{dataService.server_state | quiescedToError}}</span></h3>
+         </div>
+     </div>
+diff --git a/app/server-control/controllers/power-operations-controller.js b/app/server-control/controllers/power-operations-controller.js
+index 1a1f355..9a832e8 100644
+--- a/app/server-control/controllers/power-operations-controller.js
++++ b/app/server-control/controllers/power-operations-controller.js
+@@ -26,6 +26,17 @@ window.angular && (function(angular) {
+ 
+       var pollChassisStatusTimer = undefined;
+       var pollStartTime = null;
++      APIUtils.getForceToBIOSState().then(
++          function(data) {
++            if (data == APIUtils.FORCE_TO_BIOS_STATE_TEXT.on) {
++              dataService.ForceToBIOS_state = APIUtils.FORCE_TO_BIOS_STATE_TEXT.on;
++            } else {
++              dataService.ForceToBIOS_state = APIUtils.FORCE_TO_BIOS_STATE_TEXT.off;
++            }
++          },
++          function(error) {
++            console.log(JSON.stringify(error));
++          });
+ 
+       //@TODO: call api and get proper state
+ 
+@@ -50,6 +61,27 @@ window.angular && (function(angular) {
+             (dataService.server_state == 'Running') ? 'Off' : 'Running';
+       };
+ 
++      $scope.toggleForceToBIOS = function() {
++        var toggleState =
++            (dataService.ForceToBIOS_state == APIUtils.FORCE_TO_BIOS_STATE_TEXT.on) ?
++            APIUtils.FORCE_TO_BIOS_STATE_TEXT.off :
++            APIUtils.FORCE_TO_BIOS_STATE_TEXT.on;
++        dataService.ForceToBIOS_state =
++            (dataService.ForceToBIOS_state == APIUtils.FORCE_TO_BIOS_STATE_TEXT.on) ?
++            APIUtils.FORCE_TO_BIOS_STATE_TEXT.off :
++            APIUtils.FORCE_TO_BIOS_STATE_TEXT.on;
++        APIUtils.setForceToBIOSState(toggleState)
++            .then(
++                function(response) {},
++                function(errors) {
++                  toastService.error(
++                      'Failed to set Boot to BIOS ');
++                  console.log(JSON.stringify(errors));
++                  // Reload to get correct current state
++                  $route.reload();
++                })
++      };
++
+       $scope.powerOn = function() {
+         $scope.loading = true;
+         dataService.setUnreachableState();
+-- 
+2.19.1
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0007-Fix-some-page-keeps-loading-on-IE11.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0007-Fix-some-page-keeps-loading-on-IE11.patch
deleted file mode 100644
index 31d810cb6..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0007-Fix-some-page-keeps-loading-on-IE11.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 5a3750377629725890f949d68e7e0ba7d4752825 Mon Sep 17 00:00:00 2001
-From: Mirage Su <mirage.su@mic.com.tw>
-Date: Fri, 8 Mar 2019 17:12:46 +0800
-Subject: [PATCH] Fix some page keeps loading on IE11
-
----
- app/index.js      |  1 +
- package-lock.json | 19 +++++++++++++++++++
- package.json      |  1 +
- 3 files changed, 21 insertions(+)
- mode change 100644 => 100755 package-lock.json
-
-diff --git a/app/index.js b/app/index.js
-index c9fed83..c51203e 100644
---- a/app/index.js
-+++ b/app/index.js
-@@ -8,6 +8,7 @@
-  */
- import 'angular/angular-csp.css';
- import 'bootstrap/dist/css/bootstrap.css';
-+import 'babel-polyfill';
- 
- import angular from 'angular';
- import angular_animate from 'angular-animate';
-diff --git a/package-lock.json b/package-lock.json
-old mode 100644
-new mode 100755
-index 2d9d31b..61e9787
---- a/package-lock.json
-+++ b/package-lock.json
-@@ -1500,6 +1500,25 @@
-         "babel-runtime": "6.26.0"
-       }
-     },
-+    "babel-polyfill": {
-+      "version": "6.26.0",
-+      "resolved": "https://registry.npmjs.org/babel-polyfill/-/babel-polyfill-6.26.0.tgz",
-+      "integrity": "sha1-N5k3q8Z9eJWXCtxiHyhM2WbPIVM=",
-+      "dev": true,
-+      "requires": {
-+        "babel-runtime": "^6.26.0",
-+        "core-js": "^2.5.0",
-+        "regenerator-runtime": "^0.10.5"
-+      },
-+      "dependencies": {
-+        "regenerator-runtime": {
-+          "version": "0.10.5",
-+          "resolved": "https://registry.npmjs.org/regenerator-runtime/-/regenerator-runtime-0.10.5.tgz",
-+          "integrity": "sha1-M2w+/BIgrc7dosn6tntaeVWjNlg=",
-+          "dev": true
-+        }
-+      }
-+    },
-     "babel-register": {
-       "version": "6.26.0",
-       "resolved": "https://registry.npmjs.org/babel-register/-/babel-register-6.26.0.tgz",
-diff --git a/package.json b/package.json
-index 35c6b78..1bdf934 100644
---- a/package.json
-+++ b/package.json
-@@ -50,6 +50,7 @@
-     "autoprefixer": "9.1.5",
-     "babel-core": "6.26.3",
-     "babel-loader": "8.0.2",
-+    "babel-polyfill": "^6.26.0",
-     "compression-webpack-plugin": "2.0.0",
-     "copy-webpack-plugin": "4.5.2",
-     "csp-html-webpack-plugin": "^2.5.0",
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch
new file mode 100644
index 000000000..77bf662dc
--- /dev/null
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/0008-Pull-the-latest-novnc-package.patch
@@ -0,0 +1,88 @@
+From 7ea99450a96ac6eb5815ed5f1b7a17e055365b78 Mon Sep 17 00:00:00 2001
+From: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+Date: Sat, 6 Apr 2019 00:15:04 -0700
+Subject: [PATCH] Pull the latest novnc package
+
+Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
+---
+ package-lock.json | 18 +++++++++++-------
+ package.json      |  2 +-
+ 2 files changed, 12 insertions(+), 8 deletions(-)
+
+diff --git a/package-lock.json b/package-lock.json
+index c79a26c8229c..337383551a96 100644
+--- a/package-lock.json
++++ b/package-lock.json
+@@ -808,9 +808,8 @@
+       }
+     },
+     "@novnc/novnc": {
+-      "version": "1.0.0",
+-      "resolved": "https://registry.npmjs.org/@novnc/novnc/-/novnc-1.0.0.tgz",
+-      "integrity": "sha1-drDonm+HOMqBVBlbr1uOaoC8kQU="
++      "version": "git+https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5",
++      "from": "git+https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5"
+     },
+     "@types/node": {
+       "version": "10.12.18",
+@@ -3965,7 +3964,8 @@
+         "ansi-regex": {
+           "version": "2.1.1",
+           "bundled": true,
+-          "dev": true
++          "dev": true,
++          "optional": true
+         },
+         "aproba": {
+           "version": "1.2.0",
+@@ -4380,7 +4380,8 @@
+         "safe-buffer": {
+           "version": "5.1.1",
+           "bundled": true,
+-          "dev": true
++          "dev": true,
++          "optional": true
+         },
+         "safer-buffer": {
+           "version": "2.1.2",
+@@ -4436,6 +4437,7 @@
+           "version": "3.0.1",
+           "bundled": true,
+           "dev": true,
++          "optional": true,
+           "requires": {
+             "ansi-regex": "2.1.1"
+           }
+@@ -4479,12 +4481,14 @@
+         "wrappy": {
+           "version": "1.0.2",
+           "bundled": true,
+-          "dev": true
++          "dev": true,
++          "optional": true
+         },
+         "yallist": {
+           "version": "3.0.2",
+           "bundled": true,
+-          "dev": true
++          "dev": true,
++          "optional": true
+         }
+       }
+     },
+diff --git a/package.json b/package.json
+index 0a880571d617..be816c8ece03 100644
+--- a/package.json
++++ b/package.json
+@@ -30,7 +30,7 @@
+   "dependencies": {
+     "angular": "^1.7.5",
+     "angular-animate": "^1.7.5",
+-    "@novnc/novnc": "^1.0.0",
++    "@novnc/novnc": "https://github.com/novnc/noVNC.git#a136b4b078e8ac316b80d1ee24cf8f9b400ba2d5",
+     "angular-clipboard": "^1.6.2",
+     "angular-cookies": "^1.7.5",
+     "angular-messages": "^1.7.6",
+-- 
+2.7.4
+
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json
deleted file mode 100644
index 1543a6249..000000000
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui/config.json
+++ /dev/null
@@ -1,8 +0,0 @@
-{
-  "customKeyEnable": true,
-  "keyType" : "VT100+",
-  "customConsoleDisplaySize": {
-    "width": 100,
-    "height": 32
-  }
-}
diff --git a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
index 9caa37767..9248894f7 100644
--- a/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
+++ b/meta-openbmc-mods/meta-common/recipes-phosphor/webui/phosphor-webui_%.bbappend
@@ -1,13 +1,9 @@
 FILESEXTRAPATHS_append := ":${THISDIR}/${PN}"
 
 #SRC_URI = "git://github.com/openbmc/phosphor-webui.git"
-SRCREV = "a2e36e0f479d1a9fa2b6d26448d5e070aea7259b"
+SRCREV = "4733a11b42fca6013e3957bf0e345d0cea086d96"
 
 SRC_URI += "file://0001-Implement-KVM-in-webui.patch \
-            file://config.json \
-            file://0007-Fix-some-page-keeps-loading-on-IE11.patch \
+            file://0004-Implement-force-boot-to-bios-in-server-power-control.patch \
+            file://0008-Pull-the-latest-novnc-package.patch \
             "
-
-do_compile_prepend() {
-        cp -r ${WORKDIR}/config.json ${S}/
-}
diff --git a/meta-openbmc-mods/meta-common/recipes-support/libgpiod/libgpiod/0001-Add-pass-through-setting-in-gpioset.patch b/meta-openbmc-mods/meta-common/recipes-support/libgpiod/libgpiod/0001-Add-pass-through-setting-in-gpioset.patch
index b90d42ca3..b9082468c 100644
--- a/meta-openbmc-mods/meta-common/recipes-support/libgpiod/libgpiod/0001-Add-pass-through-setting-in-gpioset.patch
+++ b/meta-openbmc-mods/meta-common/recipes-support/libgpiod/libgpiod/0001-Add-pass-through-setting-in-gpioset.patch
@@ -1,19 +1,20 @@
-From 380a088dbe9fdd69e98bf6da8086e3d664da8338 Mon Sep 17 00:00:00 2001
-From: Kuiying Wang <kuiying.wang@intel.com>
-Date: Thu, 31 Jan 2019 22:28:48 +0800
-Subject: [PATCH] Add pass through setting in gpioset
+From 0c393ec7a71f21506334caa3a321fa013a9723ef Mon Sep 17 00:00:00 2001
+From: Ed Tanous <ed.tanous@intel.com>
+Date: Mon, 8 Apr 2019 11:46:09 -0700
+Subject: [PATCH] [PATCH] Add pass through setting in gpioset
 
 Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
+Signed-off-by: Ed Tanous <ed.tanous@intel.com>
 ---
  aclocal.m4            |  2 +-
  configure             |  2 +-
  include/gpiod.h       | 10 ++++++++--
- src/lib/core.c        | 13 +++++++------
- src/lib/ctxless.c     |  8 ++++----
- src/lib/helpers.c     |  3 ++-
- src/tools/gpioset.c   | 13 +++++++++----
+ lib/core.c            | 13 +++++++------
+ lib/ctxless.c         |  8 +++++---
+ lib/helpers.c         |  3 ++-
  tests/tests-ctxless.c |  2 +-
- 8 files changed, 33 insertions(+), 20 deletions(-)
+ tools/gpioset.c       | 13 +++++++++----
+ 8 files changed, 34 insertions(+), 19 deletions(-)
 
 diff --git a/aclocal.m4 b/aclocal.m4
 index b0db596..a5e28ad 100644
@@ -29,10 +30,10 @@ index b0db596..a5e28ad 100644
  dnl require some minimum version.  Point them to the right macro.
  m4_if([$1], [1.15], [],
 diff --git a/configure b/configure
-index 3d44cd1..d218338 100755
+index f5a0a23..c0cdbf1 100755
 --- a/configure
 +++ b/configure
-@@ -2477,7 +2477,7 @@ ac_configure="$SHELL $ac_aux_dir/configure"  # Please don't use this var.
+@@ -2484,7 +2484,7 @@ ac_configure="$SHELL $ac_aux_dir/configure"  # Please don't use this var.
  
  
  
@@ -42,7 +43,7 @@ index 3d44cd1..d218338 100755
  # Find a good install program.  We prefer a C program (faster),
  # so one script is as good as another.  But avoid the broken or
 diff --git a/include/gpiod.h b/include/gpiod.h
-index ccff977..0f935e6 100644
+index 2679478..7b5c186 100644
 --- a/include/gpiod.h
 +++ b/include/gpiod.h
 @@ -121,6 +121,7 @@ typedef void (*gpiod_ctxless_set_value_cb)(void *);
@@ -97,11 +98,11 @@ index ccff977..0f935e6 100644
  };
  
  /**
-diff --git a/src/lib/core.c b/src/lib/core.c
-index 4f273e3..feec362 100644
---- a/src/lib/core.c
-+++ b/src/lib/core.c
-@@ -472,7 +472,6 @@ static int line_request_values(struct gpiod_line_bulk *bulk,
+diff --git a/lib/core.c b/lib/core.c
+index 05e5a46..635569c 100644
+--- a/lib/core.c
++++ b/lib/core.c
+@@ -470,7 +470,6 @@ static int line_request_values(struct gpiod_line_bulk *bulk,
  	struct gpiohandle_request req;
  	unsigned int i;
  	int rv, fd;
@@ -109,7 +110,7 @@ index 4f273e3..feec362 100644
  	if ((config->request_type != GPIOD_LINE_REQUEST_DIRECTION_OUTPUT) &&
  	    (config->flags & (GPIOD_LINE_REQUEST_FLAG_OPEN_DRAIN |
  			      GPIOD_LINE_REQUEST_FLAG_OPEN_SOURCE))) {
-@@ -499,14 +498,15 @@ static int line_request_values(struct gpiod_line_bulk *bulk,
+@@ -497,14 +496,15 @@ static int line_request_values(struct gpiod_line_bulk *bulk,
  		req.flags |= GPIOHANDLE_REQUEST_INPUT;
  	else if (config->request_type == GPIOD_LINE_REQUEST_DIRECTION_OUTPUT)
  		req.flags |= GPIOHANDLE_REQUEST_OUTPUT;
@@ -129,7 +130,7 @@ index 4f273e3..feec362 100644
  			req.default_values[i] = !!default_vals[i];
  	}
  
-@@ -617,7 +617,8 @@ static bool line_request_is_direction(int request)
+@@ -615,7 +615,8 @@ static bool line_request_is_direction(int request)
  {
  	return request == GPIOD_LINE_REQUEST_DIRECTION_AS_IS ||
  	       request == GPIOD_LINE_REQUEST_DIRECTION_INPUT ||
@@ -139,10 +140,10 @@ index 4f273e3..feec362 100644
  }
  
  static bool line_request_is_events(int request)
-diff --git a/src/lib/ctxless.c b/src/lib/ctxless.c
-index 0009504..a16207e 100644
---- a/src/lib/ctxless.c
-+++ b/src/lib/ctxless.c
+diff --git a/lib/ctxless.c b/lib/ctxless.c
+index ba85018..88b0388 100644
+--- a/lib/ctxless.c
++++ b/lib/ctxless.c
 @@ -76,17 +76,17 @@ int gpiod_ctxless_get_value_multiple(const char *device,
  }
  
@@ -164,20 +165,20 @@ index 0009504..a16207e 100644
  				     gpiod_ctxless_set_value_cb cb, void *data)
  {
  	struct gpiod_line_bulk bulk;
-@@ -117,7 +117,7 @@ int gpiod_ctxless_set_value_multiple(const char *device,
- 	}
+@@ -118,6 +118,8 @@ int gpiod_ctxless_set_value_multiple(const char *device,
  
  	flags = active_low ? GPIOD_LINE_REQUEST_FLAG_ACTIVE_LOW : 0;
--
+ 
 +	flags |= pass_through ? GPIOD_LINE_REQUEST_FLAG_PASS_THROUGH : 0;
- 	status = gpiod_line_request_bulk_output_flags(&bulk, consumer,
- 						      flags, values);
- 	if (status < 0) {
-diff --git a/src/lib/helpers.c b/src/lib/helpers.c
-index 80b8eff..807fb93 100644
---- a/src/lib/helpers.c
-+++ b/src/lib/helpers.c
-@@ -362,7 +362,8 @@ int gpiod_line_request_bulk_output_flags(struct gpiod_line_bulk *bulk,
++
+ 	rv = gpiod_line_request_bulk_output_flags(&bulk, consumer,
+ 						  flags, values);
+ 	if (rv < 0) {
+diff --git a/lib/helpers.c b/lib/helpers.c
+index 479f370..7b2884f 100644
+--- a/lib/helpers.c
++++ b/lib/helpers.c
+@@ -360,7 +360,8 @@ int gpiod_line_request_bulk_output_flags(struct gpiod_line_bulk *bulk,
  		.request_type = GPIOD_LINE_REQUEST_DIRECTION_OUTPUT,
  		.flags = flags,
  	};
@@ -187,10 +188,23 @@ index 80b8eff..807fb93 100644
  	return gpiod_line_request_bulk(bulk, &config, default_vals);
  }
  
-diff --git a/src/tools/gpioset.c b/src/tools/gpioset.c
-index fb012fa..d5f0b77 100644
---- a/src/tools/gpioset.c
-+++ b/src/tools/gpioset.c
+diff --git a/tests/tests-ctxless.c b/tests/tests-ctxless.c
+index 638274f..b215f9c 100644
+--- a/tests/tests-ctxless.c
++++ b/tests/tests-ctxless.c
+@@ -20,7 +20,7 @@ static void ctxless_set_get_value(void)
+ 	TEST_ASSERT_EQ(rv, 0);
+ 
+ 	rv = gpiod_ctxless_set_value(test_chip_name(0), 3, 1,
+-				     false, TEST_CONSUMER, NULL, NULL);
++				     false, false, TEST_CONSUMER, NULL, NULL);
+ 	TEST_ASSERT_RET_OK(rv);
+ 
+ 	rv = gpiod_ctxless_get_value(test_chip_name(0), 3,
+diff --git a/tools/gpioset.c b/tools/gpioset.c
+index d9977a7..094d609 100644
+--- a/tools/gpioset.c
++++ b/tools/gpioset.c
 @@ -22,7 +22,8 @@
  static const struct option longopts[] = {
  	{ "help",		no_argument,		NULL,	'h' },
@@ -221,15 +235,15 @@ index fb012fa..d5f0b77 100644
  	printf("  -m, --mode=[exit|wait|time|signal] (defaults to 'exit'):\n");
  	printf("		tell the program what to do after setting values\n");
  	printf("  -s, --sec=SEC:\tspecify the number of seconds to wait (only valid for --mode=time)\n");
-@@ -179,6 +181,7 @@ int main(int argc, char **argv)
- 	int *values, status, optc, opti;
+@@ -185,6 +187,7 @@ int main(int argc, char **argv)
+ 	int *values, rv, optc, opti;
  	struct callback_data cbdata;
  	bool active_low = false;
 +	bool pass_through = false;
  	char *device, *end;
  
  	memset(&cbdata, 0, sizeof(cbdata));
-@@ -197,6 +200,8 @@ int main(int argc, char **argv)
+@@ -203,6 +206,8 @@ int main(int argc, char **argv)
  			return EXIT_SUCCESS;
  		case 'l':
  			active_low = true;
@@ -238,28 +252,15 @@ index fb012fa..d5f0b77 100644
  			break;
  		case 'm':
  			mode = parse_mode(optarg);
-@@ -263,7 +268,7 @@ int main(int argc, char **argv)
+@@ -269,7 +274,7 @@ int main(int argc, char **argv)
  	}
  
- 	status = gpiod_ctxless_set_value_multiple(device, offsets, values,
--						  num_lines, active_low,
-+						  num_lines, active_low, pass_through,
- 						  "gpioset", mode->callback,
- 						  &cbdata);
- 	if (status < 0)
-diff --git a/tests/tests-ctxless.c b/tests/tests-ctxless.c
-index ea9403d..228c49d 100644
---- a/tests/tests-ctxless.c
-+++ b/tests/tests-ctxless.c
-@@ -20,7 +20,7 @@ static void ctxless_set_get_value(void)
- 	TEST_ASSERT_EQ(ret, 0);
- 
- 	ret = gpiod_ctxless_set_value(test_chip_name(0), 3, 1,
--				      false, TEST_CONSUMER, NULL, NULL);
-+				      false, false, TEST_CONSUMER, NULL, NULL);
- 	TEST_ASSERT_RET_OK(ret);
- 
- 	ret = gpiod_ctxless_get_value(test_chip_name(0), 3,
+ 	rv = gpiod_ctxless_set_value_multiple(device, offsets, values,
+-					      num_lines, active_low, "gpioset",
++					      num_lines, active_low, pass_through, "gpioset",
+ 					      mode->callback, &cbdata);
+ 	if (rv < 0)
+ 		die_perror("error setting the GPIO line values");
 -- 
-2.19.1
+2.17.1
 
diff --git a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c
index 2cdf66d88..467231372 100644
--- a/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c
+++ b/meta-openbmc-mods/meta-common/recipes-utilities/lpc-cmds/files/lpc_cmds.c
@@ -302,6 +302,25 @@ static void SIOGetPWRBTNOverride(unsigned short clear)
 	close(fd);
 }
 
+static void SIOGetPFailStatus()
+{
+	int fd;
+	struct sio_ioctl_data sio_data;
+
+	fd = open(SIO_DEVICE_NAME, O_RDWR | O_CLOEXEC);
+	if (fd < 0) {
+		printf("Error open %s\n", SIO_DEVICE_NAME);
+		exit(1);
+	}
+
+	sio_data.sio_cmd = SIO_GET_PFAIL_STATUS;
+
+	if (ioctl(fd, SIO_IOC_COMMAND, &sio_data) == 0)
+		printf("PFail status : %u\n", sio_data.data);
+
+	close(fd);
+}
+
 /*********************************************************************************/
 
 #if SUPPORT_MAILBOX
@@ -370,6 +389,7 @@ static void usage(void)
 	       "\tlpc_cmds sio set_onctl_gpio_low\n"
 	       "\tlpc_cmds sio get_pwrbtn_override_status\n"
 	       "\tlpc_cmds sio get_pwrbtn_override_status_clear\n"
+	       "\tlpc_cmds sio get_pfail_status\n"
 	       "\n"
 #if SUPPORT_KCS_ADDR_CMD
 	       "\tlpc_cmds kcs [1 ~ 4] (getaddr / setaddr / quiet)\n"
@@ -423,6 +443,8 @@ int main(int argc, char** argv)
 			SIOGetPWRBTNOverride(0);
 		else if (strcmp(argv[2], "get_pwrbtn_override_status_clear") == 0)
 			SIOGetPWRBTNOverride(1);
+		else if (strcmp(argv[2], "get_pfail_status") == 0)
+			SIOGetPFailStatus();
 	} else if (strcmp(cmd, "kcs") == 0) {
 		int ifc;
 
diff --git a/meta-openbmc-mods/meta-wolfpass/conf/layer.conf b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
index a9a90e1ae..2d85bfdce 100644
--- a/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
+++ b/meta-openbmc-mods/meta-wolfpass/conf/layer.conf
@@ -9,4 +9,4 @@ BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \
 BBFILE_COLLECTIONS += "wolfpass"
 BBFILE_PATTERN_wolfpass = ""
 BBFILE_PRIORITY_wolfpass = "6"
-LAYERSERIES_COMPAT_wolfpass = "thud"
+LAYERSERIES_COMPAT_wolfpass = "warrior"
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh b/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
index 3fbe5e7c6..2b9ef6876 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-intel/temporary/set-passthrough/set-passthrough.sh
@@ -23,6 +23,9 @@ typeset -i value=$( echo $(( $var )) )
 
 if [[ $1 == "0" ]]; then
     value=$((value & ~PASSTHROUGH_ENABLE))
+    # Mark the gpio reset out & power up pin as released
+    echo "1" > /sys/class/gpio/gpio33/value
+    echo "1" > /sys/class/gpio/gpio35/value
 fi
 
 if [[ $1 == "1" ]]; then
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
index 9b4d9bbc7..2a3f547d5 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0001-Create-intel-purley-dts.patch
@@ -1,4 +1,4 @@
-From f631d7dc034be1de17213b1498651ad37f3ce98b Mon Sep 17 00:00:00 2001
+From 7bee096fd87485d1095c6b6940b62681ff873045 Mon Sep 17 00:00:00 2001
 From: Yuan Li <yuan.li@linux.intel.com>
 Date: Tue, 19 Sep 2017 15:55:39 +0800
 Subject: [PATCH] ARM: dts: purley: Merge all dts node in the unified patch.
@@ -22,22 +22,23 @@ The below changes to the dts file are merged together:
 * enable high speed uart clock
 * timer pwm
 * cpu0/1fault LEDs
+* i2c9 for SPD on WP / Disable beeper and timer-pwm
 
 Signed-off-by: Yuan Li <yuan.li@linux.intel.com>
 Signed-off-by: Yong Li <yong.b.li@linux.intel.com>
 Signed-off-by: James Feist <james.feist@linux.intel.com>
 Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
 ---
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 346 ++++++++++++++++++++++++++
- 1 file changed, 346 insertions(+)
+ arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 358 ++++++++++++++++++++++++++
+ 1 file changed, 358 insertions(+)
  create mode 100644 arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
 
 diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
 new file mode 100644
-index 000000000000..144d59642a71
+index 000000000000..432f10186547
 --- /dev/null
 +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -0,0 +1,346 @@
+@@ -0,0 +1,358 @@
 +/dts-v1/;
 +
 +#include "aspeed-g5.dtsi"
@@ -72,7 +73,14 @@ index 000000000000..144d59642a71
 +		};
 +
 +		gfx_memory: framebuffer {
-+			size = <0x04000000>;
++			size = <0x01000000>;
++			alignment = <0x01000000>;
++			compatible = "shared-dma-pool";
++			reusable;
++		};
++
++		video_engine_memory: jpegbuffer {
++			size = <0x02000000>;	/* 32MM */
 +			alignment = <0x01000000>;
 +			compatible = "shared-dma-pool";
 +			reusable;
@@ -119,10 +127,10 @@ index 000000000000..144d59642a71
 +		};
 +	};
 +
-+	beeper {
-+		compatible = "pwm-beeper";
-+		pwms = <&timer 5 1000000 0>;
-+	};
++	//beeper {
++	//	compatible = "pwm-beeper";
++	//	pwms = <&timer 5 1000000 0>;
++	//};
 +};
 +
 +&fmc {
@@ -310,6 +318,11 @@ index 000000000000..144d59642a71
 +	status = "okay";
 +};
 +
++&i2c9 {
++	multi-master;
++	status = "okay";
++};
++
 +&gfx {
 +	status = "okay";
 +	memory-region = <&gfx_memory>;
@@ -362,23 +375,23 @@ index 000000000000..144d59642a71
 +
 +};
 +
-+&timer {
-+/*
-+ *	Available settings:
-+ *	fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
-+ *	pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
-+ *			&pinctrl_timer7_default &pinctrl_timer8_default>;
-+ */
-+	fttmr010,pwm-outputs = <5>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_timer5_default>;
-+	#pwm-cells = <3>;
-+	status = "okay";
-+};
++//&timer {
++///*
++// *	Available settings:
++// *	fttmr010,pwm-outputs = <5>, <6>, <7>, <8>;
++// *	pinctrl-0 = <&pinctrl_timer5_default &pinctrl_timer6_default
++// *			&pinctrl_timer7_default &pinctrl_timer8_default>;
++// */
++//	fttmr010,pwm-outputs = <5>;
++//	pinctrl-names = "default";
++//	pinctrl-0 = <&pinctrl_timer5_default>;
++//	#pwm-cells = <3>;
++//	status = "okay";
++//};
 +
 +&video {
 +	status = "okay";
-+	memory-region = <&gfx_memory>;
++	memory-region = <&video_engine_memory>;
 +};
 +
 +&vhub {
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
index 63e8b2006..7055ee575 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0002-Define-the-gpio-line-names-property-for-purley-platform.patch
@@ -1,4 +1,4 @@
-From 971b69835fcafbac02adf828a744af541c7554d0 Mon Sep 17 00:00:00 2001
+From d36b385e17eb21c305200048007d3cc6ad38f072 Mon Sep 17 00:00:00 2001
 From: Kuiying Wang <kuiying.wang@intel.com>
 Date: Wed, 19 Sep 2018 17:51:06 +0800
 Subject: [PATCH] Define the gpio-line-names property for purley platform
@@ -15,14 +15,14 @@ defined following gpios.
 
 Signed-off-by: Kuiying Wang <kuiying.wang@intel.com>
 ---
- arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 29 +++++++++++++++++++
+ arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 29 +++++++++++++++++++++++++++
  1 file changed, 29 insertions(+)
 
 diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 1c9aed9fcf94..9e187453750f 100644
+index 144d59642a71..8aba46cdce46 100644
 --- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
 +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -91,6 +91,35 @@
+@@ -117,6 +117,35 @@
  
  &gpio {
  	status = "okay";
@@ -59,5 +59,5 @@ index 1c9aed9fcf94..9e187453750f 100644
  
  &kcs3 {
 -- 
-2.17.0
+2.7.4
 
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
index dd56cab4b..2593ee8f6 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0003-Leave-GPIOE-in-passthrough-after-boot.patch
@@ -1,7 +1,7 @@
-From 769b30d1b5463291ddffd46f6039321d42f80417 Mon Sep 17 00:00:00 2001
+From c11a8ffcea24352579614d13d13ac4bda9a965cf Mon Sep 17 00:00:00 2001
 From: James Feist <james.feist@linux.intel.com>
 Date: Mon, 5 Nov 2018 15:38:19 -0800
-Subject: [PATCH 1/1] Leave GPIOE in passthrough after boot
+Subject: [PATCH] Leave GPIOE in passthrough after boot
 
 This is a temporary patch that seems to leave exported
 gpio in passthrough mode. It's hard to understand why this
@@ -16,11 +16,11 @@ change that can get us the correct result in the short term.
 
 Signed-off-by: James Feist <james.feist@linux.intel.com>
 ---
- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 8 ++++----
+ drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
-index 0c89647f166f..386ae967835d 100644
+index 187abd7693cf..4230e1038a88 100644
 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
 +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
 @@ -246,7 +246,7 @@ FUNC_GROUP_DECL(GPID6, G18, C21);
@@ -42,5 +42,5 @@ index 0c89647f166f..386ae967835d 100644
  #define F18 34
  SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
 -- 
-2.17.1
+2.7.4
 
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
index 6d92227c7..03b4f4da4 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-kernel/linux/linux-aspeed/0005-128MB-flashmap-for-PFR.patch
@@ -1,4 +1,4 @@
-From 0b3a20690483d3a04cb10d785b33f01b9bf4079d Mon Sep 17 00:00:00 2001
+From ddfbe1364c6ecf77f06990e6550dfe5a3791e6bf Mon Sep 17 00:00:00 2001
 From: Vikram Bodireddy <vikram.bodireddy@intel.com>
 Date: Wed, 6 Feb 2019 15:59:34 +0530
 Subject: [PATCH] Selecting 128MB for PFR
@@ -7,17 +7,16 @@ PFR platforms requires 128MB flash mapping.
 This will override the existing 64MB flash map
 and loads 128MB flash map.
 
-Change-Id: If42805139d86061bd409915e8fc6374d6cf69147
 Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com>
 ---
  arch/arm/boot/dts/aspeed-bmc-intel-purley.dts | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-index 20cc204..aab14fd 100644
+index 8aba46cdce46..6959a06d04e2 100644
 --- a/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
 +++ b/arch/arm/boot/dts/aspeed-bmc-intel-purley.dts
-@@ -79,7 +79,7 @@
+@@ -90,7 +90,7 @@
  	flash@0 {
  		status = "okay";
  		m25p,fast-read;
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json
new file mode 100644
index 000000000..48cb80795
--- /dev/null
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/CYP-baseboard.json
@@ -0,0 +1,26 @@
+{
+    "Exposes": [
+        {
+            "Direction": "Input",
+            "Index": 143,
+            "Name": "Chassis Intrusion GPIO",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "BindGpioIntrusion": "Chassis Intrusion GPIO",
+            "Class": "Gpio",
+            "Name": "Chassis Intrusion Sensor",
+            "Type": "ChassisIntrusionSensor"
+        }
+    ],
+    "Name": "CYP Baseboard",
+    "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*CYP'})",
+    "Type": "Board",
+    "xyz.openbmc_project.Inventory.Decorator.Asset": {
+        "Manufacturer": "$PRODUCT_MANUFACTURER",
+        "Model": "$PRODUCT_PRODUCT_NAME",
+        "PartNumber": "$PRODUCT_PART_NUMBER",
+        "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
+    }
+}
+\ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
index 726ff100c..be0d583a6 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/FCXXPDBASSMBL_PDB.json
@@ -66,6 +66,12 @@
                 "Type": "TMP75"
             },
             {
+                "Address": "0x18",
+                "Bus": "$bus",
+                "Name": "Multi Node Presence Detector",
+                "Type": "MultiNode"
+            },
+            {
                 "Address": "$address",
                 "Bus": "$bus",
                 "Name": "FCXXPDBASSMBL Fru",
@@ -73,8 +79,8 @@
             }
         ],
         "Name": "FCXXPDBASSMBL PDB",
-        "Type": "Board",
         "Probe": "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL', 'ADDRESS' : 85})",
+        "Type": "Board",
         "xyz.openbmc_project.Inventory.Decorator.Asset": {
             "Manufacturer": "$BOARD_MANUFACTURER",
             "Model": "$BOARD_PRODUCT_NAME",
@@ -82,4 +88,4 @@
             "SerialNumber": "$BOARD_SERIAL_NUMBER"
         }
     }
-]
+]
+\ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
index 38c661ed6..7b86bfae0 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/OPB2RH-Chassis.json
@@ -1,18 +1,19 @@
 {
     "Exposes": [
-
+        {
+            "Name": "Multi Node Supported",
+            "Type": "MultiNode"
+        }
     ],
     "Name": "OPB2RH Chassis",
-    "Type": "Chassis",
     "Probe": [
-        "FOUND('TNP Baseboard')",
-        "AND",
         "xyz.openbmc_project.FruDevice({'BOARD_PRODUCT_NAME': 'FCXXPDBASSMBL'})"
     ],
+    "Type": "Chassis",
     "xyz.openbmc_project.Inventory.Decorator.Asset": {
         "Manufacturer": "Intel Corporation",
         "Model": "OPB2RH",
         "PartNumber": "R1234",
         "SerialNumber": "12345"
     }
-}
+}
+\ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
index 01b899061..44590788d 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/TNP-baseboard.json
@@ -1,1945 +1,1969 @@
-{
-    "Exposes": [
-        {
-            "Address": "0x4A",
-            "Bus": 6,
-            "Name": "BMC Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "TMP75"
-        },
-        {
-            "Index": 0,
-            "Name": "Baseboard 12 Volt",
-            "PowerState": "On",
-            "ScaleFactor": 0.1124,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 13.494
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 13.101
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 10.945
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 10.616
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Name": "CPU 1 Fan Connector",
-            "Pwm": 7,
-            "Status": "disabled",
-            "Tachs": [
-                13
-            ],
-            "Type": "IntelFanConnector"
-        },
-        {
-            "Name": "CPU 2 Fan Connector",
-            "Pwm": 8,
-            "Status": "disabled",
-            "Tachs": [
-                14
-            ],
-            "Type": "IntelFanConnector"
-        },
-        {
-            "Address": "0x49",
-            "Bus": 6,
-            "Name": "Left Rear Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "TMP75"
-        },
-        {
-            "Index": 4,
-            "Name": "P0V83_LAN_AUX",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 0.901
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 0.875
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 0.786
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0.763
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 3,
-            "Name": "P105_PCH_AUX",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.139
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.106
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 0.995
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0.966
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 5,
-            "Name": "P12V_AUX",
-            "ScaleFactor": 0.1124,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 13.494
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 13.101
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 10.945
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 10.616
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 6,
-            "Name": "P1V8_PCH",
-            "ScaleFactor": 0.7505,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.961
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.904
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.699
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.648
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 1,
-            "Name": "P3V3",
-            "PowerState": "On",
-            "ScaleFactor": 0.4107,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 3.647
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 3.541
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 3.066
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 2.974
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 7,
-            "Name": "P3VBAT",
-            "ScaleFactor": 0.3333,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 3.296
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 3.263
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 2.457
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 2.138
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 8,
-            "Name": "PVCCIN_CPU0",
-            "PowerState": "On",
-            "ScaleFactor": 0.7505,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 2.151
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 2.088
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.418
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.376
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 9,
-            "Name": "PVCCIN_CPU1",
-            "PowerState": "On",
-            "ScaleFactor": 0.7505,
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 2.151
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 2.088
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.418
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.376
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 14,
-            "Name": "PVCCIO_CPU0",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.19
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.155
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 0.752
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0.729
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 15,
-            "Name": "PVCCIO_CPU1",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.19
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.155
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 0.752
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0.729
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 10,
-            "Name": "PVDQ_ABCD_CPU0",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.301
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.263
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.138
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.104
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 12,
-            "Name": "PVDQ_ABCD_CPU1",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.301
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.263
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.138
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.104
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 11,
-            "Name": "PVDQ_EFGH_CPU0",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.301
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.263
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.138
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.104
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 13,
-            "Name": "PVDQ_EFGH_CPU1",
-            "PowerState": "On",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.301
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.263
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 1.138
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 1.104
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Index": 2,
-            "Name": "PVNN_PCH_AUX",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 1.081
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 1.049
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 0.807
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0.783
-                }
-            ],
-            "Type": "ADC"
-        },
-        {
-            "Address": "0x4D",
-            "Bus": 6,
-            "Name": "Right Rear Board Temp",
-            "Name1": "Right Rear TMP421 Internal Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "TMP421"
-        },
-        {
-            "Address": "0x48",
-            "Bus": 6,
-            "Name": "Voltage Regulator 1 Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "TMP75"
-        },
-        {
-            "Address": "0x4B",
-            "Bus": 6,
-            "Name": "Voltage Regulator 2 Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "TMP75"
-        },
-        {
-            "Address": "0x30",
-            "Bus": 0,
-            "CpuID": 0,
-            "Name": "Skylake CPU 0",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Label": "DIMM",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 99
-                },
-                {
-                    "Direction": "greater than",
-                    "Label": "DIMM",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 89
-                }
-            ],
-            "Type": "SkylakeCPU"
-        },
-        {
-            "Address": "0x31",
-            "Bus": 0,
-            "CpuID": 1,
-            "Name": "Skylake CPU 1",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Label": "DIMM",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 99
-                },
-                {
-                    "Direction": "greater than",
-                    "Label": "DIMM",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 89
-                }
-            ],
-            "Type": "SkylakeCPU"
-        },
-        {
-            "Direction": "In",
-            "Index": 32,
-            "Name": "Reset Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 33,
-            "Name": "Reset Out",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Both",
-            "Index": 34,
-            "Name": "Power Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Both",
-            "Index": 35,
-            "Name": "Power Up",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 40,
-            "Name": "NMI Out",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 50,
-            "Name": "PCH Thermaltrip",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 51,
-            "Name": "Lcp Enter Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 52,
-            "Name": "Lcp Left Button",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 53,
-            "Name": "Lcp Right Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 49,
-            "Name": "Cpu Caterr",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 48,
-            "Name": "Cpu Err2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 63,
-            "Name": "PU 240VA Status",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 208,
-            "Name": "P3v3bat BridgeEn",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 214,
-            "Name": "Nmi Button",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 215,
-            "Name": "Post complete",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 217,
-            "Name": "Nmi Button",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 218,
-            "Name": "ID Button",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 219,
-            "Name": "Power Good",
-            "Polarity": "High",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 232,
-            "Name": "Post Complete led0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 233,
-            "Name": "Post Complete led1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 233,
-            "Name": "CPU1 Thermaltrip",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 234,
-            "Name": "Post Complete led2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 234,
-            "Name": "CPU1 VR Hot",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 235,
-            "Name": "Post Complete led3",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 236,
-            "Name": "Post Complete led4",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 236,
-            "Name": "CPU1 Mem VR Hot1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 237,
-            "Name": "Post Complete led5",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 237,
-            "Name": "CPU1 Mem VR Hot2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 238,
-            "Name": "Post Complete led6",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 239,
-            "Name": "Post Complete led7",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 232,
-            "Name": "CPU1 Present",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 235,
-            "Name": "CPU1 FIVR Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 238,
-            "Name": "CPU1 ID0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 240,
-            "Name": "CPU1 CH1 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 240,
-            "Name": "CPU1 Mismatch",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 241,
-            "Name": "CPU1 CH1 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 241,
-            "Name": "CPU1 DIMM Thermaltrip",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 242,
-            "Name": "CPU1 CH2 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 242,
-            "Name": "CPU2 Present",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 243,
-            "Name": "CPU1 CH2 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 243,
-            "Name": "CPU2 Thermaltrip",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 244,
-            "Name": "CPU1 CH3 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 244,
-            "Name": "CPU2 VR Hot",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 245,
-            "Name": "CPU1 CH3 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 245,
-            "Name": "CPU2 FIVR Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 246,
-            "Name": "CPU1 CH4 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 246,
-            "Name": "CPU2 Mem VR Hot1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 247,
-            "Name": "CPU1 CH4 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 247,
-            "Name": "CPU1 Mem VR Hot2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 248,
-            "Name": "CPU1 CH5 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 248,
-            "Name": "CPU2 ID0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 249,
-            "Name": "CPU1 CH5 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 250,
-            "Name": "CPU1 CH6 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 250,
-            "Name": "CPU2 Mismatch",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 251,
-            "Name": "CPU1 CH6 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 251,
-            "Name": "CPU2 DIMM Thermaltrip",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 252,
-            "Name": "Fan1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 253,
-            "Name": "Fan2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 254,
-            "Name": "Fan3 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 255,
-            "Name": "Fan4 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 256,
-            "Name": "Fan5 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 257,
-            "Name": "Fan6 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 258,
-            "Name": "Fan7 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 259,
-            "Name": "Fan8 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 260,
-            "Name": "CPU2 CH1 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 261,
-            "Name": "CPU1 CH1 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 262,
-            "Name": "CPU2 CH2 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 263,
-            "Name": "CPU2 CH2 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 264,
-            "Name": "CPU2 CH3 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 265,
-            "Name": "CPU2 CH3 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 266,
-            "Name": "CPU2 CH4 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 267,
-            "Name": "CPU2 CH4 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 268,
-            "Name": "CPU2 CH5 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 269,
-            "Name": "CPU2 CH5 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 270,
-            "Name": "CPU2 CH6 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 271,
-            "Name": "CPU2 CH6 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 272,
-            "Name": "CPU3 CH1 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 272,
-            "Name": "PLD Minor Revison Bit 0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 273,
-            "Name": "CPU3 CH1 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 273,
-            "Name": "PLD Minor Revison Bit 1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 274,
-            "Name": "CPU3 CH2 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 274,
-            "Name": "PLD Minor Revison Bit 2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 275,
-            "Name": "CPU3 CH2 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 275,
-            "Name": "PLD Minor Revison Bit 3",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 276,
-            "Name": "CPU3 CH3 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 276,
-            "Name": "PLD Major Revison Bit 0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 277,
-            "Name": "CPU3 CH3 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 277,
-            "Name": "PLD Major Revison Bit 1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 278,
-            "Name": "CPU3 CH4 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 278,
-            "Name": "PLD Major Revison Bit 2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 279,
-            "Name": "CPU3 CH4 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 279,
-            "Name": "PLD Major Revison Bit 2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 280,
-            "Name": "CPU3 CH5 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 280,
-            "Name": "Main PLD Minor Revison Bit 0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 281,
-            "Name": "CPU3 CH5 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 281,
-            "Name": "Main PLD Minor Revison Bit 1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 282,
-            "Name": "CPU3 CH6 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 282,
-            "Name": "Main PLD Minor Revison Bit 2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 283,
-            "Name": "CPU3 CH6 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 283,
-            "Name": "Main PLD Minor Revison Bit 3",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 284,
-            "Name": "CPU4 CH1 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 284,
-            "Name": "Main PLD Major Revison Bit 0",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 285,
-            "Name": "CPU4 CH1 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 285,
-            "Name": "Main PLD Major Revison Bit 1",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 286,
-            "Name": "CPU4 CH2 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 286,
-            "Name": "Main PLD Major Revison Bit 2",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 287,
-            "Name": "CPU4 CH2 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 287,
-            "Name": "Main PLD Major Revison Bit 3",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 288,
-            "Name": "CPU4 CH3 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 289,
-            "Name": "CPU4 CH3 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 289,
-            "Name": "Memory Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 290,
-            "Name": "CPU4 CH4 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 290,
-            "Name": "CPU Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 291,
-            "Name": "CPU4 CH4 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 291,
-            "Name": "P5V P3V3 Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 292,
-            "Name": "CPU4 CH5 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 292,
-            "Name": "PSU Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 293,
-            "Name": "CPU4 CH5 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 293,
-            "Name": "SAS Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 294,
-            "Name": "CPU4 CH6 DIMM1 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 294,
-            "Name": "Lan Aux Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Out",
-            "Index": 295,
-            "Name": "CPU4 CH6 DIMM2 FAULT",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Direction": "Input",
-            "Index": 295,
-            "Name": "PCH Pwr Fault",
-            "Polarity": "Low",
-            "Type": "Gpio"
-        },
-        {
-            "Address": "0x8",
-            "Class": "METemp",
-            "Name": "SSB Temp",
-            "PowerState": "BiosPost",
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 103
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 98
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x7c",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU1 P12V PVCCIO VR Temp",
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
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-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x70",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU1 P12V PVCCIN VR Temp",
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
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-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
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-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x74",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU1 VR Mem ABC Temp",
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
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-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
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-                    "Value": 5
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-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x78",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU1 VR Mem DEF Temp",
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-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
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-                    "Value": 110
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-                    "Direction": "less than",
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-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x9c",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU2 P12V PVCCIO VR Temp",
-            "Thresholds": [
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
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-                    "Value": 5
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-                    "Value": 0
-                }
-            ],
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-        },
-        {
-            "Address": "0x50",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU2 P12V PVCCIN VR Temp",
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-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                },
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-                    "Value": 110
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-                    "Direction": "less than",
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-                    "Value": 5
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-                {
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-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
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-            "Class": "PxeBridgeTemp",
-            "Name": "CPU2 VR Mem ABC Temp",
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-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
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-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
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-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x98",
-            "Class": "PxeBridgeTemp",
-            "Name": "CPU2 VR Mem DEF Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
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-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0xAC",
-            "Class": "PxeBridgeTemp",
-            "Name": "VR P1V05 Temp",
-            "Thresholds": [
-                {
-                    "Direction": "greater than",
-                    "Name": "upper critical",
-                    "Severity": 1,
-                    "Value": 115
-                },
-                {
-                    "Direction": "greater than",
-                    "Name": "upper non critical",
-                    "Severity": 0,
-                    "Value": 110
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower non critical",
-                    "Severity": 0,
-                    "Value": 5
-                },
-                {
-                    "Direction": "less than",
-                    "Name": "lower critical",
-                    "Severity": 1,
-                    "Value": 0
-                }
-            ],
-            "Type": "IpmbSensor"
-        },
-        {
-            "Address": "0x71",
-            "Bus": 2,
-            "ChannelNames": [
-                "M2_Slot1",
-                "M2_Slot2",
-                "",
-                ""
-            ],
-            "Name": "M.2 Mux",
-            "Type": "PCA9543Mux"
-        }
-    ],
-    "Name": "TNP Baseboard",
-    "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})",
-    "Type": "Board",
-    "xyz.openbmc_project.Inventory.Decorator.Asset": {
-        "Manufacturer": "$PRODUCT_MANUFACTURER",
-        "Model": "$PRODUCT_PRODUCT_NAME",
-        "PartNumber": "$PRODUCT_PART_NUMBER",
-        "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
-    }
-}
+{
+    "Exposes": [
+        {
+            "Address": "0x4A",
+            "Bus": 6,
+            "Name": "BMC Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "TMP75"
+        },
+        {
+            "Index": 0,
+            "Name": "Baseboard 12 Volt",
+            "PowerState": "On",
+            "ScaleFactor": 0.1124,
+            "Thresholds": [
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+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 13.494
+                },
+                {
+                    "Direction": "greater than",
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+                    "Severity": 0,
+                    "Value": 13.101
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 10.945
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 10.616
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Name": "CPU 1 Fan Connector",
+            "Pwm": 7,
+            "Status": "disabled",
+            "Tachs": [
+                13
+            ],
+            "Type": "IntelFanConnector"
+        },
+        {
+            "Name": "CPU 2 Fan Connector",
+            "Pwm": 8,
+            "Status": "disabled",
+            "Tachs": [
+                14
+            ],
+            "Type": "IntelFanConnector"
+        },
+        {
+            "Address": "0x49",
+            "Bus": 6,
+            "Name": "Left Rear Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
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+                    "Name": "upper non critical",
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+                    "Value": 110
+                },
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+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "TMP75"
+        },
+        {
+            "Index": 4,
+            "Name": "P0V83_LAN_AUX",
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+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 0.901
+                },
+                {
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+                    "Value": 0.875
+                },
+                {
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+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 0.786
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0.763
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 3,
+            "Name": "P105_PCH_AUX",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 1.139
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
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+                    "Value": 1.106
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 0.995
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0.966
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 5,
+            "Name": "P12V_AUX",
+            "ScaleFactor": 0.1124,
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 13.494
+                },
+                {
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+                    "Severity": 0,
+                    "Value": 13.101
+                },
+                {
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+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 10.945
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 10.616
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 6,
+            "Name": "P1V8_PCH",
+            "ScaleFactor": 0.7505,
+            "Thresholds": [
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+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 1.961
+                },
+                {
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+                    "Value": 1.904
+                },
+                {
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+                    "Value": 1.699
+                },
+                {
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+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 1.648
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 1,
+            "Name": "P3V3",
+            "PowerState": "On",
+            "ScaleFactor": 0.4107,
+            "Thresholds": [
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+                    "Value": 3.647
+                },
+                {
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+                    "Value": 3.541
+                },
+                {
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+                    "Value": 3.066
+                },
+                {
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+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 2.974
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 7,
+            "Name": "P3VBAT",
+            "ScaleFactor": 0.3333,
+            "Thresholds": [
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+                    "Direction": "greater than",
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+                    "Value": 3.296
+                },
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+                    "Value": 3.263
+                },
+                {
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+                    "Value": 2.457
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
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+                    "Value": 2.138
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 8,
+            "Name": "PVCCIN_CPU1",
+            "PowerState": "On",
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+            "Thresholds": [
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+                    "Value": 2.151
+                },
+                {
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+                    "Value": 2.088
+                },
+                {
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+                    "Value": 1.418
+                },
+                {
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+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 1.376
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 9,
+            "Name": "PVCCIN_CPU2",
+            "PowerState": "On",
+            "ScaleFactor": 0.7505,
+            "Thresholds": [
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+                    "Name": "upper critical",
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+                    "Value": 2.151
+                },
+                {
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+                    "Name": "upper non critical",
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+                    "Value": 2.088
+                },
+                {
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+                    "Value": 1.418
+                },
+                {
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+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 1.376
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 14,
+            "Name": "PVCCIO_CPU1",
+            "PowerState": "On",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 1.19
+                },
+                {
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+                    "Value": 1.155
+                },
+                {
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+                    "Value": 0.752
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+                {
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+                    "Name": "lower critical",
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+                    "Value": 0.729
+                }
+            ],
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+        },
+        {
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+            "Name": "PVCCIO_CPU2",
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+                },
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+                    "Value": 1.155
+                },
+                {
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+                    "Value": 0.752
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+                    "Value": 0.729
+                }
+            ],
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+        },
+        {
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+            "Name": "PVDQ_ABCD_CPU1",
+            "PowerState": "On",
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+                    "Value": 1.301
+                },
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+                    "Value": 1.263
+                },
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+                    "Value": 1.138
+                },
+                {
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+                    "Name": "lower critical",
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+                    "Value": 1.104
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
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+            "Name": "PVDQ_ABCD_CPU2",
+            "PowerState": "On",
+            "Thresholds": [
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+                    "Value": 1.301
+                },
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+                    "Value": 1.263
+                },
+                {
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+                    "Value": 1.138
+                },
+                {
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+                    "Name": "lower critical",
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+                    "Value": 1.104
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 11,
+            "Name": "PVDQ_EFGH_CPU1",
+            "PowerState": "On",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 1.301
+                },
+                {
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+                    "Value": 1.263
+                },
+                {
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+                    "Value": 1.138
+                },
+                {
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+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 1.104
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 13,
+            "Name": "PVDQ_EFGH_CPU2",
+            "PowerState": "On",
+            "Thresholds": [
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+                },
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+                    "Value": 1.263
+                },
+                {
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+                    "Value": 1.138
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 1.104
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Index": 2,
+            "Name": "PVNN_PCH_AUX",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
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+                    "Value": 1.081
+                },
+                {
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+                    "Value": 1.049
+                },
+                {
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+                    "Value": 0.807
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0.783
+                }
+            ],
+            "Type": "ADC"
+        },
+        {
+            "Address": "0x4D",
+            "Bus": 6,
+            "Name": "Right Rear Board Temp",
+            "Name1": "Right Rear TMP421 Internal Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
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+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
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+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "TMP421"
+        },
+        {
+            "Address": "0x48",
+            "Bus": 6,
+            "Name": "Voltage Regulator 1 Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "TMP75"
+        },
+        {
+            "Address": "0x4B",
+            "Bus": 6,
+            "Name": "Voltage Regulator 2 Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "TMP75"
+        },
+        {
+            "Address": "0x30",
+            "Bus": 0,
+            "CpuID": 1,
+            "Name": "Skylake CPU 1",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Label": "DIMM",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 99
+                },
+                {
+                    "Direction": "greater than",
+                    "Label": "DIMM",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 89
+                }
+            ],
+            "Type": "SkylakeCPU"
+        },
+        {
+            "Address": "0x31",
+            "Bus": 0,
+            "CpuID": 2,
+            "Name": "Skylake CPU 2",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Label": "DIMM",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 99
+                },
+                {
+                    "Direction": "greater than",
+                    "Label": "DIMM",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 89
+                }
+            ],
+            "Type": "SkylakeCPU"
+        },
+        {
+            "Direction": "Input",
+            "Index": 32,
+            "Name": "Reset Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 33,
+            "Name": "Reset Out",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Both",
+            "Index": 34,
+            "Name": "Power Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Both",
+            "Index": 35,
+            "Name": "Power Up",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 40,
+            "Name": "NMI Out",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 50,
+            "Name": "PCH Thermaltrip",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 51,
+            "Name": "Lcp Enter Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 52,
+            "Name": "Lcp Left Button",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 53,
+            "Name": "Lcp Right Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 49,
+            "Name": "Cpu Caterr",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 48,
+            "Name": "Cpu Err2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 63,
+            "Name": "PU 240VA Status",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 208,
+            "Name": "P3v3bat BridgeEn",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 214,
+            "Name": "Nmi Button",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 215,
+            "Name": "Post complete",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 217,
+            "Name": "Nmi Button",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 218,
+            "Name": "ID Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 219,
+            "Name": "Power Good",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 232,
+            "Name": "Post Complete led0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 233,
+            "Name": "Post Complete led1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 233,
+            "Name": "CPU1 Thermaltrip",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 234,
+            "Name": "Post Complete led2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 234,
+            "Name": "CPU1 VR Hot",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 235,
+            "Name": "Post Complete led3",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 236,
+            "Name": "Post Complete led4",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 236,
+            "Name": "CPU1 Mem VR Hot1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 237,
+            "Name": "Post Complete led5",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 237,
+            "Name": "CPU1 Mem VR Hot2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 238,
+            "Name": "Post Complete led6",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 239,
+            "Name": "Post Complete led7",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 232,
+            "Name": "CPU1 Present",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 235,
+            "Name": "CPU1 FIVR Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 238,
+            "Name": "CPU1 ID0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 240,
+            "Name": "CPU1 CH1 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 240,
+            "Name": "CPU1 Mismatch",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 241,
+            "Name": "CPU1 CH1 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 241,
+            "Name": "CPU1 DIMM Thermaltrip",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 242,
+            "Name": "CPU1 CH2 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 242,
+            "Name": "CPU2 Present",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 243,
+            "Name": "CPU1 CH2 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 243,
+            "Name": "CPU2 Thermaltrip",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 244,
+            "Name": "CPU1 CH3 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 244,
+            "Name": "CPU2 VR Hot",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 245,
+            "Name": "CPU1 CH3 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 245,
+            "Name": "CPU2 FIVR Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 246,
+            "Name": "CPU1 CH4 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 246,
+            "Name": "CPU2 Mem VR Hot1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 247,
+            "Name": "CPU1 CH4 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 247,
+            "Name": "CPU1 Mem VR Hot2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 248,
+            "Name": "CPU1 CH5 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 248,
+            "Name": "CPU2 ID0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 249,
+            "Name": "CPU1 CH5 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 250,
+            "Name": "CPU1 CH6 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 250,
+            "Name": "CPU2 Mismatch",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 251,
+            "Name": "CPU1 CH6 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 251,
+            "Name": "CPU2 DIMM Thermaltrip",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 252,
+            "Name": "Fan1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 253,
+            "Name": "Fan2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 254,
+            "Name": "Fan3 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 255,
+            "Name": "Fan4 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 256,
+            "Name": "Fan5 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 257,
+            "Name": "Fan6 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 258,
+            "Name": "Fan7 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 259,
+            "Name": "Fan8 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 260,
+            "Name": "CPU2 CH1 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 261,
+            "Name": "CPU2 CH1 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 262,
+            "Name": "CPU2 CH2 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 263,
+            "Name": "CPU2 CH2 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 264,
+            "Name": "CPU2 CH3 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 265,
+            "Name": "CPU2 CH3 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 266,
+            "Name": "CPU2 CH4 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 267,
+            "Name": "CPU2 CH4 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 268,
+            "Name": "CPU2 CH5 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 269,
+            "Name": "CPU2 CH5 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 270,
+            "Name": "CPU2 CH6 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 271,
+            "Name": "CPU2 CH6 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 272,
+            "Name": "CPU3 CH1 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 272,
+            "Name": "PLD Minor Revison Bit 0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 273,
+            "Name": "CPU3 CH1 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 273,
+            "Name": "PLD Minor Revison Bit 1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 274,
+            "Name": "CPU3 CH2 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 274,
+            "Name": "PLD Minor Revison Bit 2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 275,
+            "Name": "CPU3 CH2 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 275,
+            "Name": "PLD Minor Revison Bit 3",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 276,
+            "Name": "CPU3 CH3 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 276,
+            "Name": "PLD Major Revison Bit 0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 277,
+            "Name": "CPU3 CH3 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 277,
+            "Name": "PLD Major Revison Bit 1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 278,
+            "Name": "CPU3 CH4 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 278,
+            "Name": "PLD Major Revison Bit 2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 279,
+            "Name": "CPU3 CH4 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 279,
+            "Name": "PLD Major Revison Bit 2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 280,
+            "Name": "CPU3 CH5 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 280,
+            "Name": "Main PLD Minor Revison Bit 0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 281,
+            "Name": "CPU3 CH5 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 281,
+            "Name": "Main PLD Minor Revison Bit 1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 282,
+            "Name": "CPU3 CH6 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 282,
+            "Name": "Main PLD Minor Revison Bit 2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 283,
+            "Name": "CPU3 CH6 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 283,
+            "Name": "Main PLD Minor Revison Bit 3",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 284,
+            "Name": "CPU4 CH1 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 284,
+            "Name": "Main PLD Major Revison Bit 0",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 285,
+            "Name": "CPU4 CH1 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 285,
+            "Name": "Main PLD Major Revison Bit 1",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 286,
+            "Name": "CPU4 CH2 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 286,
+            "Name": "Main PLD Major Revison Bit 2",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 287,
+            "Name": "CPU4 CH2 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 287,
+            "Name": "Main PLD Major Revison Bit 3",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 288,
+            "Name": "CPU4 CH3 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 289,
+            "Name": "CPU4 CH3 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 289,
+            "Name": "Memory Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 290,
+            "Name": "CPU4 CH4 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 290,
+            "Name": "CPU Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 291,
+            "Name": "CPU4 CH4 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 291,
+            "Name": "P5V P3V3 Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 292,
+            "Name": "CPU4 CH5 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 292,
+            "Name": "PSU Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 293,
+            "Name": "CPU4 CH5 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 293,
+            "Name": "SAS Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 294,
+            "Name": "CPU4 CH6 DIMM1 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 294,
+            "Name": "Lan Aux Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 295,
+            "Name": "CPU4 CH6 DIMM2 FAULT",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 295,
+            "Name": "PCH Pwr Fault",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Address": "0x8",
+            "Class": "METemp",
+            "Name": "SSB Temp",
+            "PowerState": "BiosPost",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 103
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 98
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x7c",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU1 P12V PVCCIO VR Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x70",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU1 P12V PVCCIN VR Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x74",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU1 VR Mem ABC Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x78",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU1 VR Mem DEF Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x9c",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU2 P12V PVCCIO VR Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x50",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU2 P12V PVCCIN VR Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x94",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU2 VR Mem ABC Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x98",
+            "Class": "PxeBridgeTemp",
+            "Name": "CPU2 VR Mem DEF Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0xAC",
+            "Class": "PxeBridgeTemp",
+            "Name": "VR P1V05 Temp",
+            "Thresholds": [
+                {
+                    "Direction": "greater than",
+                    "Name": "upper critical",
+                    "Severity": 1,
+                    "Value": 115
+                },
+                {
+                    "Direction": "greater than",
+                    "Name": "upper non critical",
+                    "Severity": 0,
+                    "Value": 110
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower non critical",
+                    "Severity": 0,
+                    "Value": 5
+                },
+                {
+                    "Direction": "less than",
+                    "Name": "lower critical",
+                    "Severity": 1,
+                    "Value": 0
+                }
+            ],
+            "Type": "IpmbSensor"
+        },
+        {
+            "Address": "0x71",
+            "Bus": 2,
+            "ChannelNames": [
+                "M2_Slot1",
+                "M2_Slot2",
+                "",
+                ""
+            ],
+            "Name": "M.2 Mux",
+            "Type": "PCA9543Mux"
+        },
+        {
+            "Direction": "Input",
+            "Index": 27,
+            "Name": "Node ID GPIO 0",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 26,
+            "Name": "Node ID GPIO 1",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "BindGpioNodeID": "Node ID GPIO 0",
+            "Name": "Multi Node ID 0",
+            "Type": "MultiNode"
+        },
+        {
+            "BindGpioNodeID": "Node ID GPIO 1",
+            "Name": "Multi Node ID 1",
+            "Type": "MultiNode"
+        }
+    ],
+    "Name": "TNP Baseboard",
+    "Probe": "xyz.openbmc_project.FruDevice({'PRODUCT_PRODUCT_NAME': '.*TNP'})",
+    "Type": "Board",
+    "xyz.openbmc_project.Inventory.Decorator.Asset": {
+        "Manufacturer": "$PRODUCT_MANUFACTURER",
+        "Model": "$PRODUCT_PRODUCT_NAME",
+        "PartNumber": "$PRODUCT_PART_NUMBER",
+        "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
+    }
+}
+\ No newline at end of file
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
index 65f36ccab..7c58d6bb0 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WC-Baseboard.json
@@ -330,7 +330,7 @@
         },
         {
             "Index": 8,
-            "Name": "PVCCIN_CPU0",
+            "Name": "PVCCIN_CPU1",
             "PowerState": "On",
             "ScaleFactor": 0.7505,
             "Thresholds": [
@@ -363,7 +363,7 @@
         },
         {
             "Index": 9,
-            "Name": "PVCCIN_CPU1",
+            "Name": "PVCCIN_CPU2",
             "PowerState": "On",
             "ScaleFactor": 0.7505,
             "Thresholds": [
@@ -396,7 +396,7 @@
         },
         {
             "Index": 14,
-            "Name": "PVCCIO_CPU0",
+            "Name": "PVCCIO_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -428,7 +428,7 @@
         },
         {
             "Index": 15,
-            "Name": "PVCCIO_CPU1",
+            "Name": "PVCCIO_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -460,7 +460,7 @@
         },
         {
             "Index": 10,
-            "Name": "PVDQ_ABC_CPU0",
+            "Name": "PVDQ_ABC_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -492,7 +492,7 @@
         },
         {
             "Index": 12,
-            "Name": "PVDQ_ABC_CPU1",
+            "Name": "PVDQ_ABC_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -524,7 +524,7 @@
         },
         {
             "Index": 11,
-            "Name": "PVDQ_DEF_CPU0",
+            "Name": "PVDQ_DEF_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -556,7 +556,7 @@
         },
         {
             "Index": 13,
-            "Name": "PVDQ_DEF_CPU1",
+            "Name": "PVDQ_DEF_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -748,8 +748,8 @@
         {
             "Address": "0x30",
             "Bus": 0,
-            "CpuID": 0,
-            "Name": "Skylake CPU 0",
+            "CpuID": 1,
+            "Name": "Skylake CPU 1",
             "Thresholds": [
                 {
                     "Direction": "greater than",
@@ -771,8 +771,8 @@
         {
             "Address": "0x31",
             "Bus": 0,
-            "CpuID": 1,
-            "Name": "Skylake CPU 1",
+            "CpuID": 2,
+            "Name": "Skylake CPU 2",
             "Thresholds": [
                 {
                     "Direction": "greater than",
@@ -1142,13 +1142,13 @@
         },
         {
             "FailSafePercent": 100,
-            "MinThermalRpm": 3000,
+            "MinThermalOutput": 30,
             "Name": "Left",
             "Type": "Pid.Zone"
         },
         {
             "FailSafePercent": 100,
-            "MinThermalRpm": 3000,
+            "MinThermalOutput": 30,
             "Name": "Right",
             "Type": "Pid.Zone"
         },
@@ -1165,9 +1165,9 @@
             "ILimitMax": 100,
             "ILimitMin": 30,
             "Inputs": [
-                "Core \\d+ CPU0"
+                "Core \\d+ CPU1"
             ],
-            "Name": "CPU0",
+            "Name": "CPU1",
             "NegativeHysteresis": 2.0,
             "OutLimitMax": 100,
             "OutLimitMin": 30,
@@ -1190,9 +1190,9 @@
             "ILimitMax": 100,
             "ILimitMin": 30,
             "Inputs": [
-                "Core \\d+ CPU1"
+                "Core \\d+ CPU2"
             ],
-            "Name": "CPU1",
+            "Name": "CPU2",
             "NegativeHysteresis": 2.0,
             "OutLimitMax": 100,
             "OutLimitMin": 30,
@@ -1208,7 +1208,42 @@
             ]
         },
         {
-            "Direction": "In",
+            "Direction": "Input",
+            "Index": 32,
+            "Name": "Reset Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 33,
+            "Name": "Reset Out",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 34,
+            "Name": "Power Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 35,
+            "Name": "Power Up",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 40,
+            "Name": "NMI Input",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
             "Index": 48,
             "Name": "CPU ERR2",
             "Polarity": "High",
@@ -1222,6 +1257,41 @@
             "Type": "Gpio"
         },
         {
+            "Direction": "Input",
+            "Index": 214,
+            "Name": "SMI Input",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 215,
+            "Name": "Post Complete",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 217,
+            "Name": "Nmi Button",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 218,
+            "Name": "ID Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 219,
+            "Name": "Power Good",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
             "Class": "Floor",
             "Inputs": [
                 "Front Panel Temp"
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
index bd32ae60d..e1e877892 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager/WP-Baseboard.json
@@ -330,7 +330,7 @@
         },
         {
             "Index": 8,
-            "Name": "PVCCIN_CPU0",
+            "Name": "PVCCIN_CPU1",
             "PowerState": "On",
             "ScaleFactor": 0.7505,
             "Thresholds": [
@@ -363,7 +363,7 @@
         },
         {
             "Index": 9,
-            "Name": "PVCCIN_CPU1",
+            "Name": "PVCCIN_CPU2",
             "PowerState": "On",
             "ScaleFactor": 0.7505,
             "Thresholds": [
@@ -396,7 +396,7 @@
         },
         {
             "Index": 14,
-            "Name": "PVCCIO_CPU0",
+            "Name": "PVCCIO_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -428,7 +428,7 @@
         },
         {
             "Index": 15,
-            "Name": "PVCCIO_CPU1",
+            "Name": "PVCCIO_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -460,7 +460,7 @@
         },
         {
             "Index": 10,
-            "Name": "PVDQ_ABC_CPU0",
+            "Name": "PVDQ_ABC_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -492,7 +492,7 @@
         },
         {
             "Index": 12,
-            "Name": "PVDQ_ABC_CPU1",
+            "Name": "PVDQ_ABC_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -524,7 +524,7 @@
         },
         {
             "Index": 11,
-            "Name": "PVDQ_DEF_CPU0",
+            "Name": "PVDQ_DEF_CPU1",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -556,7 +556,7 @@
         },
         {
             "Index": 13,
-            "Name": "PVDQ_DEF_CPU1",
+            "Name": "PVDQ_DEF_CPU2",
             "PowerState": "On",
             "Thresholds": [
                 {
@@ -748,8 +748,8 @@
         {
             "Address": "0x30",
             "Bus": 0,
-            "CpuID": 0,
-            "Name": "Skylake CPU 0",
+            "CpuID": 1,
+            "Name": "Skylake CPU 1",
             "Thresholds": [
                 {
                     "Direction": "greater than",
@@ -771,8 +771,8 @@
         {
             "Address": "0x31",
             "Bus": 0,
-            "CpuID": 1,
-            "Name": "Skylake CPU 1",
+            "CpuID": 2,
+            "Name": "Skylake CPU 2",
             "Thresholds": [
                 {
                     "Direction": "greater than",
@@ -1142,13 +1142,13 @@
         },
         {
             "FailSafePercent": 100,
-            "MinThermalRpm": 3000,
+            "MinThermalOutput": 30,
             "Name": "Left",
             "Type": "Pid.Zone"
         },
         {
             "FailSafePercent": 100,
-            "MinThermalRpm": 3000,
+            "MinThermalOutput": 30,
             "Name": "Right",
             "Type": "Pid.Zone"
         },
@@ -1165,9 +1165,9 @@
             "ILimitMax": 100,
             "ILimitMin": 30,
             "Inputs": [
-                "Core \\d+ CPU0"
+                "Core \\d+ CPU1"
             ],
-            "Name": "CPU0",
+            "Name": "CPU1",
             "NegativeHysteresis": 2.0,
             "OutLimitMax": 100,
             "OutLimitMin": 30,
@@ -1190,9 +1190,9 @@
             "ILimitMax": 100,
             "ILimitMin": 30,
             "Inputs": [
-                "Core \\d+ CPU1"
+                "Core \\d+ CPU2"
             ],
-            "Name": "CPU1",
+            "Name": "CPU2",
             "OutLimitMax": 100,
             "OutLimitMin": 30,
             "Outputs": [],
@@ -1206,7 +1206,42 @@
             ]
         },
         {
-            "Direction": "In",
+            "Direction": "Input",
+            "Index": 32,
+            "Name": "Reset Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 33,
+            "Name": "Reset Out",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 34,
+            "Name": "Power Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Out",
+            "Index": 35,
+            "Name": "Power Up",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 40,
+            "Name": "NMI Input",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
             "Index": 48,
             "Name": "CPU ERR2",
             "Polarity": "High",
@@ -1220,6 +1255,41 @@
             "Type": "Gpio"
         },
         {
+            "Direction": "Input",
+            "Index": 214,
+            "Name": "SMI Input",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 215,
+            "Name": "Post Complete",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 217,
+            "Name": "Nmi Button",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 218,
+            "Name": "ID Button",
+            "Polarity": "Low",
+            "Type": "Gpio"
+        },
+        {
+            "Direction": "Input",
+            "Index": 219,
+            "Name": "Power Good",
+            "Polarity": "High",
+            "Type": "Gpio"
+        },
+        {
             "Class": "Floor",
             "Inputs": [
                 "Front Panel Temp"
@@ -1731,4 +1801,4 @@
         "PartNumber": "$PRODUCT_PART_NUMBER",
         "SerialNumber": "$PRODUCT_SERIAL_NUMBER"
     }
-}
-\ No newline at end of file
+}
diff --git a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
index a2861c4ca..758818748 100644
--- a/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
+++ b/meta-openbmc-mods/meta-wolfpass/recipes-phosphor/configuration/entity-manager_%.bbappend
@@ -3,7 +3,8 @@ SRC_URI_append = " file://WC-Baseboard.json \
                    file://WP-Baseboard.json \
                    file://TNP-baseboard.json \
                    file://FCXXPDBASSMBL_PDB.json \
-                   file://OPB2RH-Chassis.json"
+                   file://OPB2RH-Chassis.json \
+                   file://CYP-baseboard.json"
 
 RDEPENDS_${PN} += " default-fru"
author	Ed Tanous <ed.tanous@intel.com>	2019-04-15 23:42:44 +0300
committer	Ed Tanous <ed.tanous@intel.com>	2019-04-17 19:13:25 +0300
commit	816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5 (patch)
tree	341534fed9a2de460ded7f8231ca1cbb178bb2ca /meta-openbmc-mods
parent	a75bff085ba9443315222231c42692745e5781e9 (diff)
download	openbmc-816d793003e93c1e5eec0a2e90fbd8b9dde9f7a5.tar.xz