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author | Ed Tanous <ed.tanous@intel.com> | 2019-06-20 19:46:38 +0300 |
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committer | GitHub <noreply@github.com> | 2019-06-20 19:46:38 +0300 |
commit | 43a183cc0926da36e3a218efa02ab4838ace316f (patch) | |
tree | 9ea192b408585fc2a19b54d196c3d56eaddc4acb /meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh | |
parent | 5575b1d27fc222f973d96dc06af0f21ba7656f28 (diff) | |
parent | 2c7e8f4ce61f2e0407c37e98e22bbb13e562b414 (diff) | |
download | openbmc-43a183cc0926da36e3a218efa02ab4838ace316f.tar.xz |
Merge pull request #12 from Intel-BMC/update
Update
Diffstat (limited to 'meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh')
-rw-r--r-- | meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh b/meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh new file mode 100644 index 000000000..3737aacc1 --- /dev/null +++ b/meta-quanta/meta-gsj/recipes-gsj/quanta-nvme-powerctrl/files/nvme_powerctrl_library.sh @@ -0,0 +1,63 @@ +#!/bin/bash + +U2_PRESENT=( 148 149 150 151 152 153 154 155 ) +POWER_U2=( 195 196 202 199 198 197 127 126 ) +PWRGD_U2=( 161 162 163 164 165 166 167 168 ) +RST_BMC_U2=( 72 73 74 75 76 77 78 79 ) +PLUGGED=0 +I2C_BUS=8 +CHIP_ADDR=0x68 +CLOCK_GEN_VALUE=$(i2cget -y $I2C_BUS $CHIP_ADDR 0 i 2|cut -f3 -d' ') + +function set_gpio_direction() +{ + #$1 gpio pin, $2 'in','high','low' + echo $2 > /sys/class/gpio/gpio$1/direction +} + +function read_gpio_input() +{ + #$1 read input gpio pin + echo $(cat /sys/class/gpio/gpio$1/value) +} + +function enable_nvme_power() +{ + set_gpio_direction "${POWER_U2[$1]}" "high" + sleep 0.04 + check_powergood $1 +} + +function check_powergood() +{ + if [ $(read_gpio_input ${PWRGD_U2[$1]}) == 1 ];then + sleep 0.005 + update_clock_gen_chip_register $1 1 + sleep 0.1 + set_gpio_direction "${RST_BMC_U2[$1]}" "high" + else + disable_nvme_power $1 + fi +} + +function disable_nvme_power() +{ + set_gpio_direction "${RST_BMC_U2[$1]}" "low" + sleep 0.1 + update_clock_gen_chip_register $1 0 + sleep 0.005 + set_gpio_direction "${POWER_U2[$1]}" "low" +} + +function update_clock_gen_chip_register(){ + #$1 nvme slot number, $2 enable/disable + update_value=$(printf '%x\n' "$((0x01 <<$1))") + if [ $2 -eq 1 ];then + CLOCK_GEN_VALUE=$(printf '0x%x\n' \ + "$(($CLOCK_GEN_VALUE | 0x$update_value))") + else + CLOCK_GEN_VALUE=$(printf '0x%x\n' \ + "$(($CLOCK_GEN_VALUE & ~0x$update_value))") + fi + i2cset -y $I2C_BUS $CHIP_ADDR 0 $CLOCK_GEN_VALUE s +} |