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author | Ed Tanous <ed.tanous@intel.com> | 2019-06-20 19:46:38 +0300 |
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committer | GitHub <noreply@github.com> | 2019-06-20 19:46:38 +0300 |
commit | 43a183cc0926da36e3a218efa02ab4838ace316f (patch) | |
tree | 9ea192b408585fc2a19b54d196c3d56eaddc4acb /meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json | |
parent | 5575b1d27fc222f973d96dc06af0f21ba7656f28 (diff) | |
parent | 2c7e8f4ce61f2e0407c37e98e22bbb13e562b414 (diff) | |
download | openbmc-43a183cc0926da36e3a218efa02ab4838ace316f.tar.xz |
Merge pull request #12 from Intel-BMC/update
Update
Diffstat (limited to 'meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json')
-rw-r--r-- | meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json b/meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json new file mode 100644 index 000000000..75b0480bd --- /dev/null +++ b/meta-yadro/meta-vesnin/recipes-phosphor/skeleton/obmc-libobmc-intf/gpio_defs.json @@ -0,0 +1,131 @@ +{ + "gpio_configs": { + "power_config": { + "power_good_in": "SYS_PWROK_BUFF", + "power_up_outs": [ + {"name": "BMC_POWER_UP", "polarity": false} + ], + "reset_outs": [ + {"name": "CM1_OE_R_N", "polarity": true}, + {"name": "BMC_CP0_RESET_N", "polarity": false} + ], + "pci_reset_outs": [ + {"name": "PEX8718_DEVICES_RESET_N", "polarity": false, "hold": true} + ] + } + }, + + "gpio_definitions": [ + { + "name": "BMC_POWER_UP", + "pin": "E1", + "direction": "out" + }, + { + "name": "SYS_PWROK_BUFF", + "pin": "E6", + "direction": "in" + }, + { + "name": "BMC_WD_CLEAR_PULSE_N", + "pin": "N4", + "direction": "out" + }, + { + "name": "CM1_OE_R_N", + "pin": "Q6", + "direction": "out" + }, + { + "name": "BMC_CP0_RESET_N", + "pin": "O2", + "direction": "out" + }, + { + "name": "PSU_PG", + "pin": "J2", + "direction": "in" + }, + { + "name": "PEX8718_DEVICES_RESET_N", + "pin": "B6", + "direction": "out" + }, + { + "name": "CP0_DEVICES_RESET_N", + "pin": "N3", + "direction": "in" + }, + { + "name": "CP1_DEVICES_RESET_N", + "pin": "N5", + "direction": "in" + }, + { + "name": "CP2_DEVICES_RESET_N", + "pin": "P0", + "direction": "in" + }, + + { + "name": "CP3_DEVICES_RESET_N", + "pin": "P1", + "direction": "in" + }, + { + "name": "IDBTN", + "pin": "Q7", + "direction": "out" + }, + { + "name": "POWER_BUTTON", + "pin": "E0", + "direction": "both" + }, + { + "name": "RESET_BUTTON", + "pin": "E2", + "direction": "both" + }, + { + "name": "CHECKSTOP", + "pin": "P5", + "direction": "falling" + }, + { + "name": "PS0_PRES_N", + "pin": "P7", + "direction": "in" + }, + { + "name": "PS1_PRES_N", + "pin": "N0", + "direction": "in" + }, + { + "name": "FSI_DATA", + "pin": "A5", + "direction": "out" + }, + { + "name": "FSI_CLK", + "pin": "A4", + "direction": "out" + }, + { + "name": "FSI_ENABLE", + "pin": "E5", + "direction": "out" + }, + { + "name": "CRONUS_SEL", + "pin": "A6", + "direction": "out" + }, + { + "name": "CP0_FSI0_DATA_EN", + "pin": "H6", + "direction": "out" + } + ] +} |