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-rw-r--r--meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch87
-rw-r--r--meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch45
-rw-r--r--meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0003-aspeed-support-passing-system-reset-status-to-kernel.patch180
-rw-r--r--meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend7
4 files changed, 0 insertions, 319 deletions
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch
deleted file mode 100644
index b714be4c6..000000000
--- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 03dcf584823b8b7db7d437257dbb45bd4b7f95b4 Mon Sep 17 00:00:00 2001
-From: Chanh Nguyen <chnguyen@amperecomputing.com>
-Date: Mon, 21 Dec 2020 07:01:14 +0000
-Subject: [PATCH] aspeed/scu : Switch PWM pin to GPIO input mode
-
-In hardware design, the PWM pins will be at a high level if they are
-configured in GPIO Input mode. This commit configures all PWM function
-pins to input GPIO mode. This will allow fans to run at full speed when BMC resets or in U-boot.
-
-Signed-off-by: Chanh Nguyen <chnguyen@amperecomputing.com>
----
- arch/arm/include/asm/arch-aspeed/ast_scu.h | 1 +
- arch/arm/mach-aspeed/ast-scu.c | 12 ++++++++++++
- board/aspeed/ast-g5/ast-g5.c | 10 ++++++++++
- include/configs/ast-g5-phy.h | 3 +++
- 4 files changed, 26 insertions(+)
-
-diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-index dcbc6730d4..d2c010a0dc 100644
---- a/arch/arm/include/asm/arch-aspeed/ast_scu.h
-+++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-@@ -45,5 +45,6 @@ extern u32 ast_scu_get_vga_memsize(void);
- extern void ast_scu_init_eth(u8 num);
- extern void ast_scu_multi_func_eth(u8 num);
- extern void ast_scu_multi_func_romcs(u8 num);
-+extern void ast_scu_switch_pwm_to_gpio_mode(void);
-
- #endif
-diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
-index 12de9b8036..ef90ef3805 100644
---- a/arch/arm/mach-aspeed/ast-scu.c
-+++ b/arch/arm/mach-aspeed/ast-scu.c
-@@ -443,6 +443,18 @@ void ast_scu_multi_func_eth(u8 num)
- }
- }
-
-+void ast_scu_switch_pwm_to_gpio_mode(void)
-+{
-+ ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL3) &
-+ ~SCU_FUN_PIN_VPIG2 &
-+ ~SCU_FUN_PIN_VPIG3 &
-+ ~SCU_FUN_PIN_VPIG4 &
-+ ~SCU_FUN_PIN_VPIG5 &
-+ ~SCU_FUN_PIN_VPIG6 &
-+ ~SCU_FUN_PIN_VPIG7,
-+ AST_SCU_FUN_PIN_CTRL3);
-+}
-+
- void ast_scu_multi_func_romcs(u8 num)
- {
- ast_scu_write(ast_scu_read(AST_SCU_FUN_PIN_CTRL3) |
-diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c
-index e67a4bf8b2..fba22a728e 100644
---- a/board/aspeed/ast-g5/ast-g5.c
-+++ b/board/aspeed/ast-g5/ast-g5.c
-@@ -24,6 +24,16 @@ int board_init(void)
- return 0;
- }
-
-+#ifdef CONFIG_BOARD_LATE_INIT
-+int board_late_init(void)
-+{
-+ /* Switch PWM to GPIO mode to make FAN run in max speed */
-+ ast_scu_switch_pwm_to_gpio_mode();
-+
-+ return 0;
-+}
-+#endif
-+
- int dram_init(void)
- {
- u32 vga = ast_scu_get_vga_memsize();
-diff --git a/include/configs/ast-g5-phy.h b/include/configs/ast-g5-phy.h
-index 62ddb841e5..5443a26cab 100644
---- a/include/configs/ast-g5-phy.h
-+++ b/include/configs/ast-g5-phy.h
-@@ -30,4 +30,7 @@
- /* platform.S */
- #define CONFIG_DRAM_ECC_SIZE 0x10000000
-
-+/* Call board_late_init */
-+#define CONFIG_BOARD_LATE_INIT 1
-+
- #endif /* __AST_G5_PHY_CONFIG_H */
---
-2.25.1
-
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch
deleted file mode 100644
index 249d4398f..000000000
--- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From c6e0470d82417b79b23f218c6db1099eb6e160af Mon Sep 17 00:00:00 2001
-From: "Thang Q. Nguyen" <thang@os.amperecomputing.com>
-Date: Wed, 23 Dec 2020 04:42:21 +0000
-Subject: [PATCH] aspeed: Disable internal PD resistors for GPIOs
-
-Configure SCU8C - Multi-function pin control 4 to disable internal pull
-down resistors for GPIOJ, GPIOG/GPIOAB, GPIOD/GPIOY, GPIOC/GPIOS as
-external resistors are already installed.
-
-Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
----
- board/aspeed/ast-g5/ast-g5.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c
-index fba22a728e..9bf6c905fe 100644
---- a/board/aspeed/ast-g5/ast-g5.c
-+++ b/board/aspeed/ast-g5/ast-g5.c
-@@ -27,9 +27,23 @@ int board_init(void)
- #ifdef CONFIG_BOARD_LATE_INIT
- int board_late_init(void)
- {
-+ u32 val;
-+
- /* Switch PWM to GPIO mode to make FAN run in max speed */
- ast_scu_switch_pwm_to_gpio_mode();
-
-+ /*
-+ * Disable internal pull down resistor for GPIOJ,
-+ * GPIOG/GPIOAB, GPIOD/GPIOY, GPIOC/GPIOS as external pull up/down
-+ * resistors are installed already. Unlock SCU regs before writing.
-+ */
-+ writel(SCU_PROTECT_UNLOCK, AST_SCU_BASE);
-+ val = readl(AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL4) | 0x024C0000;
-+ writel(val, AST_SCU_BASE + AST_SCU_FUN_PIN_CTRL4);
-+#ifdef CONFIG_AST_SCU_LOCK
-+ writel(0xaa, AST_SCU_BASE);
-+#endif
-+
- return 0;
- }
- #endif
---
-2.25.1
-
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0003-aspeed-support-passing-system-reset-status-to-kernel.patch b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0003-aspeed-support-passing-system-reset-status-to-kernel.patch
deleted file mode 100644
index 0381b5d84..000000000
--- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed/0003-aspeed-support-passing-system-reset-status-to-kernel.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From af4353ab19aaf29dc68ff89a0d581102ca5be43c Mon Sep 17 00:00:00 2001
-From: "Thang Q. Nguyen" <thang@os.amperecomputing.com>
-Date: Wed, 6 Jan 2021 06:33:36 +0000
-Subject: [PATCH] aspeed: support passing system reset status to kernel via
- bootargs
-
-This is a backport of the patch file from
-openbmc/meta-yadro/meta-nicole/recipes-bsp/u-boot/
-to add the Aspeed reset reason to bootargs so kernel applications
-can query it.
-
-Test case: /proc/cmdline must contain:
- - resetreason=power after cold bmc boot
- - resetreason=watchdog after warm bmc reboot
-
-Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
-Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
----
- arch/arm/include/asm/arch-aspeed/ast_scu.h | 2 +-
- arch/arm/mach-aspeed/ast-scu.c | 6 +-
- board/aspeed/ast-g5/ast-g5.c | 81 ++++++++++++++++++++++
- 3 files changed, 87 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch-aspeed/ast_scu.h b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-index d2c010a0dc..f5c9126ec0 100644
---- a/arch/arm/include/asm/arch-aspeed/ast_scu.h
-+++ b/arch/arm/include/asm/arch-aspeed/ast_scu.h
-@@ -29,7 +29,7 @@
- #define __AST_SCU_H
-
- extern void ast_scu_show_system_info (void);
--extern void ast_scu_sys_rest_info(void);
-+extern u32 ast_scu_sys_rest_info(void);
- extern void ast_scu_security_info(void);
- extern u32 ast_scu_revision_id(void);
- extern u32 ast_scu_get_vga_memsize(void);
-diff --git a/arch/arm/mach-aspeed/ast-scu.c b/arch/arm/mach-aspeed/ast-scu.c
-index ef90ef3805..c7ab66415f 100644
---- a/arch/arm/mach-aspeed/ast-scu.c
-+++ b/arch/arm/mach-aspeed/ast-scu.c
-@@ -494,22 +494,26 @@ void ast_scu_security_info(void)
- }
- }
-
--void ast_scu_sys_rest_info(void)
-+u32 ast_scu_sys_rest_info(void)
- {
- u32 rest = ast_scu_read(AST_SCU_SYS_CTRL);
-
- if (rest & SCU_SYS_EXT_RESET_FLAG) {
- printf("RST : External\n");
- ast_scu_write(SCU_SYS_EXT_RESET_FLAG, AST_SCU_SYS_CTRL);
-+ rest = SCU_SYS_EXT_RESET_FLAG;
- } else if (rest & SCU_SYS_WDT_RESET_FLAG) {
- printf("RST : Watchdog\n");
- ast_scu_write(SCU_SYS_WDT_RESET_FLAG, AST_SCU_SYS_CTRL);
-+ rest = SCU_SYS_WDT_RESET_FLAG;
- } else if (rest & SCU_SYS_PWR_RESET_FLAG) {
- printf("RST : Power On\n");
- ast_scu_write(SCU_SYS_PWR_RESET_FLAG, AST_SCU_SYS_CTRL);
-+ rest = SCU_SYS_PWR_RESET_FLAG;
- } else {
- printf("RST : CLK en\n");
- }
-+ return rest;
- }
-
- u32 ast_scu_get_vga_memsize(void)
-diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c
-index 9bf6c905fe..9e27bce0f5 100644
---- a/board/aspeed/ast-g5/ast-g5.c
-+++ b/board/aspeed/ast-g5/ast-g5.c
-@@ -8,6 +8,8 @@
- */
-
- #include <common.h>
-+#include <stdlib.h>
-+#include <asm/arch/regs-scu.h>
- #include <netdev.h>
-
- #include <asm/arch/ast_scu.h>
-@@ -25,9 +27,76 @@ int board_init(void)
- }
-
- #ifdef CONFIG_BOARD_LATE_INIT
-+static void update_bootargs_cmd(const char *key, const char *value)
-+{
-+ int buf_len;
-+ char *buf;
-+ char *cmdline;
-+ char *end = NULL;
-+
-+ if (!key || (key[0] == '\0')) {
-+ printf("%s: Empty key not allowed\n", __func__);
-+ return;
-+ }
-+
-+ cmdline = getenv("bootargs");
-+
-+ /* Allocate space for maximum possible new command line */
-+ buf_len = (cmdline ? strlen(cmdline) : 0)
-+ + 1 /* spacebar as delimiter */
-+ + strlen(key)
-+ + (value ? 1 /* equal sign */ + strlen(value) : 0)
-+ + 1 /* terminating null */;
-+
-+ buf = calloc(buf_len, sizeof(char));
-+ if (!buf) {
-+ printf("%s: out of memory\n", __func__);
-+ return;
-+ }
-+
-+ if (cmdline)
-+ {
-+ char *start = strstr(cmdline, key);
-+
-+ /* Check for full word match. Match should be start of cmdline
-+ * or there should be space before match
-+ **/
-+ if (start && ((start == cmdline) || (*(start - 1) == ' '))) {
-+ strncat(buf, cmdline, (start - cmdline));
-+
-+ /* Find the end of the keyword[=value] pair,
-+ * including a single training space character, if any.
-+ * Skip the found substring, mark the tail of cmdline.
-+ **/
-+ end = strchr(start, ' ');
-+ if (end) {
-+ end++;
-+ }
-+ } else {
-+ strcat(buf, cmdline);
-+ strcat(buf, " ");
-+ }
-+ }
-+
-+ strcat(buf, key);
-+ if (value) {
-+ strcat(buf, "=");
-+ strcat(buf, value);
-+ }
-+
-+ if (end) {
-+ strcat(buf, " ");
-+ strcat(buf, end);
-+ }
-+
-+ setenv("bootargs", buf);
-+ free(buf);
-+}
-+
- int board_late_init(void)
- {
- u32 val;
-+ u32 reset_reason = ast_scu_sys_rest_info();
-
- /* Switch PWM to GPIO mode to make FAN run in max speed */
- ast_scu_switch_pwm_to_gpio_mode();
-@@ -44,6 +113,18 @@ int board_late_init(void)
- writel(0xaa, AST_SCU_BASE);
- #endif
-
-+ if (reset_reason & SCU_SYS_EXT_RESET_FLAG) {
-+ update_bootargs_cmd("resetreason", "external");
-+ } else if (reset_reason & SCU_SYS_WDT_RESET_FLAG) {
-+ update_bootargs_cmd("resetreason", "watchdog");
-+ } else if (reset_reason & SCU_SYS_PWR_RESET_FLAG) {
-+ update_bootargs_cmd("resetreason", "power");
-+ } else {
-+ char value[32];
-+ snprintf(value, sizeof(value) - 1, "0x%x", reset_reason);
-+ update_bootargs_cmd("resetreason", value);
-+ }
-+
- return 0;
- }
- #endif
---
-2.25.1
-
diff --git a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend b/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
deleted file mode 100644
index 6d0a5f816..000000000
--- a/meta-ampere/meta-jade/recipes-bsp/u-boot/u-boot-aspeed_%.bbappend
+++ /dev/null
@@ -1,7 +0,0 @@
-FILESEXTRAPATHS:append:mtjade := "${THISDIR}/${PN}:"
-
-SRC_URI += " \
- file://0001-aspeed-scu-Switch-PWM-pin-to-GPIO-input-mode.patch \
- file://0002-aspeed-Disable-internal-PD-resistors-for-GPIOs.patch \
- file://0003-aspeed-support-passing-system-reset-status-to-kernel.patch \
- "