diff options
Diffstat (limited to 'meta-amd/meta-ethanolx/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-GPIO-line-names-for-AMD-EthanolX.patch')
| -rw-r--r-- | meta-amd/meta-ethanolx/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-GPIO-line-names-for-AMD-EthanolX.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amd/meta-ethanolx/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-GPIO-line-names-for-AMD-EthanolX.patch b/meta-amd/meta-ethanolx/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-GPIO-line-names-for-AMD-EthanolX.patch new file mode 100644 index 000000000..a8d560c28 --- /dev/null +++ b/meta-amd/meta-ethanolx/recipes-kernel/linux/linux-aspeed/0001-ARM-dts-aspeed-Add-GPIO-line-names-for-AMD-EthanolX.patch @@ -0,0 +1,64 @@ +From 29fe80d452e598e15b26d3570b8f460bf14a7e42 Mon Sep 17 00:00:00 2001 +From: Supreeth Venkatesh <supreeth.venkatesh@amd.com> +Date: Tue, 18 Aug 2020 10:56:37 -0500 +Subject: [PATCH 1/1] ARM:dts:aspeed: Add GPIO line names for AMD EthanolX +Content-Type: text/plain; charset="us-ascii" +Content-Transfer-Encoding: 7bit + +Add GPIO line names for AMD EthanolX customer reference board. +It populates AST2500 GPIO lines (A0-A7 to AC0-AC7) with AMD EthanolX +designated names. + +Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@amd.com> +--- + arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 34 +++++++++++++++++++ + 1 file changed, 34 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts +index 60ba86f3e5bc..008001f95399 100644 +--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts ++++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts +@@ -82,6 +82,40 @@ + &pinctrl_adc4_default>; + }; + ++&gpio { ++ status = "okay"; ++ gpio-line-names = ++ /*A0-A7*/ "","","FAULT_LED","CHASSIS_ID_LED","","","","", ++ /*B0-B7*/ "","","","","","","","", ++ /*C0-C7*/ "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","", ++ /*D0-D7*/ "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S","JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD", ++ /*E0-E7*/ "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN","MON_P0_PWR_GOOD","MON_PWROK","MON_RESET", ++ /*F0-F7*/ "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP","MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","", ++ /*G0-G7*/ "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0","P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","", ++ /*H0-H7*/ "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3","PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1", ++ /*I0-I7*/ "","","","","","","","", ++ /*J0-J7*/ "","","","","","","","", ++ /*K0-K7*/ "","","","","","","","", ++ /*L0-L7*/ "","","","","","","","", ++ /*M0-M7*/ "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN","ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT","ASSERT_CLR_CMOS","ASSERT_BMC_READY", ++ /*N0-N7*/ "","","","","","","","", ++ /*O0-O7*/ "","","","","","","","", ++ /*P0-P7*/ "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT","P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT","P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT","P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT", ++ /*Q0-Q7*/ "","","","","","","","", ++ /*R0-R7*/ "","","","","","","","", ++ /*S0-S7*/ "","","","","","","","", ++ /*T0-T7*/ "","","","","","","","", ++ /*U0-U7*/ "","","","","","","","", ++ /*V0-V7*/ "","","","","","","","", ++ /*W0-W7*/ "","","","","","","","", ++ /*X0-X7*/ "","","","","","","","", ++ /*Y0-Y7*/ "","","","","","","","", ++ /*Z0-Z7*/ "","","","","","","","", ++ /*AA0-AA7*/ "","SENSOR THERM","","","","","","", ++ /*AB0-AB7*/ "","","","","","","","", ++ /*AC0-AC7*/ "","","","","","","",""; ++}; ++ + //APML for P0 + &i2c0 { + status = "okay"; +-- +2.17.1 + |