diff options
Diffstat (limited to 'meta-asrock')
3 files changed, 111 insertions, 0 deletions
diff --git a/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf b/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf index ad67ece3f..ab79b520f 100644 --- a/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf +++ b/meta-asrock/meta-e3c246d4i/conf/machine/e3c246d4i.conf @@ -8,5 +8,13 @@ FLASH_SIZE = "32768" require conf/machine/include/ast2500.inc require conf/machine/include/obmc-bsp-common.inc +# This is necessary for the host to boot properly -- without it, the ast2500 +# Super-IO is left enabled (SCU70[20]=0), which causes the host boot sequence +# to hang during POST. +require conf/distro/include/phosphor-isolation.inc + PREFERRED_PROVIDER_virtual/obmc-flash-mgmt = "packagegroup-asrock-apps" PREFERRED_PROVIDER_virtual/obmc-system-mgmt = "packagegroup-asrock-apps" + +VIRTUAL-RUNTIME_obmc-host-state-manager = "x86-power-control" +VIRTUAL-RUNTIME_obmc-chassis-state-manager = "x86-power-control" diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json new file mode 100644 index 000000000..e46faca11 --- /dev/null +++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control/power-config-host0.json @@ -0,0 +1,93 @@ +{ + "gpio_configs": [ + { + "Name" : "IdButton", + "LineName" : "", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "NMIButton", + "LineName" : "NMI_BTN_N", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "NMIOut", + "LineName" : "BMC_NMI", + "Type" : "GPIO", + "Polarity": "ActiveHigh" + }, + { + "Name" : "PostComplete", + "LineName" : "FM_BIOS_POST_CMPLT_N", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "PowerButton", + "LineName" : "BMC_PSIN", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "PowerOk", + /* + * The e3c246d4i doesn't have a PS_PWROK signal as far as + * I can tell. It does have an O_PWROK line that's driven + * by the SuperIO chip, which may "actually" be + * SioPowerGood, but it seems to work for this, so...? + */ + "LineName" : "O_PWROK", + "Type" : "GPIO", + "Polarity": "ActiveHigh" + }, + { + "Name" : "PowerOut", + "LineName" : "BMC_PSOUT", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "ResetButton", + "LineName" : "BMC_RESETCON", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "ResetOut", + "LineName" : "RESETCON", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "SioOnControl", + "LineName" : "", + "Type" : "GPIO", + "Polarity": "ActiveLow" + }, + { + "Name" : "SioPowerGood", + "LineName" : "", + "Type" : "GPIO", + "Polarity": "ActiveHigh" + }, + { + "Name" : "SIOS5", + "LineName" : "SLP_S5", + "Type" : "GPIO", + "Polarity": "ActiveLow" + } + ], + "timing_configs": { + "PowerPulseMs": 200, + "ForceOffPulseMs": 15000, + "ResetPulseMs": 500, + "PowerCycleMs": 5000, + "SioPowerGoodWatchdogMs": 1000, + "PsPowerOKWatchdogMs": 8000, + "GracefulPowerOffS": 300, + "WarmResetCheckMs": 500, + "PowerOffSaveMs": 7000 + } +} diff --git a/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend new file mode 100644 index 000000000..f54fe0695 --- /dev/null +++ b/meta-asrock/meta-e3c246d4i/recipes-x86/chassis/x86-power-control_%.bbappend @@ -0,0 +1,10 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +SRC_URI += " \ + file://power-config-host0.json \ + " + +do_install:append() { + install -d ${D}/${datadir}/${PN} + install -m 0644 ${WORKDIR}/power-config-host0.json ${D}/${datadir}/${PN} +} |