diff options
Diffstat (limited to 'meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch | 33 |
1 files changed, 19 insertions, 14 deletions
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch index 119db1318..23fc22ea7 100644 --- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0025-ast2600-PFR-platform-EXTRST-reset-mask-selection.patch @@ -1,9 +1,8 @@ -From 298f34e528c3e64e5e10403380832df91f986f12 Mon Sep 17 00:00:00 2001 -From: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> -Date: Tue, 8 Dec 2020 10:44:53 +0000 -Subject: [PATCH] ast2600:PFR platform - EXTRST# reset mask selection +From 5ca28a9259d084440879be48ef4b4d6716794281 Mon Sep 17 00:00:00 2001 +From: Vikram Bodireddy <vikram.bodireddy@intel.com> +Date: Mon, 22 Feb 2021 17:22:16 +0530 +Subject: [PATCH] ast2600-PFR-platform-EXTRST-reset-mask-selection -This is a fix taken from Purely PFR. This commit will enable specific reset mask for EXTRST# signal. On PFR platforms, EXTRST# signal is used by PFR CPLD to put BMC in reset during firmware authentications, recovery and firmware @@ -11,29 +10,35 @@ update flow, during which certain modules of BMC should be chosen to be reset so that Host functionality would be intact. Signed-off-by: Chalapathi Venkataramashetty <chalapathix.venkataramashetty@intel.com> +Signed-off-by: Vikram Bodireddy <vikram.bodireddy@intel.com> --- - arch/arm/mach-aspeed/ast2600/platform.S | 6 ++++++ - 1 file changed, 6 insertions(+) + arch/arm/mach-aspeed/ast2600/platform.S | 11 +++++++++++ + 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-aspeed/ast2600/platform.S b/arch/arm/mach-aspeed/ast2600/platform.S -index cd8a57edd7..6756aee804 100644 +index ecc9fd33d1..8c40515b76 100644 --- a/arch/arm/mach-aspeed/ast2600/platform.S +++ b/arch/arm/mach-aspeed/ast2600/platform.S -@@ -39,6 +39,7 @@ +@@ -39,6 +39,8 @@ #define AST_SCU_REV_ID (AST_SCU_BASE + 0x014) #define AST_SCU_SYSRST_CTRL (AST_SCU_BASE + 0x040) #define AST_SCU_SYSRST_CTRL_CLR (AST_SCU_BASE + 0x044) -+#define AST_SCU_EXTRST_SEL (AST_SCU_BASE + 0x060) ++#define AST_SCU_EXTRST_SEL1 (AST_SCU_BASE + 0x060) ++#define AST_SCU_EXTRST_SEL2 (AST_SCU_BASE + 0x070) #define AST_SCU_DEBUG_CTRL (AST_SCU_BASE + 0x0C8) #define AST_SCU_DEBUG_CTRL2 (AST_SCU_BASE + 0x0D8) #define AST_SCU_HPLL_PARAM (AST_SCU_BASE + 0x200) -@@ -285,6 +286,11 @@ wait_lock: +@@ -285,6 +287,15 @@ wait_lock: str r1, [r0] 1: -+ /* SCU060:EXTRST# reset mask selection */ -+ ldr r0, =AST_SCU_EXTRST_SEL -+ ldr r1, =0x00FF1FF5 ++ /* SCU060:EXTRST1# reset mask selection */ ++ ldr r0, =AST_SCU_EXTRST_SEL1 ++ ldr r1, =0x6FF1FF5 ++ str r1, [r0] ++ /* SCU070:EXTRST2# reset mask selection */ ++ ldr r0, =AST_SCU_EXTRST_SEL2 ++ ldr r1, =0x3FFFFF7 + str r1, [r0] + /* disable eSPI, LPC and PWM resets on WDT1 reset */ |