diff options
Diffstat (limited to 'meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch')
-rw-r--r-- | meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch | 244 |
1 files changed, 0 insertions, 244 deletions
diff --git a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch b/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch deleted file mode 100644 index 4210d9f67..000000000 --- a/meta-openbmc-mods/meta-common/recipes-kernel/linux/linux-aspeed/0009-SGPIO-DT-and-pinctrl-fixup.patch +++ /dev/null @@ -1,244 +0,0 @@ -From 0f63ecc25766fdf66610d08441e59147a4cbde78 Mon Sep 17 00:00:00 2001 -From: Vernon Mauery <vernon.mauery@intel.com> -Date: Wed, 16 May 2018 10:03:14 -0700 -Subject: [PATCH] SGPIO DT and pinctrl fixup - -This commit fixes DT and pinctrl for SGPIO use. - -Signed-off-by: Vernon Mauery <vernon.mauery@intel.com> -Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> ---- - arch/arm/boot/dts/aspeed-g4.dtsi | 56 +++++++++++------------------- - arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++ - drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 48 ++++++++++++------------- - drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 +++ - 4 files changed, 58 insertions(+), 60 deletions(-) - -diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi -index fd857be397bf..58306a8232c9 100644 ---- a/arch/arm/boot/dts/aspeed-g4.dtsi -+++ b/arch/arm/boot/dts/aspeed-g4.dtsi -@@ -207,6 +207,20 @@ - #interrupt-cells = <2>; - }; - -+ sgpio: sgpio@1e780200 { -+ #gpio-cells = <2>; -+ gpio-controller; -+ compatible = "aspeed,ast2400-sgpio"; -+ reg = <0x1e780200 0x0100>; -+ interrupts = <40>; -+ interrupt-controller; -+ clocks = <&syscon ASPEED_CLK_APB>; -+ bus-frequency = <1000000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_sgpm_default>; -+ status = "disabled"; -+ }; -+ - timer: timer@1e782000 { - /* This timer is a Faraday FTTMR010 derivative */ - compatible = "aspeed,ast2400-timer"; -@@ -1180,44 +1194,14 @@ - groups = "SD2"; - }; - -- pinctrl_sgpmck_default: sgpmck_default { -- function = "SGPMCK"; -- groups = "SGPMCK"; -- }; -- -- pinctrl_sgpmi_default: sgpmi_default { -- function = "SGPMI"; -- groups = "SGPMI"; -- }; -- -- pinctrl_sgpmld_default: sgpmld_default { -- function = "SGPMLD"; -- groups = "SGPMLD"; -- }; -- -- pinctrl_sgpmo_default: sgpmo_default { -- function = "SGPMO"; -- groups = "SGPMO"; -- }; -- -- pinctrl_sgpsck_default: sgpsck_default { -- function = "SGPSCK"; -- groups = "SGPSCK"; -- }; -- -- pinctrl_sgpsi0_default: sgpsi0_default { -- function = "SGPSI0"; -- groups = "SGPSI0"; -- }; -- -- pinctrl_sgpsi1_default: sgpsi1_default { -- function = "SGPSI1"; -- groups = "SGPSI1"; -+ pinctrl_sgpm_default: sgpm_default { -+ function = "SGPM"; -+ groups = "SGPM"; - }; - -- pinctrl_sgpsld_default: sgpsld_default { -- function = "SGPSLD"; -- groups = "SGPSLD"; -+ pinctrl_sgps_default: sgps_default { -+ function = "SGPS"; -+ groups = "SGPS"; - }; - - pinctrl_sioonctrl_default: sioonctrl_default { -diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi -index db82f47339aa..425a542690de 100644 ---- a/arch/arm/boot/dts/aspeed-g5.dtsi -+++ b/arch/arm/boot/dts/aspeed-g5.dtsi -@@ -298,6 +298,11 @@ - reg = <0x1e780200 0x0100>; - interrupts = <40>; - interrupt-controller; -+ clocks = <&syscon ASPEED_CLK_APB>; -+ bus-frequency = <1000000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_sgpm_default>; -+ status = "disabled"; - }; - - rtc: rtc@1e781000 { -@@ -1403,6 +1408,11 @@ - groups = "SDA2"; - }; - -+ pinctrl_sgpm_default: sgpm_default { -+ function = "SGPM"; -+ groups = "SGPM"; -+ }; -+ - pinctrl_sgps1_default: sgps1_default { - function = "SGPS1"; - groups = "SGPS1"; -diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c -index 384396cbb22d..a78ed8c33e96 100644 ---- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c -+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c -@@ -423,16 +423,22 @@ SSSF_PIN_DECL(E16, GPIOF6, TXD4, SIG_DESC_SET(SCU80, 30)); - SSSF_PIN_DECL(C17, GPIOF7, RXD4, SIG_DESC_SET(SCU80, 31)); - - #define A14 48 --SSSF_PIN_DECL(A14, GPIOG0, SGPSCK, SIG_DESC_SET(SCU84, 0)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPSCK, SGPS, SIG_DESC_SET(SCU84, 0)); -+SS_PIN_DECL(A14, GPIOG0, SGPSCK); - - #define E13 49 --SSSF_PIN_DECL(E13, GPIOG1, SGPSLD, SIG_DESC_SET(SCU84, 1)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPSLD, SGPS, SIG_DESC_SET(SCU84, 1)); -+SS_PIN_DECL(E13, GPIOG1, SGPSLD); - - #define D13 50 --SSSF_PIN_DECL(D13, GPIOG2, SGPSI0, SIG_DESC_SET(SCU84, 2)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPSIO, SGPS, SIG_DESC_SET(SCU84, 2)); -+SS_PIN_DECL(D13, GPIOG2, SGPSIO); - - #define C13 51 --SSSF_PIN_DECL(C13, GPIOG3, SGPSI1, SIG_DESC_SET(SCU84, 3)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPSI1, SGPS, SIG_DESC_SET(SCU84, 3)); -+SS_PIN_DECL(C13, GPIOG3, SGPSI1); -+ -+FUNC_GROUP_DECL(SGPS, A14, E13, D13, C13); - - #define B13 52 - SIG_EXPR_LIST_DECL_SINGLE(OSCCLK, OSCCLK, SIG_DESC_SET(SCU2C, 1)); -@@ -598,16 +604,22 @@ FUNC_GROUP_DECL(SPI1PASSTHRU, C22, G18, D19, C20, B22, G19, C18, E20); - FUNC_GROUP_DECL(VGABIOS_ROM, B22, G19, C18, E20); - - #define J5 72 --SSSF_PIN_DECL(J5, GPIOJ0, SGPMCK, SIG_DESC_SET(SCU84, 8)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPMCK, SGPM, SIG_DESC_SET(SCU84, 8)); -+SS_PIN_DECL(J5, GPIOJ0, SGPMCK); - - #define J4 73 --SSSF_PIN_DECL(J4, GPIOJ1, SGPMLD, SIG_DESC_SET(SCU84, 9)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPMLD, SGPM, SIG_DESC_SET(SCU84, 9)); -+SS_PIN_DECL(J4, GPIOJ1, SGPMLD); - - #define K5 74 --SSSF_PIN_DECL(K5, GPIOJ2, SGPMO, SIG_DESC_SET(SCU84, 10)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPMO, SGPM, SIG_DESC_SET(SCU84, 10)); -+SS_PIN_DECL(K5, GPIOJ2, SGPMO); - - #define J3 75 --SSSF_PIN_DECL(J3, GPIOJ3, SGPMI, SIG_DESC_SET(SCU84, 11)); -+SIG_EXPR_LIST_DECL_SINGLE(SGPMI, SGPM, SIG_DESC_SET(SCU84, 11)); -+SS_PIN_DECL(J3, GPIOJ3, SGPMI); -+ -+FUNC_GROUP_DECL(SGPM, J5, J4, K5, J3); - - #define T4 76 - SSSF_PIN_DECL(T4, GPIOJ4, VGAHS, SIG_DESC_SET(SCU84, 12)); -@@ -2105,14 +2117,8 @@ static const struct aspeed_pin_group aspeed_g4_groups[] = { - ASPEED_PINCTRL_GROUP(SALT4), - ASPEED_PINCTRL_GROUP(SD1), - ASPEED_PINCTRL_GROUP(SD2), -- ASPEED_PINCTRL_GROUP(SGPMCK), -- ASPEED_PINCTRL_GROUP(SGPMI), -- ASPEED_PINCTRL_GROUP(SGPMLD), -- ASPEED_PINCTRL_GROUP(SGPMO), -- ASPEED_PINCTRL_GROUP(SGPSCK), -- ASPEED_PINCTRL_GROUP(SGPSI0), -- ASPEED_PINCTRL_GROUP(SGPSI1), -- ASPEED_PINCTRL_GROUP(SGPSLD), -+ ASPEED_PINCTRL_GROUP(SGPM), -+ ASPEED_PINCTRL_GROUP(SGPS), - ASPEED_PINCTRL_GROUP(SIOONCTRL), - ASPEED_PINCTRL_GROUP(SIOPBI), - ASPEED_PINCTRL_GROUP(SIOPBO), -@@ -2260,14 +2266,8 @@ static const struct aspeed_pin_function aspeed_g4_functions[] = { - ASPEED_PINCTRL_FUNC(SALT4), - ASPEED_PINCTRL_FUNC(SD1), - ASPEED_PINCTRL_FUNC(SD2), -- ASPEED_PINCTRL_FUNC(SGPMCK), -- ASPEED_PINCTRL_FUNC(SGPMI), -- ASPEED_PINCTRL_FUNC(SGPMLD), -- ASPEED_PINCTRL_FUNC(SGPMO), -- ASPEED_PINCTRL_FUNC(SGPSCK), -- ASPEED_PINCTRL_FUNC(SGPSI0), -- ASPEED_PINCTRL_FUNC(SGPSI1), -- ASPEED_PINCTRL_FUNC(SGPSLD), -+ ASPEED_PINCTRL_FUNC(SGPM), -+ ASPEED_PINCTRL_FUNC(SGPS), - ASPEED_PINCTRL_FUNC(SIOONCTRL), - ASPEED_PINCTRL_FUNC(SIOPBI), - ASPEED_PINCTRL_FUNC(SIOPBO), -diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -index 6f151e7c8d81..c088f010c554 100644 ---- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c -@@ -599,6 +599,8 @@ SS_PIN_DECL(N3, GPIOJ2, SGPMO); - SIG_EXPR_LIST_DECL_SINGLE(SGPMI, SGPM, SIG_DESC_SET(SCU84, 11)); - SS_PIN_DECL(N4, GPIOJ3, SGPMI); - -+FUNC_GROUP_DECL(SGPM, R2, L2, N3, N4); -+ - #define N5 76 - SIG_EXPR_LIST_DECL_SINGLE(VGAHS, VGAHS, SIG_DESC_SET(SCU84, 12)); - SIG_EXPR_LIST_DECL_SINGLE(DASHN5, DASHN5, SIG_DESC_SET(SCU94, 8)); -@@ -2149,6 +2151,7 @@ static const struct aspeed_pin_group aspeed_g5_groups[] = { - ASPEED_PINCTRL_GROUP(SD2), - ASPEED_PINCTRL_GROUP(SDA1), - ASPEED_PINCTRL_GROUP(SDA2), -+ ASPEED_PINCTRL_GROUP(SGPM), - ASPEED_PINCTRL_GROUP(SGPS1), - ASPEED_PINCTRL_GROUP(SGPS2), - ASPEED_PINCTRL_GROUP(SIOONCTRL), -@@ -2318,6 +2321,7 @@ static const struct aspeed_pin_function aspeed_g5_functions[] = { - ASPEED_PINCTRL_FUNC(SD2), - ASPEED_PINCTRL_FUNC(SDA1), - ASPEED_PINCTRL_FUNC(SDA2), -+ ASPEED_PINCTRL_FUNC(SGPM), - ASPEED_PINCTRL_FUNC(SGPS1), - ASPEED_PINCTRL_FUNC(SGPS2), - ASPEED_PINCTRL_FUNC(SIOONCTRL), --- -2.7.4 - |