1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
|
From 320cf189fd017e3578b6949ff640213d7bddb20c Mon Sep 17 00:00:00 2001
From: Vernon Mauery <vernon.mauery@linux.intel.com>
Date: Fri, 16 Nov 2018 14:44:49 -0800
Subject: [PATCH] Add basic timer support for Aspeed g5 in U-Boot
Timers will be used for timing events and making blinky LEDs. This just
adds the API and infrastructure.
Change-Id: I8ff03b26070b43a47fb970ddf6124d6c3f29b058
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
---
board/aspeed/ast-g5/Makefile | 1 +
board/aspeed/ast-g5/ast-g5-intel.c | 1 +
board/aspeed/ast-g5/ast-g5-timer.c | 66 ++++++++++++++++++++++++++++++++++++++
board/aspeed/ast-g5/ast-g5-timer.h | 27 ++++++++++++++++
board/aspeed/ast-g5/ast-g5.h | 1 +
5 files changed, 96 insertions(+)
create mode 100644 board/aspeed/ast-g5/ast-g5-timer.c
create mode 100644 board/aspeed/ast-g5/ast-g5-timer.h
diff --git a/board/aspeed/ast-g5/Makefile b/board/aspeed/ast-g5/Makefile
index 2970ae5..9022433 100644
--- a/board/aspeed/ast-g5/Makefile
+++ b/board/aspeed/ast-g5/Makefile
@@ -3,3 +3,4 @@ obj-y += ast-g5-intel.o
obj-y += ast-g5-espi.o
obj-y += ast-g5-irq.o
obj-y += ast-g5-gpio.o
+obj-y += ast-g5-timer.o
diff --git a/board/aspeed/ast-g5/ast-g5-intel.c b/board/aspeed/ast-g5/ast-g5-intel.c
index 144765a..6e45cb4 100644
--- a/board/aspeed/ast-g5/ast-g5-intel.c
+++ b/board/aspeed/ast-g5/ast-g5-intel.c
@@ -15,6 +15,7 @@
#include "ast-g5.h"
#include "ast-g5-gpio.h"
+#include "ast-g5-timer.h"
/* Names to match the GPIOs */
enum gpio_names {
diff --git a/board/aspeed/ast-g5/ast-g5-timer.c b/board/aspeed/ast-g5/ast-g5-timer.c
new file mode 100644
index 0000000..5615722
--- /dev/null
+++ b/board/aspeed/ast-g5/ast-g5-timer.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright 2018 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/regs-scu.h>
+#include <asm/arch/ast_scu.h>
+#include <asm/arch/aspeed.h>
+
+#include "ast-g5.h"
+#include "ast-g5-timer.h"
+#include "ast-g5-irq.h"
+
+static const int timer_irqs[] = {16, 17, 18, 35, 37, 37, 38, 39};
+/* offsets from AST_TIMER_BASE for each timer */
+static const uint32_t timer_bases[] = {0, 0x10, 0x20, 0x40,
+ 0x50, 0x60, 0x70, 0x80};
+#define TIMER_1MHZ_CLK_COUNT 1000000u
+#define TIMER_ENABLE 1
+#define TIMER_1MHZ_CLK_SEL 2
+#define TIMER_ENABLE_IRQ 4
+#define TIMER_ENABLE_PULSE 8
+#define TIMER_CONTROL 0x30
+#define TIMER_RELOAD 0x04
+
+void timer_enable(int n, uint32_t freq, interrupt_handler_t *handler)
+{
+ if (n < 0 || n > 7) {
+ return;
+ }
+ uint32_t tctrl = readl(AST_TIMER_BASE + TIMER_CONTROL);
+ writel(tctrl & ~(0x0f << (n * 4)), AST_TIMER_BASE + TIMER_CONTROL);
+
+ // figure out best base for requested frequency
+ // (this will give 1MHz clock preference if period is within 1ms of
+ // requested)
+ uint32_t v = TIMER_1MHZ_CLK_COUNT / freq;
+ if (v > 1000 || v * freq == TIMER_1MHZ_CLK_COUNT) {
+ tctrl |= (TIMER_1MHZ_CLK_SEL << (n * 4));
+ } else {
+ uint32_t pclk = ast_get_ahbclk();
+ v = pclk / freq;
+ }
+ writel(v, AST_TIMER_BASE + timer_bases[n] + TIMER_RELOAD);
+ if (handler) {
+ request_irq(timer_irqs[n], handler);
+ tctrl |= (TIMER_ENABLE_IRQ << (n * 4));
+ }
+ tctrl |= (TIMER_ENABLE << (n * 4));
+ writel(tctrl, AST_TIMER_BASE + TIMER_CONTROL);
+}
+
+void timer_disable(int n)
+{
+ if (n < 0 || n > 7) {
+ return;
+ }
+ uint32_t tctrl = readl(AST_TIMER_BASE + TIMER_CONTROL);
+ writel(tctrl & ~(0x0f << (n * 4)), AST_TIMER_BASE + TIMER_CONTROL);
+}
diff --git a/board/aspeed/ast-g5/ast-g5-timer.h b/board/aspeed/ast-g5/ast-g5-timer.h
new file mode 100644
index 0000000..4b1ac28
--- /dev/null
+++ b/board/aspeed/ast-g5/ast-g5-timer.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2018 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef __AST_G5_TIMER_H__
+#define __AST_G5_TIMER_H__
+
+#include <common.h>
+
+#define TIMER_1 0
+#define TIMER_2 1
+#define TIMER_3 2
+#define TIMER_4 3
+#define TIMER_5 4
+#define TIMER_6 5
+#define TIMER_7 6
+#define TIMER_8 7
+
+void timer_enable(int n, uint32_t freq, interrupt_handler_t handler);
+void timer_disable(int n);
+
+#endif /* __AST_G5_TIMER_H__ */
diff --git a/board/aspeed/ast-g5/ast-g5.h b/board/aspeed/ast-g5/ast-g5.h
index 908db14..28fe5ea 100644
--- a/board/aspeed/ast-g5/ast-g5.h
+++ b/board/aspeed/ast-g5/ast-g5.h
@@ -4,5 +4,6 @@
#include <common.h>
#include "ast-g5-irq.h"
#include "ast-g5-gpio.h"
+#include "ast-g5-timer.h"
#endif /* _AST_G5_H_ */
|
