diff options
Diffstat (limited to 'meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a')
20 files changed, 899 insertions, 0 deletions
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch new file mode 100644 index 0000000000..016de8d3de --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/corstone1000/0001-Fix-FF-A-version-in-SPMC-manifest.patch @@ -0,0 +1,34 @@ +Upstream-Status: Inappropriate +Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> + +From a31aee0988ef64724ec5866f10709f51f8cb3237 Mon Sep 17 00:00:00 2001 +From: emeara01 <emekcan.aras@arm.com> +Date: Wed, 11 May 2022 14:37:06 +0100 +Subject: [PATCH] Fix FF-A version in SPMC manifest + +OPTEE does not support FF-A version 1.1 in SPMC at the moment. +This commit corrects the FF-A version in corstone1000_spmc_manifest.dts. +This patch will not be upstreamed and will be dropped once +OPTEE version is updated for Corstone1000. + +Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com> +--- + .../corstone1000/common/fdts/corstone1000_spmc_manifest.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts b/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts +index 8e49ab83f..5baa1b115 100644 +--- a/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts ++++ b/plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts +@@ -20,7 +20,7 @@ + attribute { + spmc_id = <0x8000>; + maj_ver = <0x1>; +- min_ver = <0x1>; ++ min_ver = <0x0>; + exec_state = <0x0>; + load_address = <0x0 0x2002000>; + entrypoint = <0x0 0x2002000>; +-- +2.17.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/bl_size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/bl_size.patch new file mode 100644 index 0000000000..a5b30195d4 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/n1sdp/bl_size.patch @@ -0,0 +1,40 @@ +From 80b1efa92486a87f9e82dbf665ef612291148de8 Mon Sep 17 00:00:00 2001 +From: Adam Johnston <adam.johnston@arm.com> +Date: Tue, 14 Jun 2022 11:19:30 +0000 +Subject: [PATCH] arm-bsp/trusted-firmware-a: N1SDP trusted boot + +Increase max size of BL2 on N1SDP by 4KB to enable trusted boot +Decrease max size of BL1 on N1SDP by 8KB so BL1/BL2 fits above BL31 progbits + +Signed-off-by: Adam Johnston <adam.johnston@arm.com> +Upstream-Status: Pending [Flagged to upstream] + +--- + plat/arm/board/n1sdp/include/platform_def.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h +index c9b81bafa..7468a31ed 100644 +--- a/plat/arm/board/n1sdp/include/platform_def.h ++++ b/plat/arm/board/n1sdp/include/platform_def.h +@@ -91,7 +91,7 @@ + * PLAT_ARM_MAX_BL1_RW_SIZE is calculated using the current BL1 RW debug size + * plus a little space for growth. + */ +-#define PLAT_ARM_MAX_BL1_RW_SIZE 0xE000 ++#define PLAT_ARM_MAX_BL1_RW_SIZE 0xC000 + + /* + * PLAT_ARM_MAX_ROMLIB_RW_SIZE is define to use a full page +@@ -110,7 +110,7 @@ + * little space for growth. + */ + #if TRUSTED_BOARD_BOOT +-# define PLAT_ARM_MAX_BL2_SIZE 0x20000 ++# define PLAT_ARM_MAX_BL2_SIZE 0x21000 + #else + # define PLAT_ARM_MAX_BL2_SIZE 0x14000 + #endif +-- +2.35.1 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch new file mode 100644 index 0000000000..74ab3612c1 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0001-plat-tc-Increase-maximum-BL2-size.patch @@ -0,0 +1,43 @@ +From 008cfc6457c239466ca62610d59aaf1a78f6b2f6 Mon Sep 17 00:00:00 2001 +From: Tudor Cretu <tudor.cretu@arm.com> +Date: Fri, 21 May 2021 14:56:37 +0000 +Subject: [PATCH 1/7] plat: tc: Increase maximum BL2 size. + +BL2 size gets increased due to the firmware update changes. +Increase the MAX_BL2_SIZE by 8Kb. + +Signed-off-by: Tudor Cretu <tudor.cretu@arm.com> +Change-Id: I1cb28b0eb7f834426873ff9f4c40bd496413806f +Upstream-Status: Pending [Not submitted to upstream yet] +--- + plat/arm/board/tc/include/platform_def.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h +index 745d91cab..cd77773aa 100644 +--- a/plat/arm/board/tc/include/platform_def.h ++++ b/plat/arm/board/tc/include/platform_def.h +@@ -120,9 +120,9 @@ + * little space for growth. + */ + #if TRUSTED_BOARD_BOOT +-# define PLAT_ARM_MAX_BL2_SIZE 0x20000 ++# define PLAT_ARM_MAX_BL2_SIZE 0x25000 + #else +-# define PLAT_ARM_MAX_BL2_SIZE 0x14000 ++# define PLAT_ARM_MAX_BL2_SIZE 0x19000 + #endif + + /* +@@ -130,7 +130,7 @@ + * calculated using the current BL31 PROGBITS debug size plus the sizes of + * BL2 and BL1-RW + */ +-#define PLAT_ARM_MAX_BL31_SIZE 0x3F000 ++#define PLAT_ARM_MAX_BL31_SIZE 0x4F000 + + /* + * Size of cacheable stacks +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch new file mode 100644 index 0000000000..75cabdd8d1 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0002-Makefile-add-trusty_sp_fw_config-build-option.patch @@ -0,0 +1,46 @@ +From 2f8b0cc6be3787717247d1c02a45181a5ac6f125 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Mon, 11 Apr 2022 14:36:54 +0100 +Subject: [PATCH 2/7] Makefile: add trusty_sp_fw_config build option + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: Ief90ae9113d32265ee2200f35f3e517b7b9a4bea +Upstream-Status: Pending [Not submitted to upstream yet] +--- + Makefile | 4 ++++ + docs/plat/arm/arm-build-options.rst | 4 ++++ + 2 files changed, 8 insertions(+) + +diff --git a/Makefile b/Makefile +index 3941f8698..a20d647a2 100644 +--- a/Makefile ++++ b/Makefile +@@ -531,6 +531,10 @@ ifneq (${SPD},none) + DTC_CPPFLAGS += -DOPTEE_SP_FW_CONFIG + endif + ++ ifeq ($(findstring trusty_sp,$(ARM_SPMC_MANIFEST_DTS)),trusty_sp) ++ DTC_CPPFLAGS += -DTRUSTY_SP_FW_CONFIG ++ endif ++ + ifeq ($(TS_SP_FW_CONFIG),1) + DTC_CPPFLAGS += -DTS_SP_FW_CONFIG + endif +diff --git a/docs/plat/arm/arm-build-options.rst b/docs/plat/arm/arm-build-options.rst +index 339ebbe33..3c9a41fb8 100644 +--- a/docs/plat/arm/arm-build-options.rst ++++ b/docs/plat/arm/arm-build-options.rst +@@ -107,6 +107,10 @@ Arm Platform Build Options + device tree. This flag is defined only when ``ARM_SPMC_MANIFEST_DTS`` manifest + file name contains pattern optee_sp. + ++- ``TRUSTY_SP_FW_CONFIG``: DTC build flag to include Trusty as SP in ++ tb_fw_config device tree. This flag is defined only when ++ ``ARM_SPMC_MANIFEST_DTS`` manifest file name contains pattern trusty_sp. ++ + - ``TS_SP_FW_CONFIG``: DTC build flag to include Trusted Services (Crypto and + internal-trusted-storage) as SP in tb_fw_config device tree. + +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch new file mode 100644 index 0000000000..6807191e6c --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0003-fix-plat-arm-increase-sp-max-image-size.patch @@ -0,0 +1,30 @@ +From 0060b1a4fbe3bc9992f59a2d4cb986821f7bcf13 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Mon, 11 Apr 2022 18:31:01 +0100 +Subject: [PATCH 3/7] fix(plat/arm): increase sp max image size + +Increase ARM_SP_MAX_SIZE to support Trusty image. + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: I9ef9e755769445aee998062a7fba508fad50b33e +Upstream-Status: Pending [Not submitted to upstream yet] +--- + include/plat/arm/common/fconf_arm_sp_getter.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/plat/arm/common/fconf_arm_sp_getter.h b/include/plat/arm/common/fconf_arm_sp_getter.h +index aa628dfd3..3ed953d1c 100644 +--- a/include/plat/arm/common/fconf_arm_sp_getter.h ++++ b/include/plat/arm/common/fconf_arm_sp_getter.h +@@ -13,7 +13,7 @@ + /* arm_sp getter */ + #define arm__sp_getter(prop) arm_sp.prop + +-#define ARM_SP_MAX_SIZE U(0xb0000) ++#define ARM_SP_MAX_SIZE U(0x2000000) + #define ARM_SP_OWNER_NAME_LEN U(8) + + struct arm_sp_t { +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch new file mode 100644 index 0000000000..aec8be0c60 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch @@ -0,0 +1,69 @@ +From 000e19d360a5ad9abd7d823af86a364bac2afc58 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Mon, 11 Apr 2022 17:38:17 +0100 +Subject: [PATCH 4/7] fix(plat/tc): increase tc_tzc_dram1_size + +Increase TC_TZC_DRAM1_SIZE for Trusty image and its memory size. +Update OP-TEE reserved memory range in DTS + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: Iad433c3c155f28860b15bde2398df653487189dd +Upstream-Status: Pending [Not submitted to upstream yet] +--- + fdts/tc.dts | 4 ++-- + plat/arm/board/tc/include/platform_def.h | 10 ++++++---- + 2 files changed, 8 insertions(+), 6 deletions(-) + +diff --git a/fdts/tc.dts b/fdts/tc.dts +index 20992294b..af64504a4 100644 +--- a/fdts/tc.dts ++++ b/fdts/tc.dts +@@ -213,8 +213,8 @@ + linux,cma-default; + }; + +- optee@0xfce00000 { +- reg = <0x00000000 0xfce00000 0 0x00200000>; ++ optee@0xf8e00000 { ++ reg = <0x00000000 0xf8e00000 0 0x00200000>; + no-map; + }; + }; +diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h +index cd77773aa..35d8fd24e 100644 +--- a/plat/arm/board/tc/include/platform_def.h ++++ b/plat/arm/board/tc/include/platform_def.h +@@ -31,7 +31,7 @@ + */ + #define TC_TZC_DRAM1_BASE (ARM_AP_TZC_DRAM1_BASE - \ + TC_TZC_DRAM1_SIZE) +-#define TC_TZC_DRAM1_SIZE UL(0x02000000) /* 32 MB */ ++#define TC_TZC_DRAM1_SIZE UL(0x06000000) /* 96 MB */ + #define TC_TZC_DRAM1_END (TC_TZC_DRAM1_BASE + \ + TC_TZC_DRAM1_SIZE - 1) + +@@ -68,7 +68,9 @@ + * max size of BL32 image. + */ + #if defined(SPD_spmd) +-#define PLAT_ARM_SPMC_BASE TC_TZC_DRAM1_BASE ++#define TC_EL2SPMC_LOAD_ADDR (TC_TZC_DRAM1_BASE + 0x04000000) ++ ++#define PLAT_ARM_SPMC_BASE TC_EL2SPMC_LOAD_ADDR + #define PLAT_ARM_SPMC_SIZE UL(0x200000) /* 2 MB */ + #endif + +@@ -259,8 +261,8 @@ + (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DEFAULT)) + + /* +- * The first region below, TC_TZC_DRAM1_BASE (0xfd000000) to +- * ARM_SCP_TZC_DRAM1_END (0xffffffff) will mark the last 48 MB of DRAM as ++ * The first region below, TC_TZC_DRAM1_BASE (0xf9000000) to ++ * ARM_SCP_TZC_DRAM1_END (0xffffffff) will mark the last 112 MB of DRAM as + * secure. The second and third regions gives non secure access to rest of DRAM. + */ + #define TC_TZC_REGIONS_DEF \ +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch new file mode 100644 index 0000000000..0b34683ee2 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch @@ -0,0 +1,169 @@ +From a04466ceb81a04c5179e8064837c34a89c2b11bd Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Mon, 11 Apr 2022 14:43:15 +0100 +Subject: [PATCH 5/7] feat(plat/tc): add spmc manifest with trusty sp + +Add SPMC manifest with Trusty SP. Define Trusty's load address, +vcpu count, memory size. + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: If4363580a478776d233f7f391a30e1cb345453c2 +Upstream-Status: Pending [Not submitted to upstream yet] +--- + .../tc/fdts/tc_spmc_trusty_sp_manifest.dts | 120 ++++++++++++++++++ + plat/arm/board/tc/fdts/tc_tb_fw_config.dts | 7 +- + 2 files changed, 126 insertions(+), 1 deletion(-) + create mode 100644 plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts + +diff --git a/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts b/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts +new file mode 100644 +index 000000000..e2ea7b811 +--- /dev/null ++++ b/plat/arm/board/tc/fdts/tc_spmc_trusty_sp_manifest.dts +@@ -0,0 +1,120 @@ ++/* ++ * Copyright (c) 2022, Arm Limited. All rights reserved. ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++/dts-v1/; ++ ++/ { ++ compatible = "arm,ffa-core-manifest-1.0"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ attribute { ++ spmc_id = <0x8000>; ++ maj_ver = <0x1>; ++ min_ver = <0x1>; ++ exec_state = <0x0>; ++ load_address = <0x0 0xfd000000>; ++ entrypoint = <0x0 0xfd000000>; ++ binary_size = <0x80000>; ++ }; ++ ++ hypervisor { ++ compatible = "hafnium,hafnium"; ++ vm1 { ++ is_ffa_partition; ++ debug_name = "trusty"; ++ load_address = <0xf901f000>; ++ vcpu_count = <8>; ++ mem_size = <0x3f00000>; /* 64MB TZC DRAM - 1MB align */ ++ }; ++#ifdef TS_SP_FW_CONFIG ++ vm2 { ++ is_ffa_partition; ++ debug_name = "internal-trusted-storage"; ++ load_address = <0xfee00000>; ++ vcpu_count = <1>; ++ mem_size = <2097152>; /* 2MB TZC DRAM */ ++ }; ++ vm3 { ++ is_ffa_partition; ++ debug_name = "crypto"; ++ load_address = <0xfec00000>; ++ vcpu_count = <1>; ++ mem_size = <2097152>; /* 2MB TZC DRAM */ ++ }; ++#endif ++ }; ++ ++ cpus { ++ #address-cells = <0x2>; ++ #size-cells = <0x0>; ++ ++ CPU0:cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x0>; ++ enable-method = "psci"; ++ }; ++ ++ /* ++ * SPMC (Hafnium) requires secondary cpu nodes are declared in ++ * descending order ++ */ ++ CPU7:cpu@700 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x700>; ++ enable-method = "psci"; ++ }; ++ ++ CPU6:cpu@600 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x600>; ++ enable-method = "psci"; ++ }; ++ ++ CPU5:cpu@500 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x500>; ++ enable-method = "psci"; ++ }; ++ ++ CPU4:cpu@400 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x400>; ++ enable-method = "psci"; ++ }; ++ ++ CPU3:cpu@300 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x300>; ++ enable-method = "psci"; ++ }; ++ ++ CPU2:cpu@200 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x200>; ++ enable-method = "psci"; ++ }; ++ ++ CPU1:cpu@100 { ++ device_type = "cpu"; ++ compatible = "arm,armv8"; ++ reg = <0x0 0x100>; ++ enable-method = "psci"; ++ }; ++ }; ++ ++ /* 96MB of TC_TZC_DRAM1_BASE */ ++ memory@f9000000 { ++ device_type = "memory"; ++ reg = <0x0 0xf9000000 0x6000000>; ++ }; ++}; +diff --git a/plat/arm/board/tc/fdts/tc_tb_fw_config.dts b/plat/arm/board/tc/fdts/tc_tb_fw_config.dts +index 4c6ccef25..a72772fb3 100644 +--- a/plat/arm/board/tc/fdts/tc_tb_fw_config.dts ++++ b/plat/arm/board/tc/fdts/tc_tb_fw_config.dts +@@ -1,5 +1,5 @@ + /* +- * Copyright (c) 2020-2021, Arm Limited. All rights reserved. ++ * Copyright (c) 2020-2022, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +@@ -47,6 +47,11 @@ + uuid = "486178e0-e7f8-11e3-bc5e-0002a5d5c51b"; + load-address = <0xfd280000>; + }; ++#elif TRUSTY_SP_FW_CONFIG ++ trusty { ++ uuid = "40ee25f0-a2bc-304c-8c4c-a173c57d8af1"; ++ load-address = <0xf901f000>; ++ }; + #else + cactus-primary { + uuid = "b4b5671e-4a90-4fe1-b81f-fb13dae1dacb"; +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch new file mode 100644 index 0000000000..e2bfb2c5f5 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch @@ -0,0 +1,50 @@ +From 96151af7eed28d63fdaa1ac6de2d14a9c71f1d4a Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Wed, 30 Mar 2022 12:14:49 +0000 +Subject: [PATCH 6/7] feat(plat/tc): update dts with trusty compatible string + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: Ic6661df479e114bf3f464165c14df5fa02dc0139 +Upstream-Status: Pending [Not submitted to upstream yet] +--- + fdts/tc.dts | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/fdts/tc.dts b/fdts/tc.dts +index af64504a4..dc86958bf 100644 +--- a/fdts/tc.dts ++++ b/fdts/tc.dts +@@ -555,4 +555,30 @@ + compatible = "arm,trace-buffer-extension"; + interrupts = <1 2 4>; + }; ++ ++ trusty { ++ #size-cells = <0x02>; ++ #address-cells = <0x02>; ++ ranges = <0x00>; ++ compatible = "android,trusty-v1"; ++ ++ virtio { ++ compatible = "android,trusty-virtio-v1"; ++ }; ++ ++ test { ++ compatible = "android,trusty-test-v1"; ++ }; ++ ++ log { ++ compatible = "android,trusty-log-v1"; ++ }; ++ ++ irq { ++ ipi-range = <0x08 0x0f 0x08>; ++ interrupt-ranges = <0x00 0x0f 0x00 0x10 0x1f 0x01 0x20 0x3f 0x02>; ++ interrupt-templates = <0x01 0x00 0x8001 0x01 0x01 0x04 0x8001 0x01 0x00 0x04>; ++ compatible = "android,trusty-irq-v1"; ++ }; ++ }; + }; +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch new file mode 100644 index 0000000000..91f5a9efa9 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/0007-fix-plat-tc-disable-smmu.patch @@ -0,0 +1,64 @@ +From 1a051bef6c63f6871edd8d87e969460f073820a7 Mon Sep 17 00:00:00 2001 +From: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Date: Wed, 27 Apr 2022 18:15:47 +0100 +Subject: [PATCH 7/7] fix(plat/tc): disable smmu + +Reserve static shared-dma-pool below 4GB. This removes dependency on +SMMU driver. As there are stability issues in SMMU driver, it is +disabled. This change is temporary and will be reverted upon proper +fix and testing. + +Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> +Change-Id: I6b1b4c2a0acdf62df8c26007c7ca596774e13710 +Upstream-Status: Pending [Not submitted to upstream yet] +--- + fdts/tc.dts | 16 +++------------- + 1 file changed, 3 insertions(+), 13 deletions(-) + +diff --git a/fdts/tc.dts b/fdts/tc.dts +index dc86958bf..fbae3e3e8 100644 +--- a/fdts/tc.dts ++++ b/fdts/tc.dts +@@ -209,12 +209,12 @@ + linux,cma { + compatible = "shared-dma-pool"; + reusable; +- size = <0x0 0x8000000>; ++ reg = <0x0 0xf1000000 0x0 0x8000000>; + linux,cma-default; + }; + +- optee@0xf8e00000 { +- reg = <0x00000000 0xf8e00000 0 0x00200000>; ++ optee@0xf0e00000 { ++ reg = <0x0 0xf0e00000 0 0x00200000>; + no-map; + }; + }; +@@ -460,13 +460,6 @@ + >; + }; + +- smmu: smmu@2ce00000 { +- #iommu-cells = <1>; +- compatible = "arm,smmu-v3"; +- reg = <0x0 0x2ce00000 0x0 0x20000>; +- status = "okay"; +- }; +- + dp0: display@2cc00000 { + #address-cells = <1>; + #size-cells = <0>; +@@ -476,9 +469,6 @@ + interrupt-names = "DPU"; + clocks = <&scmi_clk 0>; + clock-names = "aclk"; +- iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>, +- <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>, +- <&smmu 8>, <&smmu 9>; + pl0: pipeline@0 { + reg = <0>; + clocks = <&scmi_clk 1>; +-- +2.30.2 + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py new file mode 100644 index 0000000000..f3670ce1d1 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/files/tc/generate_metadata.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 +# Copyright (c) 2021, Arm Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause + +import argparse +import uuid +import zlib + +def main(metadata_file, img_type_uuids, location_uuids, img_uuids): + def add_field_to_metadata(value): + # Write the integer values to file in little endian representation + with open(metadata_file, "ab") as fp: + fp.write(value.to_bytes(4, byteorder='little')) + + def add_uuid_to_metadata(uuid_str): + # Validate UUID string and write to file in little endian representation + uuid_val = uuid.UUID(uuid_str) + with open(metadata_file, "ab") as fp: + fp.write(uuid_val.bytes_le) + + # Fill metadata preamble + add_field_to_metadata(1) #version=1 + add_field_to_metadata(0) #active_index=0 + add_field_to_metadata(0) #previous_active_index=0 + + for img_type_uuid, location_uuid in zip(img_type_uuids, location_uuids): + # Fill metadata image entry + add_uuid_to_metadata(img_type_uuid) # img_type_uuid + add_uuid_to_metadata(location_uuid) # location_uuid + + for img_uuid in img_uuids: + # Fill metadata bank image info + add_uuid_to_metadata(img_uuid) # image unique bank_uuid + add_field_to_metadata(1) # accepted=1 + add_field_to_metadata(0) # reserved (MBZ) + + # Prepend CRC32 + with open(metadata_file, 'rb+') as fp: + content = fp.read() + crc = zlib.crc32(content) + fp.seek(0) + fp.write(crc.to_bytes(4, byteorder='little') + content) + +if __name__ == "__main__": + parser = argparse.ArgumentParser() + parser.add_argument('--metadata_file', required=True, + help='Output binary file to store the metadata') + parser.add_argument('--img_type_uuids', type=str, nargs='+', required=True, + help='A list of UUIDs identifying the image types') + parser.add_argument('--location_uuids', type=str, nargs='+', required=True, + help='A list of UUIDs of the storage volumes where the images are located. ' + 'Must have the same length as img_type_uuids.') + parser.add_argument('--img_uuids', type=str, nargs='+', required=True, + help='A list UUIDs of the images in a firmware bank') + + args = parser.parse_args() + + if len(args.img_type_uuids) != len(args.location_uuids): + parser.print_help() + raise argparse.ArgumentError(None, 'Arguments img_type_uuids and location_uuids must have the same length.') + + main(args.metadata_file, args.img_type_uuids, args.location_uuids, args.img_uuids) diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend new file mode 100644 index 0000000000..ff22ff12de --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/tf-a-tests_2.7.0.bbappend @@ -0,0 +1,3 @@ +# Machine specific TFAs + +COMPATIBLE_MACHINE:corstone1000 = "corstone1000" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc new file mode 100644 index 0000000000..341c8a278a --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone1000.inc @@ -0,0 +1,42 @@ +# Corstone1000 64-bit machines specific TFA support + +COMPATIBLE_MACHINE = "(corstone1000)" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/corstone1000:" + +SRC_URI:append = " \ + file://0001-Fix-FF-A-version-in-SPMC-manifest.patch \ + " + +TFA_DEBUG = "1" +TFA_UBOOT ?= "1" +TFA_MBEDTLS = "1" +TFA_BUILD_TARGET = "bl2 bl31 fip" + +# Enabling Secure-EL1 Payload Dispatcher (SPD) +TFA_SPD = "spmd" +# Cortex-A35 supports Armv8.0-A (no S-EL2 execution state). +# So, the SPD SPMC component should run at the S-EL1 execution state +TFA_SPMD_SPM_AT_SEL2 = "0" + +# BL2 loads BL32 (optee). So, optee needs to be built first: +DEPENDS += "optee-os" + +EXTRA_OEMAKE:append = " \ + ARCH=aarch64 \ + TARGET_PLATFORM=${TFA_TARGET_PLATFORM} \ + ENABLE_STACK_PROTECTOR=strong \ + ENABLE_PIE=1 \ + BL2_AT_EL3=1 \ + CREATE_KEYS=1 \ + GENERATE_COT=1 \ + TRUSTED_BOARD_BOOT=1 \ + COT=tbbr \ + ARM_ROTPK_LOCATION=devel_rsa \ + ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem \ + BL32=${RECIPE_SYSROOT}/lib/firmware/tee-pager_v2.bin \ + LOG_LEVEL=50 \ + " + +# trigger TF-M build so TF-A binaries get signed +do_deploy[depends]+= "virtual/trusted-firmware-m:do_prepare_recipe_sysroot" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc new file mode 100644 index 0000000000..acd9e3dbfb --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-corstone500.inc @@ -0,0 +1,17 @@ +# Corstone-500 specific TFA support + +COMPATIBLE_MACHINE = "corstone500" +TFA_PLATFORM = "a5ds" +TFA_DEBUG = "1" +TFA_UBOOT = "1" +TFA_BUILD_TARGET = "all fip" +TFA_INSTALL_TARGET = "bl1.bin fip.bin" + +EXTRA_OEMAKE:append = " \ + ARCH=aarch32 \ + FVP_HW_CONFIG_DTS=fdts/a5ds.dts \ + ARM_ARCH_MAJOR=7 \ + AARCH32_SP=sp_min \ + ARM_CORTEX_A5=yes \ + ARM_XLAT_TABLES_LIB_V1=1 \ + " diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-arm32.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-arm32.inc new file mode 100644 index 0000000000..fdaadb9fc6 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp-arm32.inc @@ -0,0 +1,12 @@ +# Armv7-A FVP specific TFA parameters + +COMPATIBLE_MACHINE = "fvp-base-arm32" +TFA_PLATFORM = "fvp" +TFA_UBOOT = "1" +TFA_BUILD_TARGET = "dtbs bl1 bl32 fip" + +EXTRA_OEMAKE:append = " \ + ARCH=aarch32 \ + AARCH32_SP=sp_min \ + " + diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc new file mode 100644 index 0000000000..43340cdc7b --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-fvp.inc @@ -0,0 +1,12 @@ +# FVP specific TFA parameters + +# +# Armv8-A Base Platform FVP +# + +COMPATIBLE_MACHINE = "fvp-base" +TFA_PLATFORM = "fvp" +TFA_DEBUG = "1" +TFA_MBEDTLS = "1" +TFA_UBOOT = "1" +TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-juno.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-juno.inc new file mode 100644 index 0000000000..3ddd8cb5f2 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-juno.inc @@ -0,0 +1,13 @@ +# Juno specific TFA support + +COMPATIBLE_MACHINE = "juno" +TFA_PLATFORM = "juno" +TFA_DEBUG = "1" +TFA_MBEDTLS = "1" +TFA_UBOOT ?= "1" +TFA_BUILD_TARGET = "bl1 bl2 bl31 dtbs fip" + +# Juno needs the System Control Processor Firmware +DEPENDS += "virtual/control-processor-firmware" + +EXTRA_OEMAKE:append = " SCP_BL2=${RECIPE_SYSROOT}/firmware/scp_ramfw.bin" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc new file mode 100644 index 0000000000..f8a0b8d517 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-n1sdp.inc @@ -0,0 +1,24 @@ +# N1SDP specific TFA support + +COMPATIBLE_MACHINE = "n1sdp" +TFA_PLATFORM = "n1sdp" +TFA_BUILD_TARGET = "all fip" +TFA_INSTALL_TARGET = "bl1 bl2 bl31 n1sdp-multi-chip n1sdp-single-chip n1sdp_fw_config n1sdp_tb_fw_config fip" +TFA_DEBUG = "1" +TFA_MBEDTLS = "1" +TFA_UBOOT = "0" +TFA_UEFI = "1" + +SRC_URI:append = " file://bl_size.patch" + +TFA_ROT_KEY= "plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem" + +EXTRA_OEMAKE:append = "\ + TRUSTED_BOARD_BOOT=1 \ + GENERATE_COT=1 \ + CREATE_KEYS=1 \ + ENABLE_PIE=0 \ + ARM_ROTPK_LOCATION="devel_rsa" \ + ROT_KEY="${TFA_ROT_KEY}" \ + BL33=${RECIPE_SYSROOT}/firmware/uefi.bin \ + " diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-sgi575.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-sgi575.inc new file mode 100644 index 0000000000..20904b34cb --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-sgi575.inc @@ -0,0 +1,13 @@ +# SGI575 specific TFA support + +COMPATIBLE_MACHINE = "sgi575" +TFA_PLATFORM = "sgi575" +TFA_BUILD_TARGET = "all fip" +TFA_INSTALL_TARGET = "bl1 fip" +TFA_DEBUG = "1" +TFA_MBEDTLS = "1" +TFA_UBOOT = "0" +TFA_UEFI = "1" + +EXTRA_OEMAKE += "TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ + ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem" diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc.inc b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc.inc new file mode 100644 index 0000000000..8cb53dece5 --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a-tc.inc @@ -0,0 +1,140 @@ +# TC0 specific TFA configuration + +DEPENDS += "scp-firmware util-linux-native gptfdisk-native" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files/tc:" +SRC_URI:append = " \ + file://0001-plat-tc-Increase-maximum-BL2-size.patch \ + file://0002-Makefile-add-trusty_sp_fw_config-build-option.patch \ + file://0003-fix-plat-arm-increase-sp-max-image-size.patch \ + file://0004-fix-plat-tc-increase-tc_tzc_dram1_size.patch \ + file://0005-feat-plat-tc-add-spmc-manifest-with-trusty-sp.patch \ + file://0006-feat-plat-tc-update-dts-with-trusty-compatible-strin.patch \ + file://0007-fix-plat-tc-disable-smmu.patch \ + file://generate_metadata.py \ + " + +COMPATIBLE_MACHINE = "(tc?)" + +TFA_PLATFORM = "tc" +TFA_BUILD_TARGET = "all fip" +TFA_UBOOT = "1" +TFA_INSTALL_TARGET = "bl1 fip" +TFA_MBEDTLS = "1" +TFA_DEBUG = "1" + +TFA_SPD = "spmd" +TFA_SPMD_SPM_AT_SEL2 = "1" + +TFA_TARGET_PLATFORM:tc0 = "0" +TFA_TARGET_PLATFORM:tc1 = "1" + +EXTRA_OEMAKE += "TARGET_PLATFORM=${TFA_TARGET_PLATFORM}" + +# Set optee as SP. Set spmc manifest and sp layout file to optee +DEPENDS += "optee-os" + +TFA_SP_LAYOUT_FILE = "${RECIPE_SYSROOT}/lib/firmware/sp_layout.json" +TFA_ARM_SPMC_MANIFEST_DTS = "plat/arm/board/tc/fdts/tc_spmc_optee_sp_manifest.dts" + +EXTRA_OEMAKE += "SCP_BL2=${RECIPE_SYSROOT}/firmware/scp_ramfw.bin" +EXTRA_OEMAKE += "TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ + ROT_KEY=plat/arm/board/common/rotpk/arm_rotprivk_rsa.pem" +EXTRA_OEMAKE += "PSA_FWU_SUPPORT=1 ARM_GPT_SUPPORT=1" + +do_generate_gpt() { + gpt_image="${BUILD_DIR}/fip_gpt.bin" + fip_bin="${BUILD_DIR}/fip.bin" + # the FIP partition type is not standardized, so generate one + fip_type_uuid=`uuidgen --sha1 --namespace @dns --name "fip_type_uuid"` + # metadata partition type UUID, specified by the document: + # Platform Security Firmware Update for the A-profile Arm Architecture + # version: 1.0BET0 + metadata_type_uuid="8a7a84a0-8387-40f6-ab41-a8b9a5a60d23" + location_uuid=`uuidgen` + FIP_A_uuid=`uuidgen` + FIP_B_uuid=`uuidgen` + + # maximum FIP size 4MB. This is the current size of the FIP rounded up to an integer number of MB. + fip_max_size=4194304 + fip_bin_size=$(stat -c %s $fip_bin) + if [ $fip_max_size -lt $fip_bin_size ]; then + bberror "FIP binary ($fip_bin_size bytes) is larger than the GPT partition ($fip_max_size bytes)" + fi + + # maximum metadata size 512B. This is the current size of the metadata rounded up to an integer number of sectors. + metadata_max_size=512 + metadata_file="${BUILD_DIR}/metadata.bin" + python3 ${WORKDIR}/generate_metadata.py --metadata_file $metadata_file \ + --img_type_uuids $fip_type_uuid \ + --location_uuids $location_uuid \ + --img_uuids $FIP_A_uuid $FIP_B_uuid + + # create GPT image. The GPT contains 2 FIP partitions: FIP_A and FIP_B, and 2 metadata partitions: FWU-Metadata and Bkup-FWU-Metadata. + # the GPT layout is the following: + # ----------------------- + # Protective MBR + # ----------------------- + # Primary GPT Header + # ----------------------- + # FIP_A + # ----------------------- + # FIP_B + # ----------------------- + # FWU-Metadata + # ----------------------- + # Bkup-FWU-Metadata + # ----------------------- + # Secondary GPT Header + # ----------------------- + + sector_size=512 + gpt_header_size=33 # valid only for 512-byte sectors + num_sectors_fip=`expr $fip_max_size / $sector_size` + num_sectors_metadata=`expr $metadata_max_size / $sector_size` + start_sector_1=`expr 1 + $gpt_header_size` # size of MBR is 1 sector + start_sector_2=`expr $start_sector_1 + $num_sectors_fip` + start_sector_3=`expr $start_sector_2 + $num_sectors_fip` + start_sector_4=`expr $start_sector_3 + $num_sectors_metadata` + num_sectors_gpt=`expr $start_sector_4 + $num_sectors_metadata + $gpt_header_size` + gpt_size=`expr $num_sectors_gpt \* $sector_size` + + # create raw image + dd if=/dev/zero of=$gpt_image bs=$gpt_size count=1 + + # create the GPT layout + sgdisk $gpt_image \ + --set-alignment 1 \ + --disk-guid $location_uuid \ + \ + --new 1:$start_sector_1:+$num_sectors_fip \ + --change-name 1:FIP_A \ + --typecode 1:$fip_type_uuid \ + --partition-guid 1:$FIP_A_uuid \ + \ + --new 2:$start_sector_2:+$num_sectors_fip \ + --change-name 2:FIP_B \ + --typecode 2:$fip_type_uuid \ + --partition-guid 2:$FIP_B_uuid \ + \ + --new 3:$start_sector_3:+$num_sectors_metadata \ + --change-name 3:FWU-Metadata \ + --typecode 3:$metadata_type_uuid \ + \ + --new 4:$start_sector_4:+$num_sectors_metadata \ + --change-name 4:Bkup-FWU-Metadata \ + --typecode 4:$metadata_type_uuid + + # populate the GPT partitions + dd if=$fip_bin of=$gpt_image bs=$sector_size seek=$start_sector_1 count=$num_sectors_fip conv=notrunc + dd if=$fip_bin of=$gpt_image bs=$sector_size seek=$start_sector_2 count=$num_sectors_fip conv=notrunc + dd if=$metadata_file of=$gpt_image bs=$sector_size seek=$start_sector_3 count=$num_sectors_metadata conv=notrunc + dd if=$metadata_file of=$gpt_image bs=$sector_size seek=$start_sector_4 count=$num_sectors_metadata conv=notrunc +} + +addtask do_generate_gpt after do_compile before do_install + +do_install:append() { + install -m 0644 ${BUILD_DIR}/fip_gpt.bin ${D}/firmware/fip_gpt-tc.bin + ln -sf fip_gpt-tc.bin ${D}/firmware/fip_gpt.bin +} diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend new file mode 100644 index 0000000000..09ed3f793a --- /dev/null +++ b/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.7.%.bbappend @@ -0,0 +1,15 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files/:" + +# Machine specific TFAs + +MACHINE_TFA_REQUIRE ?= "" +MACHINE_TFA_REQUIRE:corstone500 = "trusted-firmware-a-corstone500.inc" +MACHINE_TFA_REQUIRE:corstone1000 = "trusted-firmware-a-corstone1000.inc" +MACHINE_TFA_REQUIRE:fvp-base = "trusted-firmware-a-fvp.inc" +MACHINE_TFA_REQUIRE:fvp-base-arm32 = "trusted-firmware-a-fvp-arm32.inc" +MACHINE_TFA_REQUIRE:juno = "trusted-firmware-a-juno.inc" +MACHINE_TFA_REQUIRE:n1sdp = "trusted-firmware-a-n1sdp.inc" +MACHINE_TFA_REQUIRE:sgi575 = "trusted-firmware-a-sgi575.inc" +MACHINE_TFA_REQUIRE:tc = "trusted-firmware-a-tc.inc" + +require ${MACHINE_TFA_REQUIRE} |