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-rw-r--r--meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch (renamed from meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/add-nt-fw-config.patch)23
-rw-r--r--meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch48
-rw-r--r--meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch67
3 files changed, 127 insertions, 11 deletions
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/add-nt-fw-config.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch
index f6f1895116..e5526dd66e 100644
--- a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/add-nt-fw-config.patch
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0001-Platform-ARM-N1sdp-Add-support-to-parse-NT_FW_CONFIG.patch
@@ -1,7 +1,7 @@
-From cc58709b32d74273736886ccfc08e4723a436ea4 Mon Sep 17 00:00:00 2001
+From fa3fd24ffbc987e952a2e5610a7b02556afd2087 Mon Sep 17 00:00:00 2001
From: sahil <sahil@arm.com>
Date: Thu, 17 Mar 2022 16:28:05 +0530
-Subject: [PATCH] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG
+Subject: [PATCH 1/3] Platform/ARM/N1sdp: Add support to parse NT_FW_CONFIG
NT_FW_CONFIG DTB contains platform information passed by
Tf-A boot stage.
@@ -11,6 +11,7 @@ it is used in ConfigurationManagerDxe.
Upstream-Status: Pending
Signed-off-by: Adam Johnston <adam.johnston@arm.com>
+Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ib82571280bf1ca5febe5766e618de09e7b70bb02
@@ -26,7 +27,7 @@ Change-Id: Ib82571280bf1ca5febe5766e618de09e7b70bb02
8 files changed, 152 insertions(+), 25 deletions(-)
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
-index f50623ae3f..e023d47cfd 100644
+index f50623ae..e023d47c 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -1,7 +1,7 @@
@@ -138,7 +139,7 @@ index f50623ae3f..e023d47cfd 100644
// Configuration Manager Protocol
Status = InitializePlatformRepository (
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
-index 4f8e7f1302..fb59c29501 100644
+index 4f8e7f13..fb59c295 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
@@ -1,7 +1,7 @@
@@ -159,7 +160,7 @@ index 4f8e7f1302..fb59c29501 100644
UefiBootServicesTableLib
UefiDriverEntryPoint
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
-index 097160c7e2..63cebaf0e0 100644
+index 097160c7..63cebaf0 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -1,6 +1,6 @@
@@ -203,7 +204,7 @@ index 097160c7e2..63cebaf0e0 100644
+
#endif
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
-index 8d2069dea8..88ed640d29 100644
+index 8d2069de..88ed640d 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
@@ -1,6 +1,6 @@
@@ -224,7 +225,7 @@ index 8d2069dea8..88ed640d29 100644
//
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
-index c0effd37f3..fabe902cd0 100644
+index c0effd37..fabe902c 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
@@ -269,7 +270,7 @@ index c0effd37f3..fabe902cd0 100644
};
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
-index 96e590cdd8..6f9c9d5ab6 100644
+index 96e590cd..6f9c9d5a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
@@ -1,7 +1,7 @@
@@ -307,7 +308,7 @@ index 96e590cdd8..6f9c9d5ab6 100644
gArmMpCoreInfoPpiGuid
+ gNtFwConfigDtInfoPpiGuid
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
-index 339fa07b32..b58bda4b76 100644
+index 339fa07b..b58bda4b 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
@@ -441,7 +442,7 @@ index 339fa07b32..b58bda4b76 100644
NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) *
(UINT64)SIZE_1GB);
diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
-index d59f25a5b9..4dea8fe1e8 100644
+index d59f25a5..4dea8fe1 100644
--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
@@ -1,7 +1,7 @@
@@ -470,5 +471,5 @@ index d59f25a5b9..4dea8fe1e8 100644
+[Ppis]
+ gNtFwConfigDtInfoPpiGuid = { 0xb50dee0e, 0x577f, 0x47fb, { 0x83, 0xd0, 0x41, 0x78, 0x61, 0x8b, 0x33, 0x8a } }
--
-2.17.1
+2.37.2
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch
new file mode 100644
index 0000000000..1c097fcc7e
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0002-Platform-ARM-N1Sdp-Fix-RemoteDdrSize-cast.patch
@@ -0,0 +1,48 @@
+From 73aab76042ae34fa4b07414c1830129e572dcd65 Mon Sep 17 00:00:00 2001
+From: sahil <sahil@arm.com>
+Date: Wed, 20 Apr 2022 12:24:41 +0530
+Subject: [PATCH 2/3] Platform/ARM/N1Sdp: Fix RemoteDdrSize cast
+
+RemoteDdrSize calculation wraps around when booting N1Sdp in
+multichip mode. Casting it to UINT64 to fix the issue.
+
+Upstream-Status: Pending
+Signed-off-by: Adam Johnston <adam.johnston@arm.com>
+Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
+Signed-off-by: sahil <sahil@arm.com>
+Change-Id: I2c2a70c2ab046337236fba92d25dec5905ccd117
+
+---
+ .../ConfigurationManagerDxe/ConfigurationManager.c | 2 +-
+ Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+index e023d47c..36b5fc9e 100644
+--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
++++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+@@ -1254,7 +1254,7 @@ InitializePlatformRepository (
+ PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length = Dram2Size;
+
+ if (PlatInfo->MultichipMode == 1) {
+- RemoteDdrSize = ((PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
++ RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
+
+ // Update Remote DDR Region1
+ PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain = 1;
+diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+index b58bda4b..fbc9b05e 100644
+--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
++++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+@@ -157,7 +157,7 @@ ArmPlatformGetVirtualMemoryMap (
+ DramBlock2Size);
+
+ if (PlatInfo->MultichipMode == 1) {
+- RemoteDdrSize = ((PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
++ RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
+
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_SYSTEM_MEMORY,
+--
+2.37.2
+
diff --git a/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch
new file mode 100644
index 0000000000..f0de02eb66
--- /dev/null
+++ b/meta-arm/meta-arm-bsp/recipes-bsp/uefi/files/edk2-platforms/0003-Platform-ARM-N1Sdp-Modify-the-IRQ-ID-of-Debug-UART-a.patch
@@ -0,0 +1,67 @@
+From adc66d99663f71ec97313c40b0d00a908f292c30 Mon Sep 17 00:00:00 2001
+From: Himanshu Sharma <Himanshu.Sharma@arm.com>
+Date: Mon, 30 May 2022 10:53:30 +0000
+Subject: [PATCH 3/3] Platform/ARM/N1Sdp: Modify the IRQ ID of Debug UART and
+ routing it to IOFPGA UART1
+
+In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the
+IPI0 trigger method to "level", which prevented SGI0 to be enabled
+again after a CPU offline/online cycle.
+
+This patch fixes the above issue by assigning a reserved IRQ ID
+for the Debug UART, other than 0 and also routing it to use IOFPGA
+UART1 by unsharing it from currently using serial terminal.
+
+Upstream-Status: Pending
+Signed-off-by: Adam Johnston <adam.johnston@arm.com>
+Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
+Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
+Change-Id: I6640c3c8f77afd233304ce9cb06dcf80a8659c16
+
+---
+ .../ConfigurationManagerDxe/ConfigurationManager.c | 2 +-
+ Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+index 36b5fc9e..e8873200 100644
+--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
++++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+@@ -320,7 +320,7 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = {
+ // Debug Serial Port
+ {
+ FixedPcdGet64 (PcdSerialDbgRegisterBase), // BaseAddress
+- 0, // Interrupt -unused
++ 250, // Interrupt (reserved)
+ FixedPcdGet64 (PcdSerialDbgUartBaudRate), // BaudRate
+ FixedPcdGet32 (PcdSerialDbgUartClkInHz), // Clock
+ EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // Port subtype
+diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+index 865dd04d..878c8f2f 100644
+--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
++++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+@@ -4,7 +4,7 @@
+ # This provides platform specific component descriptions and libraries that
+ # conform to EFI/Framework standards.
+ #
+-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
++# Copyright (c) 2018 - 2022, ARM Limited. All rights reserved.<BR>
+ #
+ # SPDX-License-Identifier: BSD-2-Clause-Patent
+ #
+@@ -136,9 +136,9 @@
+ gArmPlatformTokenSpaceGuid.PL011UartInterrupt|95
+
+ # PL011 Serial Debug UART (DBG2)
+- gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+- gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+- gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|50000000
++ gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1C0A0000
++ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200
++ gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000
+
+ # SBSA Watchdog
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93
+--
+2.37.2
+
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-16 01:36:50 +0300