diff options
Diffstat (limited to 'meta-facebook/meta-yosemitev2/recipes-bsp/u-boot')
2 files changed, 48 insertions, 70 deletions
diff --git a/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0001-board-aspeed-Add-Mux-for-yosemitev2.patch b/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0001-board-aspeed-Add-Mux-for-yosemitev2.patch index 5634ce9363..9f2799f684 100644 --- a/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0001-board-aspeed-Add-Mux-for-yosemitev2.patch +++ b/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0001-board-aspeed-Add-Mux-for-yosemitev2.patch @@ -1,22 +1,21 @@ -From c2e01a4cc220b9a1c1a6bb52e5f58bcc8d2edc55 Mon Sep 17 00:00:00 2001 -From: manikandan-e <manikandan.hcl.ers.epl@gmail.com> -Date: Wed, 30 Oct 2019 19:43:51 +0530 -Subject: [PATCH 2/2] board-aspeed-Add-Mux-for-yosemitev2 - -Signed-off-by: manikandan-e <manikandan.hcl.ers.epl@gmail.com> +From f09b84e61569f2b991cc3e257c34517a222922d3 Mon Sep 17 00:00:00 2001 +From: Logananth Sundararaj <logananth.s@hcl.com> +Date: Fri, 3 Dec 2021 15:21:50 +0530 +Subject: [PATCH] board-aspeed-Add-Mux-for-yosemitev2 +Signed-off-by: Logananth Sundararaj <logananth.s@hcl.com> --- - arch/arm/mach-aspeed/platform_g5.S | 213 +++++++++++++++++++++++++++++++------ - 1 file changed, 183 insertions(+), 30 deletions(-) + arch/arm/mach-aspeed/platform_g5.S | 191 ++++++++++++++++++++++++----- + 1 file changed, 162 insertions(+), 29 deletions(-) diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S -index 2ac1ca4..c3ce077 100644 +index 2ac1ca4721..e1c17ae4a3 100644 --- a/arch/arm/mach-aspeed/platform_g5.S +++ b/arch/arm/mach-aspeed/platform_g5.S @@ -302,6 +302,156 @@ TIME_TABLE_DDR4_1600: ldr r2, =0x00000800 .endm - + + .macro console_bmc + ldr r0, =0x1e780024 +ldr r1, [r0] @@ -149,8 +148,8 @@ index 2ac1ca4..c3ce077 100644 + mov r2, r2, lsr #12 + tst r2, #0x01 + ldr r0, =0x1E784000 -+ moveq r1, #0x0D @ Baudrate 115200 -+ movne r1, #0x01 @ Baudrate 115200, div13 ++ moveq r1, #0x1A @ Baudrate 57600 ++ movne r1, #0x02 @ Baudrate 57600, div13 + + str r1, [r0] + @@ -170,7 +169,7 @@ index 2ac1ca4..c3ce077 100644 .macro print_hex_char and r1, r1, #0xF cmp r1, #9 -@@ -324,6 +474,36 @@ init_dram: +@@ -324,6 +474,16 @@ init_dram: /******************************************** Initial Reset Procedure : Begin *******************************************/ @@ -180,26 +179,6 @@ index 2ac1ca4..c3ce077 100644 + + uart_console_setup + -+ /* Debug - UART console message */ -+ ldr r0, =0x1E784000 -+ mov r1, #0x0D @ '\r' -+ str r1, [r0] -+ mov r1, #0x0A @ '\n' -+ str r1, [r0] -+ mov r1, #0x54 @ 'S' -+ str r1, [r0] -+ mov r1, #0x50 @ 'P' -+ str r1, [r0] -+ mov r1, #0x4C @ 'L' -+ str r1, [r0] -+ mov r1, #0x0D @ '\r' -+ str r1, [r0] -+ mov r1, #0x0A @ '\n' -+ str r1, [r0] -+ /* End Debug - UART console message */ -+ -+ -+ + ldr r0, =0x1E720204 + mov r1, #0x0 + str r1, [r0] @@ -207,21 +186,19 @@ index 2ac1ca4..c3ce077 100644 /* Clear AHB bus lock condition */ ldr r0, =0x1e600000 ldr r1, =0xAEED1A03 -@@ -793,7 +973,9 @@ wait_ddr_reset: +@@ -793,6 +953,8 @@ wait_ddr_reset: clear_delay_timer /* end delay 10ms */ - --/* Debug - UART console message */ + + uart_console_setup + -+ /* Debug - UART console message */ + /* Debug - UART console message */ #ifdef CONFIG_DRAM_UART_TO_UART1 ldr r0, =0x1e78909c @ route UART5 to UART Port1, 2016.08.29 - ldr r1, =0x10000004 -@@ -806,35 +988,6 @@ wait_ddr_reset: +@@ -806,35 +968,6 @@ wait_ddr_reset: str r1, [r0] #endif - + - ldr r0, =0x1e78400c - mov r1, #0x83 - str r1, [r0] @@ -254,6 +231,6 @@ index 2ac1ca4..c3ce077 100644 ldr r0, =0x1e784000 mov r1, #0x0D @ '\r' str r1, [r0] --- -2.7.4 +-- +2.17.1 diff --git a/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0002-spl-host-console-handle.patch b/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0002-spl-host-console-handle.patch index cccdd04b52..8f01c122c2 100755..100644 --- a/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0002-spl-host-console-handle.patch +++ b/meta-facebook/meta-yosemitev2/recipes-bsp/u-boot/u-boot-aspeed/0002-spl-host-console-handle.patch @@ -1,6 +1,6 @@ -From ca2c08a7e710e4beff2fdf17bba5a74adff13db8 Mon Sep 17 00:00:00 2001 -From: Manikandan Elumalai <manikandan.hcl.ers.epl@gmail.com> -Date: Wed, 10 Jun 2020 17:53:59 +0530 +From 9c5a3784a68a456cd22e63719917ed79873d0801 Mon Sep 17 00:00:00 2001 +From: Logananth Sundararaj <logananth.s@hcl.com> +Date: Fri, 3 Dec 2021 16:37:58 +0530 Subject: [PATCH] spl-host-console-handle This patch adds four 1S server console through debug card @@ -13,25 +13,25 @@ GPIOAA5 ---SW_ID2 GPIOAA4 ---SW_ID1 SW_ID8 SW_ID4 SW_ID2 SW_ID1 Position Descritpion -L L L L 1 1s server slot1 select +L L L L 1 1s server slot1 select -L L H 2 1s server slot2 select +L L L H 2 1s server slot2 select -L L H L 3 1s server slot3 select +L L H L 3 1s server slot3 select -L L H H 4 1s server slot4 select +L L H H 4 1s server slot4 select -L H L L 5 BMC Debug port select +L H L L 5 BMC Debug port select -L H L H 6 1s server slot1 select +L H L H 6 1s server slot1 select -L H H L 7 1s server slot2 select +L H H L 7 1s server slot2 select -L H H H 8 1s server slot3 select +L H H H 8 1s server slot3 select -H L L L 9 1s server slot4 select +H L L L 9 1s server slot4 select -H L L H 10 BMC Debug port select +H L L H 10 BMC Debug port select BMC and Hosts UART control flow GPIOE0 --- DEBUG_UART_SEL_0 @@ -40,24 +40,24 @@ GPIOE2 --- DEBUG_UART_SEL_2 GPIOE2 --- DEBUG_UART_RX_SEL_N SEL_2 SEL_1 SEL_0 RX_SEL_N CONSOLE -0 0 0 0 SLOT1 -0 0 1 0 SLOT2 -0 1 0 0 SLOT3 -0 1 1 0 SLOT4 -1 0 0 1 BMC Debug +0 0 0 0 SLOT1 +0 0 1 0 SLOT2 +0 1 0 0 SLOT3 +0 1 1 0 SLOT4 +1 0 0 1 BMC Debug -Signed-off-by: Manikandan Elumalai <manikandan.hcl.ers.epl@gmail.com> +Signed-off-by: Logananth Sundararaj <logananth.s@hcl.com> --- - arch/arm/mach-aspeed/platform_g5.S | 68 +++++++++++++++++++++++++++++++++----- - 1 file changed, 60 insertions(+), 8 deletions(-) + arch/arm/mach-aspeed/platform_g5.S | 69 ++++++++++++++++++++++++++---- + 1 file changed, 61 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-aspeed/platform_g5.S b/arch/arm/mach-aspeed/platform_g5.S -index c3ce077..29daa7a 100644 +index e1c17ae4a3..798b9c4337 100644 --- a/arch/arm/mach-aspeed/platform_g5.S +++ b/arch/arm/mach-aspeed/platform_g5.S -@@ -315,6 +315,58 @@ orr r1, r1, #0xC - str r1, [r0] - .endm +@@ -315,6 +315,59 @@ TIME_TABLE_DDR4_1600: + str r1, [r0] + .endm + .macro console_slot1 + ldr r0, =0x1e780024 @@ -111,10 +111,11 @@ index c3ce077..29daa7a 100644 + str r1, [r0] + .endm + ++ .macro console_sel // Disable SoL UARTs[1-4] -@@ -354,28 +406,28 @@ dbg_card_pres\@: +@@ -354,28 +407,28 @@ dbg_card_pres\@: ldr r1, =0x00 cmp r0, r1 bne case_pos2\@ @@ -147,7 +148,7 @@ index c3ce077..29daa7a 100644 b case_end\@ case_pos5\@: //Test for position#5 -@@ -389,28 +441,28 @@ case_pos6\@: +@@ -389,28 +442,28 @@ case_pos6\@: ldr r1, =0x05 cmp r0, r1 bne case_pos7\@ @@ -181,4 +182,4 @@ index c3ce077..29daa7a 100644 case_pos10\@: //Test for position#10 -- -2.7.4 +2.17.1 |