1 files changed, 45 insertions, 0 deletions
diff --git a/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-91/riscv32.patch b/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-91/riscv32.patch
new file mode 100644
index 0000000000..fe9c332a00
--- /dev/null
+++ b/meta-openembedded/meta-oe/recipes-extended/mozjs/mozjs-91/riscv32.patch
@@ -0,0 +1,45 @@
+Add RISCV32 support
+
+Upstream-Status: Pending
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+
+--- a/build/moz.configure/init.configure
++++ b/build/moz.configure/init.configure
+@@ -765,6 +765,9 @@ def split_triplet(triplet, allow_msvc=Fa
+     elif cpu.startswith("aarch64"):
+         canonical_cpu = "aarch64"
+         endianness = "little"
++    elif cpu in ("riscv32", "riscv32gc"):
++        canonical_cpu = "riscv32"
++        endianness = "little"
+     elif cpu in ("riscv64", "riscv64gc"):
+         canonical_cpu = "riscv64"
+         endianness = "little"
+--- a/python/mozbuild/mozbuild/configure/constants.py
++++ b/python/mozbuild/mozbuild/configure/constants.py
+@@ -52,6 +52,7 @@ CPU_bitness = {
+     "mips64": 64,
+     "ppc": 32,
+     "ppc64": 64,
++    'riscv32': 32,
+     "riscv64": 64,
+     "s390": 32,
+     "s390x": 64,
+@@ -94,6 +95,7 @@ CPU_preprocessor_checks = OrderedDict(
+         ("m68k", "__m68k__"),
+         ("mips64", "__mips64"),
+         ("mips32", "__mips__"),
++        ("riscv32", "__riscv && __riscv_xlen == 32"),
+         ("riscv64", "__riscv && __riscv_xlen == 64"),
+         ("sh4", "__sh__"),
+         ("wasm32", "__wasm32__"),
+--- a/python/mozbuild/mozbuild/test/configure/test_toolchain_configure.py
++++ b/python/mozbuild/mozbuild/test/configure/test_toolchain_configure.py
+@@ -1186,6 +1186,7 @@ class LinuxCrossCompileToolchainTest(Bas
+         "m68k-unknown-linux-gnu": big_endian + {"__m68k__": 1},
+         "mips64-unknown-linux-gnuabi64": big_endian + {"__mips64": 1, "__mips__": 1},
+         "mips-unknown-linux-gnu": big_endian + {"__mips__": 1},
++        "riscv32-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 32},
+         "riscv64-unknown-linux-gnu": little_endian + {"__riscv": 1, "__riscv_xlen": 64},
+         "sh4-unknown-linux-gnu": little_endian + {"__sh__": 1},
+     }