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2024-01-11meta-nuvoton: trusted-firmware-a: srcrev bump 31a3b9f7..ef86e361Tim Lee1-2/+1
Margarita Glushkin (1): fix GFX frame buffer memory corruption during secondary boot Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I1fe74d69c13deb3d05d4560754ddce0277ecf6f3
2024-01-10meta-nuvoton: add YAML configurations for evb-npcm845Tim Lee5-0/+286
Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Id97b390d735f0df873b7ed479d24391d6c86d582
2023-12-12meta-nuvoton: adopt meta-evb-npcm845 from meta-evbTim Lee4-0/+40
Adopt meta-evb-npcm845 from meta-evb layer that make more clearer about the scope of evb layer's description. Tested: /openbmc$ . setup evb-npcm845 Common targets are: obmc-phosphor-image Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ib922057b5bce54b864f1c0ced1b132ea1e71fd91
2023-12-11meta-nuvoton: npcm8xx-bootblock: update to 0.3.9Tim Lee2-3/+3
Changelog: version 0.3.9 - Nov 29th 2023 ============= - block PLL resetting in secondary boot. - PLLs are set only after PORST. (PLLs only, other dividers like FIU are set on any reset). - Change print of DRAM type. - Print all values in MHz (instead of Hz). Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I409d725b0e8e93b7e8497a0a20243956ee47571b
2023-12-11meta-nuvoton: npcm8xx-igps: update to 03.09.08Tim Lee2-4/+4
Changelog: IGPS 03.09.08 - Nov 29th 2023 ============ - Write key mask automatically by scripts. - Bootblock version 0.3.9: * block PLL resetting in secondary boot. * PLLs are set only after PORST. (PLLs only, other dividers like FIU are set on any reset). * Change print of DRAM type. * Print all values in MHz (instead of Hz). - XML: * XML mark the key_mask area as reserved. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I2e3b552d540006595d761866a4b489506ae2c3e2
2023-12-11meta-nuvoton: npcm7xx-bingo: update to 0.0.6Tim Lee1-3/+3
Bingo_0.0.6 - Jul 24th 2023 ============== - For nibble parity- use only option of singular 0xff or 0x00 mask, no matter what content format it has. - For secded parity - no more usage of maskAllSizes, use only option of singular 0xff or 0x00 mask. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I705dce3b342ccff89fd9bd65563fc6d80d907835
2023-11-29meta-nuvoton: npcm8xx-bootblock: update to 0.3.8Tim Lee2-3/+3
Changelog: version 0.3.8 - Nov 6th 2023 ============= - bootblock output file rename back to arbel_a35_bootblock.bin. - unused fuse data moved under ifdef. - Add 3 fields to header (FIU_DRD_CFG for fiu 0, 1, 3). User can change these values in IGPS. bootblock does not check value is legal - Cleanup makefile. version 0.3.7 - Nov 2nd 2023 ============= - Modify the Makefile to ensure compatibility with Linux compilation and incorporate a build.sh script. - In NO_TIP mode: if training fails perform FSW to retry. - In TIP mode: need to use TIP_FW 0.6.5 and up so that TIP will reset MC before bootblock to ansure no BMC access during reset MC. - Update timer driver with registers and basic functunality. - Update FIU divider on every reset, according to header. - Set RDLEN to 0 on AHB6 and AHB13. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I581651ed36ef51c01c97312a2be7e438cbc403a5
2023-11-25treewide: add scarthgap to LAYERSERIES_COMPAT2.16.0-devPatrick Williams2-2/+2
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: I28ee50fa55ae47dd7fd8c99f8f6db8f5f6dfa53d
2023-11-24treewide: add nanbield to LAYERSERIES_COMPATPatrick Williams2-2/+2
Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Change-Id: I85272779478b66452acd11be93f5fea99e4c3a34
2023-11-16meta-nuvoton: add new layer and conf for npcm845Tim Lee1-0/+8
For features and configurations of npcm845 in OpenBMC. Tested: build pass and boot successfully. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I567a6ef62acae992b4e888a4a0d5f90828939c79
2023-11-09meta-nuvoton: npcm8xx-tip-fw: update to 0.6.5.0.5.4Tim Lee3-1/+6
Changelog: TIP_FW: 0.6.5 L0 0.5.4 L1 ============== * MC reset, if needed, performed synchronously from TIP side while BMC is in reset. Add new variable SA_TIP_IMAGE for supporing SA TIP_FW mimic no_tip mode. SA (Stand Alone) is a special TIP_FW for mimic NO TIP feature on TIP devices. That's concatenated file image_no_tip + SA FW for mimic NO TIP mode. Tested: Build pass and boot up successful with correct TIP FW latest version. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ib836cf16f0f14f313b5243e18e8d615e792408b5
2023-11-09meta-nuvoton: npcm8xx-igps: update to 03.09.07Tim Lee2-4/+4
Changelog: IGPS 03.09.07 - Nov 6 2023 ============ - Remove Google TIP_FW. SA FW replaces it. - Bootblock version 0.3.8: * bootblock output file rename back to arbel_a35_bootblock.bin. * unused fuse data moved under ifdef * Add 3 fields to header (FIU_DRD_CFG for fiu 0, 1, 3). User can change these values in IGPS. bootblock does not check value is legal. * Cleanup makefile. - XML: * add FIU_DRD_CFG0, 1, 3 to bootblock headers. IGPS 03.09.06 - Nov 2 2023 ============ - TIP_FW: 0.6.5 L0 0.5.4 L1 * MC reset, if needed, performed synchronously from TIP side while BMC is in reset. - Bootblock version 0.3.7 * Modify the Makefile to ensure compatibility with Linux compilation and incorporate a build.sh script. * In NO_TIP mode: if training fails perform FSW to retry. * In TIP mode: need to use TIP_FW 0.6.5 and up so that TIP will reset MC before bootblock to ensure no BMC access. * during reset MC. * Update timer driver with registers and basic functionality. * Update FIU divider on every reset, according to the header. * Set RDLEN to 0 on AHB6 and AHB13. - bl31: * https://github.com/Nuvoton-Israel/arm-trusted-firmware/releases/tag/v2.9.0 * Fix GFX frame buffer memory corruption during secondary boot. - Scripts: * create image_no_tip_SA.bin for A1 mimic no_tip mode (concatenated file image_no_tip + SA FW). Tested: Build pass and boot up successful both TIP and NO TIP mode. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ia11b8120b31da4d4da05a9e3034db52a7a17498f
2023-11-07meta-nuvoton: ipmi: change PCI device-id for NPCM8xxTim Lee1-0/+3
There are two kinds of PCI device-id for NPCM7xx and NPCM8xx respectively. For NPCM7xx the device-id is using 0x0750 and NPCM8xx is using 0x0850. Thus, change this PCI device-id for supporting NPCM8xx platform. Use this variable that can help to build host tool burn_my_bmc compatible with different platforms and make in-band firmware update work well. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I8a23699eab879d3b2620ee47fa9fe46a1e5ef524
2023-11-07meta-nuvoton: linux: npcm8xx: enable OP-TEE driverTim Lee1-1/+3
Enable OP-TEE driver in kernel via CONFIG_TEE=y and CONFIG_OPTEE=y Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I4dc7e7d0f0f3239cd2df9422715fe0fc885f591a
2023-11-01meta-nuvoton: u-boot-nuvoton: srcrev bump 23a146cf...2da1655fTim Lee1-1/+1
Brian Ma (1): spi-nor-ids: Add flash model w25q01jv support Eason Yang (1): cmd: fuse: casting u32 to u8 if CONFIG_NPCM Marvin Lin (1): cmd: Reset GFX PCI before configuration Stanley Chu (6): board: arbel: fix incorrect ram size of 4GB dram with ECC enabled configs: poleg: update supported baud rate configs: npcm8xx: disable CONFIG_SPI_FLASH_USE_4K_SECTORS npcm8xx: support dcache off serial: npcm: Fix wrong register base address board: nuvoton: arbel: Fix wrong place to set dram bank size Tim Lee (1): i2c: npcm: enable support Fast mode Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I182071fd5dff369f716e483ac34e6bec0bb02f3c
2023-10-27meta-nuvoton: npcm8xx-bootblock: update to 0.3.6Tim Lee2-3/+3
Changelog: version 0.3.6 - Oct 19th 2023 ============= - Fix SPIX settings. SPIX should be below 33MHz. It was calculated according to SPI0 and not SPIX, and then set to SPIX. - Read the DIE information from OTP and place it in SCRACHPAD 72 and 73, for the OPTEE to read it. - Bug fix: return pass status to TIP in secondary reset if training is skipped. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I6cc76c7750c185f6593da17f779cbd1e68539833
2023-10-27meta-nuvoton: npcm8xx-tip-fw: update to 0.6.4.0.5.3Tim Lee1-1/+1
Changelog: TIP FW 0.6.4 L0 0.5.3 L1 ============== - Fix DRAM window handling bug, oinorder to allow loading images to any address in DRAM. - Fix access for Z1 devices to NCL lib. - Move tip log to end of recovery flash. - Support flash encryption. Need to create per die key and enable in each image header. - Fix TAG aliign issue. - Support A35 bootblock reset case. - Switch to lightweight X.509 and base64 API to remove mbedTLS from L0 completely. - Extend key scan option from TIP_ROM to all images. - Enhance NCL hash porting with SW SHA1 support. - TIP_SCR0 fix configuration during BMC reset. - Update OEM table. - Customize TIP DICE layer 0 to generate ECC-384 device ID key pair matching ROM. - Generate counter DICE is missing. Fuse DME and DICE request. Tested: Build pass and boot up successful with correct TIP FW latest version. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I1c523ee6c1a74439354fda76e6a1abf973f32182
2023-10-27meta-nuvoton: npcm8xx-igps: update to 03.09.05Tim Lee2-4/+4
Changelog: IGPS 03.09.05 - Oct 23 2023 ============== - OPTEE: 0.0.4: Reading HUK from UUID stored in two scratchpad registers. - Add UpdateInputBinaries for A2. Files are the same as A1. - u-boot: v2023.10-npcm8xx-20231023: First release of npcm-v2023.10. Fix memory corruption in GFX frame buffer. - TIP_FW 0.6.4 L0 0.5.3 L1 Fix DRAM window handling bug, in order to allow loading images to any address in DRAM. Fix access for Z1 devices to NCL lib. Move tip log to end of recovery flash. Support flash encryption. Need to create per die key and enable in each image header. Fix TAG alignment issue. Support A35 bootblock reset case. Switch to lightweight X.509 and base64 API to remove mbedTLS from L0 completely. Extend key scan option from TIP_ROM to all images. Enhance NCL hash porting with SW SHA1 support. TIP_SCR0 fix configuration during BMC reset. Update OEM table. Customize TIP DICE layer 0 to generate ECC-384 device ID key pair matching ROM. Generate counter DICE is missing. Fuse DME and DICE requests. - Bootblock 0.3.6: Fix SPIX settings. SPIX should be below 33MHz. It was calculated according to SPI0 and not SPIX, and then set to SPIX. Read the DIE information from OTP and place it in SCRACHPAD 72 and 73, for the OPTEE to read it. Bug fix: return pass status to TIP in secondary reset if training is skipped. Tested: Build pass and boot up successful both TIP and NO TIP mode. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Id040079d81d3dd77bc57d5857bcd5df930fd503c
2023-09-19meta-nuvoton: update TFA recipe to fix build breakBrian Ma1-1/+1
Due to the default trusted-firmware-a version move to 2.9.0, rename bbappend version and move SRCREV which merged 2.9.0. Change-Id: I960b93967e353e129eaae474f52bd43ebc917589 Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-08-31meta-nuvoton: loadsvf: srcrev bump 013cc80447...ffe63f7143Tim Lee1-1/+1
Stanley Chu (1): add run_state API Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I41d78074c29ab3b1386137846d2e712025f37a41
2023-08-30meta-nuvoton: npcm8xx-tip-fw: update to 0.6.2.0.5.1Tim Lee1-1/+1
Changelog: TIP FW 0.6.2 L0 0.5.1 L1 ============== - Release tag: TIP_FW_L0_0.6.2_L1_0.5.1 - Fix trap issue in export found on DC_SCM only. - Optimize memory usage. - RSA and RNG code cleanup. Tested: Build pass and boot up successful with correct version. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ie35d15345fdefbdb9d66801f3ebb70ffc39d776d
2023-08-30meta-nuvoton: npcm8xx-igps: update to 03.09.03Tim Lee2-4/+4
Changelog: IGPS 03.09.03 - Aug 10th 2023 ============== - Update scripts: fix typos. - Update scripts: copy all keys always. To replace a key please remove it from both: IGPS_..\py_scripts\ImageGeneration\keys IGPS_..\py_scripts\ImageGeneration\inputs\key_input Tested: Build pass and boot up successful both TIP and NO TIP mode. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I4f364735d393d6c84475fd11f96da14e4b1d7b56
2023-08-30meta-nuvoton: optee-os: remove RPMB configurationsTim Lee1-5/+0
The RPMB partition of the eMMC on our boards has been written with a test key from optee-os. As a result, we cannot use the key from OTP to access RPMB. Thus, we need to remove it. And add back CFG_REE_FS and CFG_REE_FS_TA support for optee-os. Tested: build pass and boot successfully then run xtest pass. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I47ea2f1ba8ed09b34a1530c2b4110d296dd09e11
2023-08-30meta-nuvoton: u-boot-nuvoton: srcrev bump 02f2872a...23a146cfTim Lee1-1/+1
Stanley Chu (7): pinctrl: npcm8xx: sync with upstream driver pinctrl: npcm8xx: add name for gpio function board: nuvoton: set console environment variable serial: npcm: support skip uart initialization configs: arbel/poleg: support more uart baud rate watchdog: npcm: fix reset/expire function dts: npcm8xx: add watchdog Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Id3923f96f68fa0f59f18b7f6d9f533d48d7cb6b1
2023-08-23meta-nuvoton: loadsvf: srcrev bump f2296005cb...013cc80447Tim Lee1-2/+2
Stanley Chu (8): update README fix address length issue and compile warning update README update log correct the debug log update code check tdo after every svf command. Print progress Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I912a52e6047b951741b3aef23cc409770c69ba7b
2023-08-09meta-nuvoton: optee-os: sync to upstream versionBrian Ma2-15/+0
Use upstream SRCREV instead of customize one. Tested: build pass and boot successfully. Change-Id: Ida705dd842a603f6523287b06759739400357114 Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-08-09meta-nuvoton: add program-edid recipeBrian Ma6-0/+293
Add program-edid recipe to support program default EDID data to internal SMB module as I2C EEPROM when we use DVO. reference Linux dts: &i2c11 { status = "okay"; slave_eeprom:slave_eeprom@40000050 { compatible = "slave-24c02"; reg = <0x40000050>; status = "okay"; }; }; Change-Id: I2d12c0abe9e4815bd95382afa874c0b740af5358 Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-08-02meta-nuvoton: npcm7xx-igps: update to 02.01.18Tim Lee2-4/+4
Changelog: IGPS 02.01.18 - Jul 27th 2023 ============== - BootBlock 10.10.18 Date: 24.07.24 ================== =============== Add support for baud rate setting supported baud rates 115200, 460800 - Support BAUD Rate configuration (115200, 460800) - XML: Add baud rate setting to BootblockAndHeader.XML Default value is 115200. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I93d6b37fdf1d4662cfe84b11dd73d7aa3d24aaf6
2023-08-02meta-nuvoton: npcm8xx-igps: update to 03.09.02Tim Lee5-8/+8
Changelog: IGPS 03.09.02 - Jul 24th 2023 ============== - bootblock 0.3.5 https://github.com/Nuvoton-Israel/npcm8xx-bootblock/ releases/tag/A35_BootBlock_0.3.5 * bug fix: support NO_TIP mode + updated memory map. all images are loaded to DRAM. (from version bootblock 0.3.4) * Call CLK_ConfigureFIUClock only in PORST (update SPI dividers from header). * re-enable HOST_IF field in header. Supported values: 0xFF: do nothing 0x00: LPC. 0x01: eSPI 0x02: GPIOs TRIS. 0x03: release host wait, disable eSPI configuration is done only in PORST. - add baud rate field to header: * Supported values: 9600,14400,19200,38400,57600,115200,230400, 380400,460800,921600. Default is 115200. - Update README with signing options. - Support pkcs11-tool on Linux. - Bingo 0.0.6. https://github.com/Nuvoton-Israel/bingo/releases/tag/Bingo_0.0.6 - update Monitor 1.0.9 (contact Nuvoton for internal users only) - Optee npcm845x_3.22.0-rc1-7: https://github.com/Nuvoton-Israel/optee_os/releases/tag/3.22.0-rc1-7 * change load address of OPTEE-OS from 0x36000000 to 0x02100000 * added HUK reading from TIP Mailbox DME PCR0 - TIP_FW 0.6.1 L0 0.5.0 L1: * Update RCR regs whenever PORST bit is set in TIP_SCR1 (ignore all other bits) * Export PCI parameters on any reset, re-order the parameter locations. * Fix typos un uptime and similar. * SWRST4 is TIP_RESET. ##uboot https://github.com/Nuvoton-Israel/u-boot/ releases/tag/v2021.04-npcm8xx-20230724 * u-boot.bin is built with extra config to skip UART initialization in u-boot (CONFIG_SYS_SKIP_UART_INIT=y) - Update bootblock XML: * Add host IF field. eSPI in all flavors except Google XML. * Add BAUD rate field. default is 115200. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ib9d19566ef42d4bbcc3c15df599e396b25e2eede
2023-07-12meta-nuvoton: optee-os: update to 3.20Tim Lee5-38/+34
Keep up with the latest support of optee-os in openbmc. Tested: build pass and boot successfully. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ia22d9641135356dc575d72382bc1daba9d1e531c
2023-07-07meta-nuvoton: update TFA source to fix build breakBrian Ma1-1/+1
Sync the trusted-firmware-a source URI to fix build break. Change-Id: I2c08e0cc2179c37e6b53729de3683c22bf6ccee0 Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-07-04meta-nuvoton: Add build wic image supportBrian Ma4-1/+49
We add wks file and relative config for build wic image. Now user can build wic image by include phosphor-mmc.inc. And set WKS_RWFS_SIZE, WKS_RWFS_SIZE to adjust eMMC parition size instead of create new wks file for each board. Change-Id: I1ed342658d791fd9011bd31ea6db36d4362d120b Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-07-04meta-nuvoton: Update default fw_env.configBrian Ma5-1/+22
Update new fw_env.config for U-Boot fw_print/setenv utils access correct U-Boot environment offset. And also add recipe udev-nuvoton-mtd-partitions for create readable mtd device symlink. Change-Id: I3bfa2015f536b27382f561bd8cdb0d7dbd2d88cd Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-07-04meta-nuvoton: npcm8xx: change uboot load addressTim Lee1-2/+2
For compatible with the newest IGPS 3.9.1 design for new memory map. Thus, we need to change uboot load address. Tested: build pass and boot successfully. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I6deefcde03855521a19b05bdf967004e9ba954c2
2023-07-04meta-nuvoton: u-boot-nuvoton: srcrev bump eade1250...02f2872aTim Lee1-1/+1
For compatible with the newest IGPS 3.9.1 design for new memory map. Thus, we need to change uboot load address and CONFIG_SYS_MEM_TOP_HIDE. Stanley Chu (3): npcm8xx: enable configs for optee/tpm arbel: change uboot load address arbel: change CONFIG_SYS_MEM_TOP_HIDE default value Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I498c9f62ae41aa5685f49184420e04572fb64a44
2023-07-04meta-nuvoton: optee-os: change optee-os load addressTim Lee1-4/+15
For compatible with the newest IGPS 3.9.1 design for new memory map. We need to change optee-os load address from 0x00100000 to 0x02100000. Tested: build pass and boot successfully. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: Ia7fd3184da13daf084fbfa171528a8e953dcc98a
2023-07-04meta-nuvoton: trusted-firmware-a: change tf-a load addressTim Lee3-17/+1
For compatible with the newest IGPS 3.9.1 design for new memory map. We need to modify each image load address individually. The load address of tf-a from 0x00001000 to 0x02000000 The load address of optee-os from 0x00100000 to 0x02100000 The load address of uboot from 0x03008000 to 0x06208000 We've updated tf-a to 2.8 that keep up with meta-arm. Thus we remove 2.6.0.bb recipe and replace with 2.8.0.bbappend. Tested: build pass and boot successfully. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I730f0a677103b89b78897f0d1860a47933c5b7cc
2023-07-04meta-nuvoton: npcm8xx-tip-fw: update to 0.6.0.0.4.9Tim Lee1-1/+1
Changelog: TIP FW 0.6.0 L0 0.4.9 L1 ============== * New memory map. TIP_VIRTUAL_FLASH_BASE_ADDR moved to 0x1000000. * Fix NVIC_TrapHandlerCommon: uart reconfig should be after sampling core registers. * Fix DRAM window handling bug, in order to allow loading images to any address in DRAM. * In recovery mode: add an option to go to halt (print "N" at the start). * Add the support for enforcing recovery image to match active at boot time * Add support for ECC 384 + 521 * Add the support of ecc HW with tip_ecc_hw_ncl.c instead of old implementation using mbedtls code * Wake all 4 cores when jump to DRAM (feature was limited to RAM2 only). * Bug fix SFDP dummy byte. Tested: buid pass and boot up successful with correct TIP FW latest version. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I0d848f329a7954ca0b65644d368de93296b6e822
2023-07-04meta-nuvoton: npcm8xx-bootblock: update to 0.3.4Tim Lee2-3/+3
Changelog: version 0.3.4 - Jun 26th 2023 ============= - Bug fix: support NO_TIP mode + new memory map. All images are loaded to DRAM. version 0.3.3 - Jun 18th 2023 ============= - Add header field GMMAP at offset 0x152 which is copied to INTCR4.GMMAP0 and 1. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I711d377f3c4c7da1b106cef8e6e8f8b7824f10f1
2023-07-04meta-nuvoton: npcm8xx-igps: update to 03.09.01Tim Lee2-4/+4
Changelog: IGPS 03.09.01 - Jun 26th 2023 ============== - TIP FW 0.6.0 L0 0.4.9 L1 * New memory map. TIP_VIRTUAL_FLASH_BASE_ADDR moved to 0x1000000. * Fix NVIC_TrapHandlerCommon: uart reconfig should be after sampling core registers. * Fix DRAM window handling bug, in order to allow loading images to any address in DRAM. * In recovery mode: add an option to go to halt (print "N" at the start). * Add the support for enforcing recovery image to match active at boot time * Add support for ECC 384 + 521 * Add the support of ecc HW with tip_ecc_hw_ncl.c instead of old implementation using mbedtls code * Wake all 4 cores when jump to DRAM (feature was limited to RAM2 only). * Bug fix SFDP dummy byte. - Remove no_tip file from ReplaceComponent.bat - uboot: New memory map. - bl31: Release V2.8.2 * change load address of BL31 to 0x02000000 * change load address of OPTEE-OS to 0x02100000 * change load address of BL33 to 0x06208000 - optee: Release npcm845x_3.18.0_v1.0-697 * change load address of OPTEE-OS from to 0x02100000 - bootblock 0.3.3 * Add header field GMMAP at offset 0x152 which is copied to INTCR4.GMMAP0 and 1. - XML: add bootblock field to select GMMAP. Default is zero. If it's FF value is set as before by bootblock, according to DRAM size. - XML: bootblock sets MC to 1050MHz by default. - Bug fix in Open_all_ports batch. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I7ae7eb915530397e1a1a3f26a766e208e02c25c1
2023-06-28u-boot-nuvoton: bump srcrev 78bb108e...eade1250Brian Ma1-1/+1
Jim Liu (4): clk: npcm7xx: fix bug for calculate pll clock pinctrl: npcm: add reset type detect npcm8xx: fix reset reason issue for bootup npcm8xx: Add PORST detect and remove workaround Joseph Liu (1): dts: nuvoton-npcm845: eanble ftpm and optee support Judy Wang (1): drivers:optee:rpmb: initialize drivers of mmc devices in UCLASS_BLK for rpmb access Marvin Lin (2): dts: nuvoton-npcm845: enable RMII1 pins board: nuvoton: arbel: Correct CONFIG_SYS_MEM_TOP_HIDE value Stanley Chu (19): npcm_otp: correct the return value of fuse read npcm845-evb: configure rgmii2 phy voltage by dts npcm845-evb: set spix frequency to 50MHz dts: nuvoton-npcm845: set default uart clock rate dts: npcm8xx: add fm0 pinctrl misc: npcm_host_intf: change initialization sequence spi: npcm_fiu: do not change fiu clock clk: nuvoton: npcm8xx: set ahb/apb/fiu clock divider as read-only Revert "npcm845-evb: set spix frequency to 50MHz" spi: npcm_pspi: use ACTIVE_LOW flag for cs gpio and set default max_hz npcm845-evb: support TPM spi device arbel: add CONFIG_EXT_TPM2_SPI for external tpm2 device phy: add dt-bindig for npcm usb phy npcm8xx: support 4Gb ram gpio: npcm: set output state before enabling the output spi: npcm_pspi: update dts and debug log npcm_otp: read fuse bytes with byte offset arbel: update configs npcm8xx: add A2 CPU version Tim Lee (3): tools: env: use /run to store lockfile drivers: spi: fix compiler warnings from npcm_fiu_spi_probe configs: arbel: enable CONFIG_SPI_FLASH_GOOGLE Tyrone Ting (1): dts: nuvoton-npcm845: enable FIU3 voltage configuration Change-Id: I178cfe008b962a48ff1a6b3eb8a0c80d1f0fd34a Signed-off-by: Brian Ma <chma0@nuvoton.com>
2023-06-16meta-nuvoton: fix build warning for this layerTim Lee1-1/+1
There is build warning as below: WARNING: No bb files in default matched BBFILE_PATTERN_nuvoton-layer '' Sync from templates/layer.conf rule to fix this kind of warning. BBFILE_PATTERN_{layerid} = "^${{LAYERDIR}}/" Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I6a69f8f35cc7d129d605ee1f7d2519c32af53ab1
2023-06-09meta-phosphor: npcm8xx.bbclass: support sign images featureTim Lee3-4/+39
Add sign images feature according customer's requirement. Set "SECURED_IMAGE" to "True" and enable sign images feature. When sign images feature be enabled. Use default keys to sign images if customer didn't point their own local keys path. Note: "SECURED_IMAGE" default is "True". Tested: Use default keys sign: That will use default path and keys from igps to sign. Use local keys sign: That will use local path and keys to sign. When KEY_FOLDER and KEY definition both are valid. However, when KEY_FOLDER and KEY definition are invalid either, that will output sign images failed then stop build full images. Tested: build pass and boot up successfully with signed Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: If2b793906ab338aec391062d9bfeae2b1e790078
2023-06-09meta-nuvoton: linux-nuvoton: move to v6.1.29 stable releaseTim Lee1-3/+3
This includes security and bug fixes from the 5.15.61 through to 6.1.29 stable releases. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I5e016cdd33cf07310a18aa471bd0a35991437c6e
2023-06-08meta-nuvoton: npcm8xx: adjust BB_ALIGN to 512KTim Lee1-1/+1
TIP F/W requires that Bootblock address must be fixed at 512KB offset. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I47335e771b23bd468be465ecc6c8ba2c83b54696
2023-05-31meta-nuvoton: Reenable I2C for NPCM7xxVlad Sytchenko1-0/+1
340c15a259 in Nuvoton Linux 5.10 pulled in changes from upstream, one of which renamed the I2C kconfig from I2C_NPCM7XX to I2C_NPCM. Add the new option, but keep the old one for backwards for compatibility with platforms pinned on older kernel version. Change-Id: I006b09d72f8a6a5cbe14751a15cab58fdf315829 Signed-off-by: Vlad Sytchenko <vsytch@google.com>
2023-05-28meta-nuvoton: npcm8xx-igps: update to 03.09.00Tim Lee8-17/+26
Changelog: IGPS 03.09.00 - May 18th 2023 ============== - TIP_FW 0.5.9 L0 0.4.8 L1 - Bootblock version 0.3.2 - skip clearing INTCR2 - SCRPAD 10 is now reset - split CRC file (tip\notip) - Clear SCRPAD10-19 - Add BootBlockAndHeader_A1_EB_NoTip.xml for EB IGPS 03.08.09 - May 14th 2023 ============== - TIP_FW 0.5.9 L0 0.4.8 L1 - Bootblock version 0.3.1 - Added code for A2 - flash: support flash size mix - restore: force main and recovery flashes to the same - Add timestamp compare to combo IGPS 03.08.08 - May 3rd 2023 ============== - TIP_FW 0.5.7 L0 0.4.6 L1 - Bootblock version 0.3.0 - Added support for no TIP mode - No TIP mode is only for A2 users - IGPS still supports TIP mode IGPS 03.08.07 - April 17th 2023 ============== - TIP_FW 0.5.7 L0 0.4.6 L1 - Bootblock version 0.2.9 - Support A2 Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I2a2902f0ba07ad2ab2002357c8e5a4a228ed311a
2023-05-26meta-nuvoton: clean up meta-nuvoton defconfig for npcm8xxTim Lee1-11/+0
We've run some tests to mark sure there is no any performance impact. According all test results, there is no impact system performance. systemd-analyze: ------------------------------------------------------------- Original configuration Cleanup configuration Boot time (s) 2min 40.512s 2min 40.740s sysbench: ------------------------------------------------------------- Original configuration Cleanup configuration Latency (ms) min 5.61 5.61 avg 5.62 5.62 max 10.74 10 95th percentile 5.67 5.67 sum 9999.53 9999.08 fio: ------------------------------------------------------------- Original configuration Cleanup configuration Latency (ms) read 512B 8.72 8.75 read 4K 67.9 67.9 read 8K 135.52 135.5 read 16K 270.74 270.87 read 64K 1075.07 1075.62 read 128K 2132.08 2133.04 read 256K 4195.01 4213.21 read 512K 8111.68 8104.42 random r 512 9 8.98 random r 4K 68.14 68.11 random r 8K 135.69 135.7 random r 16K 270.68 270.79 random r 64K 1075.49 1075.95 random r 128K 2133.38 2131.82 random r 256K 4192.74 4192.05 random r 512K 8095.55 8097.43 lmbench: ------------------------------------------------------------- Original configuration Cleanup configuration Pipe latency 32.6599 32.996 Pipe bandwidth 505.30 MB/sec 534.04 MB/sec sock latency 38.9286 36.6467 sock bandwidth 1002.03 MB/sec 977.27 MB/sec Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I22b1d679454560ee79a3e28a1663cc71f88f333a
2023-05-26meta-nuvoton: npcm8xx-tip-fw: remove unnecessary recipeTim Lee1-8/+0
npcm8xx-tip-fw already specifies IGPS_MACHINE configuration. Thus, remove npcm8xx-tip-fw_0.4.5.0.3.4-GOOGLE2.bb in this layer. Signed-off-by: Tim Lee <timlee660101@gmail.com> Change-Id: I81b1e3d6088e3cb14e4f5392d866c689062556d3
2023-05-09meta-nuvoton: set npcm8xx optee preferred versionBrian Ma1-0/+2
Set optee-os-tadevkit, and optee-test version to 3.18.0 for Nuvoton npcm8xx device. Change-Id: I98a5637f2ad266d56d37df5cfa36b136bad76966 Signed-off-by: Brian Ma <chma0@nuvoton.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-25 05:06:49 +0300