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| author | Frieder Schrempf <frieder.schrempf@kontron.de> | 2022-08-22 11:03:51 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-09-17 11:34:22 +0300 |
| commit | 3e44946da2273d84107823838f6a40588dc2b2a7 (patch) | |
| tree | c33581d8c8299f653d6e8ae62fd23da3f4eb60e4 | |
| parent | eef2c0217e02b6c7ed5b10b82ea944127145e113 (diff) | |
| download | linux-3e44946da2273d84107823838f6a40588dc2b2a7.tar.xz | |
arm64: dts: imx8mm-kontron: Remove low DDRC operating point
For some reason there is a problem with finding a DDR configuration
that works on all operating points and all LPDDR4 types used on the
SoM. Therefore the bootloader currently doesn't configure the lowest
of the three operating points. Let's also skip this in the kernel
devicetree to make sure it isn't used.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi index 33179157f619..96ecdce67059 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-sl.dtsi @@ -46,10 +46,6 @@ ddrc_opp_table: opp-table { compatible = "operating-points-v2"; - opp-25M { - opp-hz = /bits/ 64 <25000000>; - }; - opp-100M { opp-hz = /bits/ 64 <100000000>; }; |