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| author | Clément Léger <cleger@rivosinc.com> | 2024-06-19 14:35:24 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-06-26 17:54:58 +0300 |
| commit | fc078ea317cc856c1e82997da7e8fd4d6da7aa29 (patch) | |
| tree | 4ae514f6b237f79663651cfab692a327beed1bc4 /Documentation/arch/riscv | |
| parent | 164d644059cf30bb3a8d0ef9f868d52e2445bb76 (diff) | |
| download | linux-fc078ea317cc856c1e82997da7e8fd4d6da7aa29.tar.xz | |
riscv: hwprobe: export Zcmop ISA extension
Export Zcmop ISA extension through hwprobe.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20240619113529.676940-15-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'Documentation/arch/riscv')
| -rw-r--r-- | Documentation/arch/riscv/hwprobe.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 4d9b4ed34c96..25d783be2878 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -231,6 +231,10 @@ The following keys are defined: ("Zcf doesn't exist on RV64 as it contains no instructions") of riscv-code-size-reduction. + * :c:macro:`RISCV_HWPROBE_EXT_ZCMOP`: The Zcmop May-Be-Operations extension is + supported as defined in the RISC-V ISA manual starting from commit + c732a4f39a4 ("Zcmop is ratified/1.0"). + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. |