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| author | Vladimir Lypak <junak.pub@gmail.com> | 2021-08-10 19:44:39 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-09-22 01:41:49 +0300 |
| commit | 0fdeecf9e33053f9c1629000682bc4d864242061 (patch) | |
| tree | 0aebd4fbb02a297daf54defd3a3abfbc503aa20f /Documentation/devicetree/bindings/firmware/qcom,scm.txt | |
| parent | 26bc7a6a0beed882032aa7c945e44d7e82887073 (diff) | |
| download | linux-0fdeecf9e33053f9c1629000682bc4d864242061.tar.xz | |
dt-bindings: firmware: qcom-scm: Document msm8953 bindings
SCM driver on MSM8953 requires 3 clocks.
Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210810164347.45578-4-sireeshkodali@protonmail.com
Diffstat (limited to 'Documentation/devicetree/bindings/firmware/qcom,scm.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/qcom,scm.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt index 5a90e84b8dcf..d7e3cda8924e 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -16,6 +16,7 @@ Required properties: * "qcom,scm-msm8226" * "qcom,scm-msm8660" * "qcom,scm-msm8916" + * "qcom,scm-msm8953" * "qcom,scm-msm8960" * "qcom,scm-msm8974" * "qcom,scm-msm8994" @@ -34,7 +35,7 @@ Required properties: * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and "qcom,scm-msm8960" * core, iface and bus clocks required for "qcom,scm-apq8084", - "qcom,scm-msm8916" and "qcom,scm-msm8974" + "qcom,scm-msm8916", "qcom,scm-msm8953" and "qcom,scm-msm8974" - clock-names: Must contain "core" for the core clock, "iface" for the interface clock and "bus" for the bus clock per the requirements of the compatible. - qcom,dload-mode: phandle to the TCSR hardware block and offset of the |