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authorSandeep Maheswaram <sanm@codeaurora.org>2020-05-15 05:39:16 +0300
committerVinod Koul <vkoul@kernel.org>2020-05-19 08:51:00 +0300
commit59351049ad15b3cb1285260b32af6b9439932c99 (patch)
treea8243777da67659afcf27718df116c7ca71ed082 /Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
parentccf51c1cedfd5bd1a0ecf6a33059dbdab3d3a9ef (diff)
downloadlinux-59351049ad15b3cb1285260b32af6b9439932c99.tar.xz
dt-bindings: phy: qcom,qmp-usb3-dp: Add dt bindings for USB3 DP PHY
Split out the dt bindings for USB3 DP PHY from qcom,qmp bindings for modularity. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Link: https://lore.kernel.org/r/1589510358-3865-3-git-send-email-sanm@codeaurora.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml')
-rw-r--r--Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml51
1 files changed, 15 insertions, 36 deletions
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
index dcdb014d6d4d..973b2d196f46 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
@@ -27,21 +27,13 @@ properties:
- qcom,sdm845-qhp-pcie-phy
- qcom,sdm845-qmp-pcie-phy
- qcom,sdm845-qmp-ufs-phy
- - qcom,sdm845-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-uni-phy
- qcom,sm8150-qmp-ufs-phy
- qcom,sm8250-qmp-ufs-phy
reg:
- minItems: 1
items:
- description: Address and length of PHY's common serdes block.
- - description: Address and length of the DP_COM control block.
-
- reg-names:
- items:
- - const: reg-base
- - const: dp_com
"#clock-cells":
enum: [ 1, 2 ]
@@ -110,7 +102,6 @@ allOf:
compatible:
contains:
enum:
- - qcom,sdm845-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-uni-phy
then:
properties:
@@ -284,51 +275,39 @@ allOf:
reset-names:
items:
- const: phy
- - if:
- properties:
- compatible:
- contains:
- const: qcom,sdm845-qmp-usb3-phy
- then:
- required:
- - reg-names
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
- usb_1_qmpphy: phy-wrapper@88e9000 {
- compatible = "qcom,sdm845-qmp-usb3-phy";
- reg = <0 0x088e9000 0 0x18c>,
- <0 0x088e8000 0 0x10>;
- reg-names = "reg-base", "dp_com";
+ usb_2_qmpphy: phy-wrapper@88eb000 {
+ compatible = "qcom,sdm845-qmp-usb3-uni-phy";
+ reg = <0 0x088eb000 0 0x18c>;
#clock-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
+ clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
<&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
+ <&gcc GCC_USB3_SEC_CLKREF_CLK>,
+ <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
clock-names = "aux", "cfg_ahb", "ref", "com_aux";
- resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
- <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
+ resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
+ <&gcc GCC_USB3_PHY_SEC_BCR>;
reset-names = "phy", "common";
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
- usb_1_ssphy: phy@88e9200 {
- reg = <0 0x088e9200 0 0x128>,
- <0 0x088e9400 0 0x200>,
- <0 0x088e9c00 0 0x218>,
- <0 0x088e9600 0 0x128>,
- <0 0x088e9800 0 0x200>,
- <0 0x088e9a00 0 0x100>;
+ usb_2_ssphy: phy@88eb200 {
+ reg = <0 0x088eb200 0 0x128>,
+ <0 0x088eb400 0 0x1fc>,
+ <0 0x088eb800 0 0x218>,
+ <0 0x088eb600 0 0x70>;
#clock-cells = <0>;
#phy-cells = <0>;
- clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
clock-names = "pipe0";
- clock-output-names = "usb3_phy_pipe_clk_src";
+ clock-output-names = "usb3_uni_phy_pipe_clk_src";
};
};