diff options
author | Vignesh R <vigneshr@ti.com> | 2016-05-03 18:56:55 +0300 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2016-06-10 14:58:06 +0300 |
commit | 34370142331953146efd1be573696785957a2fa9 (patch) | |
tree | e0b030190104835f544a776fbc499fddefc13ad9 /Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt | |
parent | 58bfbea5b1c6826953d54ee470ab560aba55afce (diff) | |
download | linux-34370142331953146efd1be573696785957a2fa9.tar.xz |
ARM: dts: DRA7: Add dt nodes for PWMSS
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Add eCAP and use updated bindings for PWMSS and ePWM]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt index 41a2bd4b9fe3..944fe356bb45 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt @@ -5,6 +5,7 @@ Required properties: for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm"; + for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm"; - #pwm-cells: should be 3. See pwm.txt in this directory for a description of the cells format. The only third cell flag supported by this binding is PWM_POLARITY_INVERTED. @@ -38,3 +39,11 @@ ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */ #pwm-cells = <3>; reg = <0x1f00000 0x2000>; }; + +ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */ + compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm"; + #pwm-cells = <3>; + reg = <0x4843e200 0x80>; + clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>; + clock-names = "tbclk", "fck"; +}; |