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author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-30 14:31:37 +0300 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-30 14:31:37 +0300 |
commit | ba15533275dd70238b523417d222d43fb40dac9d (patch) | |
tree | e97f6b804994d20ce476dc5a123fc074799e9584 /Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | |
parent | f75410a406e934e4cf31e0a7ec151799a6bf38cf (diff) | |
parent | 7111951b8d4973bda27ff663f2cf18b663d15b48 (diff) | |
download | linux-ba15533275dd70238b523417d222d43fb40dac9d.tar.xz |
Merge tag 'v5.6' into mips-next
Linux 5.6
Diffstat (limited to 'Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml index 246dea8a2ec9..8ac437282659 100644 --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml @@ -23,7 +23,11 @@ properties: description: Global reset register offset and bit offset. allOf: - $ref: /schemas/types.yaml#/definitions/uint32-array - - maxItems: 2 + items: + - description: Register offset + - description: Register bit offset + minimum: 0 + maximum: 31 "#reset-cells": minimum: 2 |