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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-01-24 12:19:09 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-02-01 08:13:36 +0300 |
| commit | 3a7f73e3475d4f4288f8bd560253aca5cd0d0cad (patch) | |
| tree | 9011e8ae95321f3e8a6b175883e34c93db883513 /Documentation/devicetree/bindings/serial | |
| parent | bd99d12535165b761cfdb1fa19814e6885d59baf (diff) | |
| download | linux-3a7f73e3475d4f4288f8bd560253aca5cd0d0cad.tar.xz | |
dt-bindings: serial: cdsn,uart: add power-domains
Few Xilinx DTS have power domains in serial node:
zynqmp-zc1232-revA.dtb: serial@ff000000: Unevaluated properties are not allowed ('power-domains' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230124091916.45054-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
| -rw-r--r-- | Documentation/devicetree/bindings/serial/cdns,uart.yaml | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.yaml b/Documentation/devicetree/bindings/serial/cdns,uart.yaml index 0c118d5336cc..38925b79cb38 100644 --- a/Documentation/devicetree/bindings/serial/cdns,uart.yaml +++ b/Documentation/devicetree/bindings/serial/cdns,uart.yaml @@ -9,9 +9,6 @@ title: Cadence UART Controller maintainers: - Michal Simek <michal.simek@xilinx.com> -allOf: - - $ref: serial.yaml# - properties: compatible: oneOf: @@ -46,6 +43,9 @@ properties: port does not use this pin. type: boolean + power-domains: + maxItems: 1 + required: - compatible - reg @@ -53,6 +53,17 @@ required: - clocks - clock-names +allOf: + - $ref: serial.yaml# + - if: + properties: + compatible: + contains: + const: cdns,uart-r1p8 + then: + properties: + power-domains: false + unevaluatedProperties: false examples: |