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authorPranavi Somisetty <pranavi.somisetty@amd.com>2023-06-13 08:43:39 +0300
committerDavid S. Miller <davem@davemloft.net>2023-06-15 10:45:29 +0300
commit5b32c61a2dac17db3f87c65cada74c9d7f31f4fb (patch)
tree35706daf4744cbe16debbc08fc16d010246d2a91 /Documentation
parent473f5e13b38b9533bd3ae0758418581eabf69b50 (diff)
downloadlinux-5b32c61a2dac17db3f87c65cada74c9d7f31f4fb.tar.xz
dt-bindings: net: cdns,macb: Add rx-watermark property
watermark value is the minimum amount of packet data required to activate the forwarding process. The watermark implementation and maximum size is dependent on the device where Cadence MACB/GEM is used. Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/net/cdns,macb.yaml11
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
index bef5e0f895be..bf8894a0257e 100644
--- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
+++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
@@ -109,6 +109,16 @@ properties:
power-domains:
maxItems: 1
+ cdns,rx-watermark:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ When the receive partial store and forward mode is activated,
+ the receiver will only begin to forward the packet to the external
+ AHB or AXI slave when enough packet data is stored in the SRAM packet buffer.
+ rx-watermark corresponds to the number of SRAM buffer locations,
+ that need to be filled, before the forwarding process is activated.
+ Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes.
+
'#address-cells':
const: 1
@@ -166,6 +176,7 @@ examples:
compatible = "cdns,macb";
reg = <0xfffc4000 0x4000>;
interrupts = <21>;
+ cdns,rx-watermark = <0x44>;
phy-mode = "rmii";
local-mac-address = [3a 0e 03 04 05 06];
clock-names = "pclk", "hclk", "tx_clk";