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authorClaudiu Beznea <claudiu.beznea@microchip.com>2021-09-27 09:36:57 +0300
committerMarc Zyngier <maz@kernel.org>2021-10-20 21:40:54 +0300
commit00fa3461c86dd289b441d4d5a6bb236064bd207b (patch)
treeb234afb66834b8695032e3f5ef0ad2c8c2408fc2 /MAINTAINERS
parent36179af21cc812ccac37678b1c8114856876fb3f (diff)
downloadlinux-00fa3461c86dd289b441d4d5a6bb236064bd207b.tar.xz
irqchip/mchp-eic: Add support for the Microchip EIC
Add support for Microchip External Interrupt Controller. The controller supports 2 external interrupt lines. For every external input there is a connection to GIC. The interrupt controllers contains only 4 registers: - EIC_GFCS (read only): which indicates that glitch filter configuration is ready (not addressed in this implementation) - EIC_SCFG0R, EIC_SCFG1R (read, write): allows per interrupt specific settings: enable, polarity/edge settings, glitch filter settings - EIC_WPMR, EIC_WPSR: enables write protection mode specific settings (which are architecture specific) for the controller and are not addressed in this implementation Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210927063657.2157676-3-claudiu.beznea@microchip.com
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS6
1 files changed, 6 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index abdcbcfef73d..64d7e9854786 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12254,6 +12254,12 @@ L: linux-crypto@vger.kernel.org
S: Maintained
F: drivers/crypto/atmel-ecc.*
+MICROCHIP EIC DRIVER
+M: Claudiu Beznea <claudiu.beznea@microchip.com>
+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+S: Supported
+F: drivers/irqchip/irq-mchp-eic.c
+
MICROCHIP I2C DRIVER
M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
L: linux-i2c@vger.kernel.org