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| author | Alexander Stein <alexander.stein@ew.tq-group.com> | 2023-12-18 15:54:37 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2024-02-03 07:40:21 +0300 |
| commit | e67e40cff8fc89f74624a0d700b29697d9f28bde (patch) | |
| tree | 086abf616076c4188d1fba7c27c87267ca7f5411 /arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| download | linux-e67e40cff8fc89f74624a0d700b29697d9f28bde.tar.xz | |
ARM: dts: imx7-tqma7/mba7: convert fsl,pins to uint32-matrix
make dtbs_check does not warn about this anymore, but bindings mandate
a uint32-matrix.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 114 |
1 files changed, 53 insertions, 61 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 3fc3130f9def..e6e40747d5b9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -163,91 +163,83 @@ &iomuxc { pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078 - MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078 - >; + fsl,pins = + <MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078>, + <MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078>; }; pinctrl_pmic1: pmic1grp { - fsl,pins = < - MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C - >; + fsl,pins = + <MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C>; }; pinctrl_qspi: qspigrp { - fsl,pins = < - MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A - MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A - MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A - MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A - MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11 - MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54 - MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54 - >; + fsl,pins = + <MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A>, + <MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A>, + <MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A>, + <MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A>, + <MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11>, + <MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54>, + <MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54>; }; pinctrl_qspi_reset: qspi_resetgrp { - fsl,pins = < + fsl,pins = /* #QSPI_RESET */ - MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52 - >; + <MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52>; }; pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x56 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 - >; + fsl,pins = + <MX7D_PAD_SD3_CMD__SD3_CMD 0x59>, + <MX7D_PAD_SD3_CLK__SD3_CLK 0x56>, + <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59>, + <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59>, + <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59>, + <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59>, + <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59>, + <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59>, + <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59>, + <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59>, + <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19>; }; pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a - MX7D_PAD_SD3_CLK__SD3_CLK 0x51 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a - >; + fsl,pins = + <MX7D_PAD_SD3_CMD__SD3_CMD 0x5a>, + <MX7D_PAD_SD3_CLK__SD3_CLK 0x51>, + <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a>, + <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a>, + <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a>, + <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a>, + <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a>, + <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a>, + <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a>, + <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a>, + <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a>; }; pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b - MX7D_PAD_SD3_CLK__SD3_CLK 0x51 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b - >; + fsl,pins = + <MX7D_PAD_SD3_CMD__SD3_CMD 0x5b>, + <MX7D_PAD_SD3_CLK__SD3_CLK 0x51>, + <MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b>, + <MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b>, + <MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b>, + <MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b>, + <MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b>, + <MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b>, + <MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b>, + <MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b>, + <MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b>; }; }; &iomuxc_lpsr { pinctrl_wdog1: wdog1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 - >; + fsl,pins = + <MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30>; }; }; |