diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-01-15 14:03:03 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-01-22 11:16:43 +0300 |
| commit | 090c4094574705b0afc7d37825cdc5d06f0e7e02 (patch) | |
| tree | 82d6e4480077a6eff2e6be5b769493d9429a1ffa /arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts | |
| parent | 347c80f7c7b207ad8cb183822df75f70b7dc0773 (diff) | |
| download | linux-090c4094574705b0afc7d37825cdc5d06f0e7e02.tar.xz | |
ARM: dts: renesas: r8a73a4: Fix external clocks and clock rate
External clocks should be defined as zero-Hz clocks in the SoC .dtsi,
and overridden in the board .dts when present.
Correct the clock rate of extal1 from 25 to 26 MHz, to match the crystal
oscillator present on the APE6-EVM board.
Fixes: a76809a329d6ebae ("ARM: shmobile: r8a73a4: Common clock framework DT description")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1692bc8cd465d62168cbf110522ad62a7af3f606.1705315614.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts')
| -rw-r--r-- | arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts index ed75c01dbee1..3d02f065f71c 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/renesas/r8a73a4-ape6evm.dts @@ -209,6 +209,18 @@ status = "okay"; }; +&extal1_clk { + clock-frequency = <26000000>; +}; + +&extal2_clk { + clock-frequency = <48000000>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + &pfc { scifa0_pins: scifa0 { groups = "scifa0_data"; |