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| author | Etienne Carriere <etienne.carriere@foss.st.com> | 2024-06-17 12:14:18 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-07-05 15:45:24 +0300 |
| commit | 3333d21af6fade5215bf0803fd8ef3c4c9d46fd4 (patch) | |
| tree | bf6a8d808b8785b16b912946b979ed0802a71cc8 /arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | |
| parent | 0fc78aa67b3f9a7cc6b67ddbc511e4a5022cfd01 (diff) | |
| download | linux-3333d21af6fade5215bf0803fd8ef3c4c9d46fd4.tar.xz | |
ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards
Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards
for OP-TEE async notif.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts')
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts index 8e4b0db198c2..6f27d794d270 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -67,6 +67,11 @@ reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = <GIC_PPI 15 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; |