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authorJoseph Lo <josephl@nvidia.com>2013-10-11 13:58:38 +0400
committerStephen Warren <swarren@nvidia.com>2013-10-19 02:28:10 +0400
commitf0c4ac1329452e5d31a03b4bb711c330065c0369 (patch)
tree38f618cae4e1cf374681d6569aeb486dec44aa69 /arch/arm/mach-tegra/iomap.h
parent92e94fe1cdaf3c6c636dc2c5129f8eabc89dca6c (diff)
downloadlinux-f0c4ac1329452e5d31a03b4bb711c330065c0369.tar.xz
ARM: tegra: add LP1 support code for Tegra124
The LP1 suspend procedure is the same with Tegra30 and Tegra114. Just need to update the difference of the register address, then we can continue to share the code. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/iomap.h')
-rw-r--r--arch/arm/mach-tegra/iomap.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index cbee57fc4fd8..26b1c2ad0ceb 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -105,6 +105,9 @@
#define TEGRA_EMC1_BASE 0x7001A800
#define TEGRA_EMC1_SIZE SZ_2K
+#define TEGRA124_EMC_BASE 0x7001B000
+#define TEGRA124_EMC_SIZE SZ_2K
+
#define TEGRA_CSITE_BASE 0x70040000
#define TEGRA_CSITE_SIZE SZ_256K