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authorArnd Bergmann <arnd@arndb.de>2022-07-01 17:01:52 +0300
committerArnd Bergmann <arnd@arndb.de>2022-07-01 17:01:52 +0300
commit813b0808907511ea30a7c648a52ccf625b4d5f6d (patch)
tree42030708a17b2d52e2e8b5930a61b6710ca33ca1 /arch/arm64/boot/dts/exynos/exynos7885.dtsi
parent7949803d384738ddba6f2c92db8635eb74f0434d (diff)
parent1a4f20cab6411c6e73dd22d28b6595b728cc2829 (diff)
downloadlinux-813b0808907511ea30a7c648a52ccf625b4d5f6d.tar.xz
Merge tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.20 1. Add CPU cache, UFS to Tesla FSD. 2. Add reboot-mode (boot into specific bootloader mode) to ExynosAutov9. 3. Add watchdogs to ExynosAutov9. 4. Add eMMC to Exynos7885 JackpotLTE (Samsung Galaxy A8). 5. DTS cleanup: white-spaces, node names, LED color/function. 6. Switch to DTS-local header for pinctrl register values instead of bindings header. The bindings header is being deprecated because it does not reflect the purpose of bindings. * tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add internal eMMC support to jackpotlte dt-bindings: clock: Add indices for Exynos7885 TREX clocks dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADK arm64: dts: exynos: add secondary ufs devices in ExynosAutov9 arm64: dts: fsd: use local header for pinctrl register values arm64: dts: exynos: use local header for pinctrl register values arm64: dts: exynos: align MMC node name with dtschema arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9 arm64: dts: exynos: adjust whitespace around '=' arm64: dts: fsd: add ufs device node arm64: dts: exynos: add watchdog in ExynosAutov9 arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9 dt-bindings: soc: add samsung,boot-mode definitions arm64: dts: fsd: Add cpu cache information Link: https://lore.kernel.org/r/20220624080746.31947-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos7885.dtsi')
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7885.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos7885.dtsi b/arch/arm64/boot/dts/exynos/exynos7885.dtsi
index 9c233c56558c..23c2e0bb0a2c 100644
--- a/arch/arm64/boot/dts/exynos/exynos7885.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7885.dtsi
@@ -240,6 +240,25 @@
clock-names = "oscclk";
};
+ cmu_fsys: clock-controller@13400000 {
+ compatible = "samsung,exynos7885-cmu-fsys";
+ reg = <0x13400000 0x8000>;
+ #clock-cells = <1>;
+
+ clocks = <&oscclk>,
+ <&cmu_top CLK_DOUT_FSYS_BUS>,
+ <&cmu_top CLK_DOUT_FSYS_MMC_CARD>,
+ <&cmu_top CLK_DOUT_FSYS_MMC_EMBD>,
+ <&cmu_top CLK_DOUT_FSYS_MMC_SDIO>,
+ <&cmu_top CLK_DOUT_FSYS_USB30DRD>;
+ clock-names = "oscclk",
+ "dout_fsys_bus",
+ "dout_fsys_mmc_card",
+ "dout_fsys_mmc_embd",
+ "dout_fsys_mmc_sdio",
+ "dout_fsys_usb30drd";
+ };
+
pinctrl_alive: pinctrl@11cb0000 {
compatible = "samsung,exynos7885-pinctrl";
reg = <0x11cb0000 0x1000>;
@@ -274,6 +293,19 @@
reg = <0x11c80000 0x10000>;
};
+ mmc_0: mmc@13500000 {
+ compatible = "samsung,exynos7-dw-mshc-smu";
+ reg = <0x13500000 0x2000>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>,
+ <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>;
+ clock-names = "biu", "ciu";
+ fifo-depth = <0x40>;
+ status = "disabled";
+ };
+
serial_0: serial@13800000 {
compatible = "samsung,exynos5433-uart";
reg = <0x13800000 0x100>;