diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2020-09-07 15:18:29 +0300 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2020-09-14 10:27:04 +0300 |
| commit | a665b2c1d28403e385054447cc319095527bedde (patch) | |
| tree | e4928ad98dd25ff172da336627745adc3adc3919 /arch/arm64/boot/dts/hisilicon/hi6220.dtsi | |
| parent | 64ea21e0173778c5dde08394418cfd5e8cf54641 (diff) | |
| download | linux-a665b2c1d28403e385054447cc319095527bedde.tar.xz | |
arm64: dts: hisilicon: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hi6220.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3bab4bc6ff99..014735a9bc73 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -843,8 +843,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xf8005000 0x0 0x1000>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ao_ctrl HI6220_WDT0_PCLK>; - clock-names = "apb_pclk"; + clocks = <&ao_ctrl HI6220_WDT0_PCLK>, + <&ao_ctrl HI6220_WDT0_PCLK>; + clock-names = "wdog_clk", "apb_pclk"; }; tsensor: tsensor@0,f7030700 { |