diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-01-18 19:48:31 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-01-28 12:59:14 +0300 |
| commit | 953b392aef3504dbd7cacab11bceca43e59d2f62 (patch) | |
| tree | 5497fa708a59ce2e52ea7c48ed0e9bab32806574 /arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | |
| parent | 283252132cb578cffe761380056caf0aa6a9cf25 (diff) | |
| download | linux-953b392aef3504dbd7cacab11bceca43e59d2f62.tar.xz | |
arm64: dts: renesas: Miscellaneous whitespace fixes
Make whitespace and indentation more consistent.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 2692cc64bff6..5ad6cd1864c1 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -359,11 +359,10 @@ clocks = <&x304_clk>; clock-names = "xin"; - assigned-clocks = <&versaclock6_bb 1>, - <&versaclock6_bb 2>, - <&versaclock6_bb 3>, - <&versaclock6_bb 4>; - assigned-clock-rates = <24000000>, <24000000>, <24000000>, <24576000>; + assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>, + <&versaclock6_bb 3>, <&versaclock6_bb 4>; + assigned-clock-rates = <24000000>, <24000000>, <24000000>, + <24576000>; OUT1 { idt,mode = <VC5_CMOS>; |