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authorAdam Ford <aford173@gmail.com>2020-12-24 20:04:56 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-01-11 12:01:29 +0300
commitdc3dba98d2d31420a263b726e5c0a25aa7122e85 (patch)
tree38b1cad87a52904cb7d861e77c46f1ffa43e5315 /arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
parentb29120d6cfa978ae0721af855afbae3137c8e66d (diff)
downloadlinux-dc3dba98d2d31420a263b726e5c0a25aa7122e85.tar.xz
arm64: dts: renesas: beacon: Configure Audio CODEC clocks
With the newly added configurable clock options, the audio CODEC can configure the mclk automatically. Add the reference to the versaclock. Since the devices on I2C5 can communicate at 400KHz, let's also increase that too Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201224170502.2254683-3-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index e66e302bdccb..b31a28239fcb 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -408,13 +408,14 @@
&i2c5 {
status = "okay";
- clock-frequency = <100000>;
+ clock-frequency = <400000>;
pinctrl-0 = <&i2c5_pins>;
pinctrl-names = "default";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
+ clocks = <&versaclock6_bb 3>;
DCVDD-supply = <&reg_audio>;
DBVDD-supply = <&reg_audio>;
AVDD-supply = <&reg_audio>;