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authorArnaldo Carvalho de Melo <acme@redhat.com>2020-08-06 14:15:47 +0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2020-08-06 14:15:47 +0300
commit94fb1afb14c4f0ceb8c5508ddddac6819f662e95 (patch)
tree4988e5769dc7482caa7f441475ae31f50bbd37ef /arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
parentc4735d990268399da9133b0ad445e488ece009ad (diff)
parent47ec5303d73ea344e84f46660fff693c57641386 (diff)
downloadlinux-94fb1afb14c4f0ceb8c5508ddddac6819f662e95.tar.xz
Mgerge remote-tracking branch 'torvalds/master' into perf/core
To sync headers, for instance, in this case tools/perf was ahead of upstream till Linus merged tip/perf/core to get the PERF_RECORD_TEXT_POKE changes: Warning: Kernel ABI header at 'tools/include/uapi/linux/perf_event.h' differs from latest version at 'include/uapi/linux/perf_event.h' diff -u tools/include/uapi/linux/perf_event.h include/uapi/linux/perf_event.h Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
new file mode 100644
index 000000000000..bb18f6ee2048
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-rev2.dts
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2M Rev.2.0 main board
+ *
+ * Copyright (C) 2019 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a774a1.dtsi"
+#include "hihope-rev2.dtsi"
+
+/ {
+ model = "HopeRun HiHope RZ/G2M main board (Rev.2.0) based on r8a774a1";
+ compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
+
+ memory@48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x78000000>;
+ };
+
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x80000000>;
+ };
+};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 722>,
+ <&versaclock5 1>,
+ <&x302_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.2",
+ "dclkin.0", "dclkin.1", "dclkin.2";
+};