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| author | Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> | 2020-08-12 17:02:11 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-08-17 10:46:33 +0300 |
| commit | f22d0550b83570b10e8f4a474d9629fd4ad76db7 (patch) | |
| tree | a5a4c9004d7b3100622ebdfccfd376e89dc1fd87 /arch/arm64/boot/dts/renesas/r8a774e1.dtsi | |
| parent | ebe5f898b60b341bd223d835dd3d7d77a5b38979 (diff) | |
| download | linux-f22d0550b83570b10e8f4a474d9629fd4ad76db7.tar.xz | |
arm64: dts: renesas: r8a774e1: Populate DU device node
Populate the DU device node properties in R8A774E1 SoC dtsi.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200812140217.24251-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774e1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index abaa6d7f6b31..4b57c1ea762c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -2623,22 +2623,39 @@ }; du: display@feb00000 { + compatible = "renesas,du-r8a774e1"; reg = <0 0xfeb00000 0 0x80000>; + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>; + clock-names = "du.0", "du.1", "du.3"; + resets = <&cpg 724>, <&cpg 722>; + reset-names = "du.0", "du.3"; status = "disabled"; - /* placeholder */ + renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; + ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + du_out_rgb: endpoint { + }; }; port@1 { reg = <1>; + du_out_hdmi0: endpoint { + }; }; port@2 { reg = <2>; + du_out_lvds0: endpoint { + }; }; }; }; |