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| author | Duc Nguyen <duc.nguyen.ub@renesas.com> | 2021-10-06 11:58:35 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-10-08 16:16:02 +0300 |
| commit | 5de968a25a30302c7714ae1c80b0eaff6834e2ed (patch) | |
| tree | 92f466c24552f7802b548f2ebeb46ac02a65d9f8 /arch/arm64/boot/dts/renesas/r8a779a0.dtsi | |
| parent | 9223cb663e9f3f1031f5ef9c6e398447e40338f6 (diff) | |
| download | linux-5de968a25a30302c7714ae1c80b0eaff6834e2ed.tar.xz | |
arm64: dts: renesas: r8a779a0: Add RPC node
Add device node for RPC on R8A779A0 SoC.
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[wsa: rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211006085836.42155-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779a0.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index f9a882b34f82..2506db9525f4 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -1105,6 +1105,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a779a0-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x04000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 629>; + clock-names = "rpc"; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 629>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + ipmmu_rt0: iommu@ee480000 { compatible = "renesas,ipmmu-r8a779a0"; reg = <0 0xee480000 0 0x20000>; |