diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-12-08 17:27:28 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-12-14 14:29:17 +0300 |
| commit | 844dd4378453ad8234498ebc330887209e8ad346 (patch) | |
| tree | 767af479b253535d8a881aee929aea8421500cc0 /arch/arm64/boot/dts/renesas/r9a07g044.dtsi | |
| parent | 5a6bca1ff7a50d2613c3074f00d2768af1aff120 (diff) | |
| download | linux-844dd4378453ad8234498ebc330887209e8ad346.tar.xz | |
arm64: dts: renesas: r9a07g044: Add TSU node
Add TSU node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211208142729.2456-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a07g044.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 439870930fb3..ea528580f306 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -539,6 +539,16 @@ }; }; + tsu: thermal@10059400 { + compatible = "renesas,r9a07g044-tsu", + "renesas,rzg2l-tsu"; + reg = <0 0x10059400 0 0x400>; + clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>; + resets = <&cpg R9A07G044_TSU_PRESETN>; + power-domains = <&cpg>; + #thermal-sensor-cells = <1>; + }; + sbc: spi@10060000 { compatible = "renesas,r9a07g044-rpc-if", "renesas,rzg2l-rpc-if"; @@ -902,6 +912,22 @@ }; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsu 0>; + + trips { + sensor_crit: sensor-crit { + temperature = <125000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |