diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2023-08-25 12:05:18 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-05 15:25:00 +0300 |
| commit | feab6a13ae63101e62a9f3b0e552f13067218e6f (patch) | |
| tree | ca1f1751cffe1c90c19e80847239724ddf538f87 /arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi | |
| parent | 75b696a43fdd1740359cf967a6cbc9ae06fb616d (diff) | |
| download | linux-feab6a13ae63101e62a9f3b0e552f13067218e6f.tar.xz | |
arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk
Currently audio mclk uses a fixed clk of 11.2896MHz (multiple of 44.1kHz).
Replace this fixed clk with the programmable versa3 clk that can provide
the clocking to support both 44.1kHz (with a clock of 11.2896MHz) and
48kHz (with a clock of 12.2880MHz), based on audio sampling rate for
playback and record.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230825090518.87394-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi index a7594ba3a998..b7a3e6caa386 100644 --- a/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rz-smarc-common.dtsi @@ -32,12 +32,6 @@ stdout-path = "serial0:115200n8"; }; - audio_mclock: audio_mclock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - snd_rzg2l: sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -55,7 +49,7 @@ }; codec_dai: simple-audio-card,codec { - clocks = <&audio_mclock>; + clocks = <&versa3 2>; sound-dai = <&wm8978>; }; }; @@ -76,6 +70,12 @@ gpios-states = <1>; states = <3300000 1>, <1800000 0>; }; + + x1: x1-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + }; }; &audio_clk1 { |