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authorGeert Uytterhoeven <geert+renesas@glider.be>2024-01-25 17:48:54 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-01-29 16:22:26 +0300
commit1b940d036d5a2235323851c579100d1d835d1474 (patch)
tree783de51eefdc7054de24bee79de14aba83604aa7 /arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi
parent48683d4a88ddf08f5582655c651736c0887618b9 (diff)
downloadlinux-1b940d036d5a2235323851c579100d1d835d1474.tar.xz
arm64: dts: renesas: white-hawk: Drop SoC parts from sub boards
The White Hawk CSI/DSI and RAVB/Ethernet(1000Base-T1) sub boards are not specific to R-Car V4H. Hence rename their DTS file names to drop the "r8a779g0-" prefix, and remove any references to R-Car V4H. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/f89613d0df04cfa6196f8797fe655cf7cec812de.1706192990.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi187
1 files changed, 187 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi
new file mode 100644
index 000000000000..3006b0a64f41
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/white-hawk-csi-dsi.dtsi
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the White Hawk CSI/DSI sub-board
+ *
+ * Copyright (C) 2022 Glider bv
+ */
+
+#include <dt-bindings/media/video-interfaces.h>
+
+&csi40 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csi40_in: endpoint {
+ bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3>;
+ remote-endpoint = <&max96712_out0>;
+ };
+ };
+ };
+};
+
+&csi41 {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csi41_in: endpoint {
+ bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3>;
+ remote-endpoint = <&max96712_out1>;
+ };
+ };
+ };
+};
+
+&i2c0 {
+ pca9654_a: gpio@21 {
+ compatible = "onnn,pca9654";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pca9654_b: gpio@22 {
+ compatible = "onnn,pca9654";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ eeprom@52 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "csi-dsi-sub-board-id";
+ reg = <0x52>;
+ pagesize = <8>;
+ };
+};
+
+&i2c1 {
+ gmsl0: gmsl-deserializer@49 {
+ compatible = "maxim,max96712";
+ reg = <0x49>;
+ enable-gpios = <&pca9654_a 0 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@4 {
+ reg = <4>;
+ max96712_out0: endpoint {
+ bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3>;
+ remote-endpoint = <&csi40_in>;
+ };
+ };
+ };
+ };
+
+ gmsl1: gmsl-deserializer@4b {
+ compatible = "maxim,max96712";
+ reg = <0x4b>;
+ enable-gpios = <&pca9654_b 0 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@4 {
+ reg = <4>;
+ max96712_out1: endpoint {
+ bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
+ clock-lanes = <0>;
+ data-lanes = <1 2 3>;
+ remote-endpoint = <&csi41_in>;
+ };
+ };
+ };
+ };
+};
+
+&isp0 {
+ status = "okay";
+};
+
+&isp1 {
+ status = "okay";
+};
+
+&vin00 {
+ status = "okay";
+};
+
+&vin01 {
+ status = "okay";
+};
+
+&vin02 {
+ status = "okay";
+};
+
+&vin03 {
+ status = "okay";
+};
+
+&vin04 {
+ status = "okay";
+};
+
+&vin05 {
+ status = "okay";
+};
+
+&vin06 {
+ status = "okay";
+};
+
+&vin07 {
+ status = "okay";
+};
+
+&vin08 {
+ status = "okay";
+};
+
+&vin09 {
+ status = "okay";
+};
+
+&vin10 {
+ status = "okay";
+};
+
+&vin11 {
+ status = "okay";
+};
+
+&vin12 {
+ status = "okay";
+};
+
+&vin13 {
+ status = "okay";
+};
+
+&vin14 {
+ status = "okay";
+};
+
+&vin15 {
+ status = "okay";
+};